
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:03:32 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32D/fsqrt.d.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fsqrt.d instruction of the RISC-V RV32FD_Zicsr,RV64FD_Zicsr extension for the fsqrt.d_b9 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IFD_Zicsr,RV64IFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*D.*);def TEST_CASE_1=True;",fsqrt.d_b9)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs1 != rd, rs1==f18, rd==f2,fs1 == 0 and fe1 == 0x369 and fm1 == 0x6d601ad376ab9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f18; dest:f2; op1val:0x3696d601ad376ab9; valaddr_reg:x3;
val_offset:0*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f2, f18, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rd, rs1==f26, rd==f26,fs1 == 0 and fe1 == 0x369 and fm1 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f26; dest:f26; op1val:0x369fffffffe00000; valaddr_reg:x3;
val_offset:1*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f26, f26, dyn, 0, 0, x3, 1*FLEN/8, x4, x1, x2)

inst_2:
// rs1==f9, rd==f4,fs1 == 0 and fe1 == 0x36a and fm1 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f9; dest:f4; op1val:0x36affffffff00000; valaddr_reg:x3;
val_offset:2*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f4, f9, dyn, 0, 0, x3, 2*FLEN/8, x4, x1, x2)

inst_3:
// rs1==f5, rd==f30,fs1 == 0 and fe1 == 0x36b and fm1 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f5; dest:f30; op1val:0x36bffffffff80000; valaddr_reg:x3;
val_offset:3*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f30, f5, dyn, 0, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_4:
// rs1==f11, rd==f7,fs1 == 0 and fe1 == 0x36c and fm1 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f11; dest:f7; op1val:0x36cffffffffc0000; valaddr_reg:x3;
val_offset:4*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f7, f11, dyn, 0, 0, x3, 4*FLEN/8, x4, x1, x2)

inst_5:
// rs1==f25, rd==f16,fs1 == 0 and fe1 == 0x36d and fm1 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f25; dest:f16; op1val:0x36dffffffffe0000; valaddr_reg:x3;
val_offset:5*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f16, f25, dyn, 0, 0, x3, 5*FLEN/8, x4, x1, x2)

inst_6:
// rs1==f6, rd==f13,fs1 == 0 and fe1 == 0x36e and fm1 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f6; dest:f13; op1val:0x36efffffffff0000; valaddr_reg:x3;
val_offset:6*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f13, f6, dyn, 0, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_7:
// rs1==f16, rd==f5,fs1 == 0 and fe1 == 0x36f and fm1 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f16; dest:f5; op1val:0x36ffffffffff8000; valaddr_reg:x3;
val_offset:7*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f5, f16, dyn, 0, 0, x3, 7*FLEN/8, x4, x1, x2)

inst_8:
// rs1==f12, rd==f19,fs1 == 0 and fe1 == 0x370 and fm1 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f12; dest:f19; op1val:0x370fffffffffc000; valaddr_reg:x3;
val_offset:8*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f19, f12, dyn, 0, 0, x3, 8*FLEN/8, x4, x1, x2)

inst_9:
// rs1==f3, rd==f20,fs1 == 0 and fe1 == 0x371 and fm1 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f3; dest:f20; op1val:0x371fffffffffe000; valaddr_reg:x3;
val_offset:9*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f20, f3, dyn, 0, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_10:
// rs1==f29, rd==f3,fs1 == 0 and fe1 == 0x372 and fm1 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f29; dest:f3; op1val:0x372ffffffffff000; valaddr_reg:x3;
val_offset:10*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f3, f29, dyn, 0, 0, x3, 10*FLEN/8, x4, x1, x2)

inst_11:
// rs1==f28, rd==f17,fs1 == 0 and fe1 == 0x373 and fm1 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f28; dest:f17; op1val:0x373ffffffffff800; valaddr_reg:x3;
val_offset:11*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f17, f28, dyn, 0, 0, x3, 11*FLEN/8, x4, x1, x2)

inst_12:
// rs1==f8, rd==f1,fs1 == 0 and fe1 == 0x374 and fm1 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f8; dest:f1; op1val:0x374ffffffffffc00; valaddr_reg:x3;
val_offset:12*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f1, f8, dyn, 0, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_13:
// rs1==f21, rd==f8,fs1 == 0 and fe1 == 0x375 and fm1 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f21; dest:f8; op1val:0x375ffffffffffe00; valaddr_reg:x3;
val_offset:13*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f8, f21, dyn, 0, 0, x3, 13*FLEN/8, x4, x1, x2)

inst_14:
// rs1==f27, rd==f14,fs1 == 0 and fe1 == 0x376 and fm1 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f27; dest:f14; op1val:0x376fffffffffff00; valaddr_reg:x3;
val_offset:14*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f14, f27, dyn, 0, 0, x3, 14*FLEN/8, x4, x1, x2)

inst_15:
// rs1==f22, rd==f25,fs1 == 0 and fe1 == 0x377 and fm1 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f22; dest:f25; op1val:0x377fffffffffff80; valaddr_reg:x3;
val_offset:15*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f25, f22, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_16:
// rs1==f23, rd==f11,fs1 == 0 and fe1 == 0x378 and fm1 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f23; dest:f11; op1val:0x378fffffffffffc0; valaddr_reg:x3;
val_offset:16*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f11, f23, dyn, 0, 0, x3, 16*FLEN/8, x4, x1, x2)

inst_17:
// rs1==f1, rd==f21,fs1 == 0 and fe1 == 0x379 and fm1 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f1; dest:f21; op1val:0x379fffffffffffe0; valaddr_reg:x3;
val_offset:17*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f21, f1, dyn, 0, 0, x3, 17*FLEN/8, x4, x1, x2)

inst_18:
// rs1==f0, rd==f10,fs1 == 0 and fe1 == 0x37a and fm1 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f0; dest:f10; op1val:0x37affffffffffff0; valaddr_reg:x3;
val_offset:18*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f10, f0, dyn, 0, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_19:
// rs1==f2, rd==f27,fs1 == 0 and fe1 == 0x37b and fm1 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f2; dest:f27; op1val:0x37bffffffffffff8; valaddr_reg:x3;
val_offset:19*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f27, f2, dyn, 0, 0, x3, 19*FLEN/8, x4, x1, x2)

inst_20:
// rs1==f31, rd==f22,fs1 == 0 and fe1 == 0x37c and fm1 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f31; dest:f22; op1val:0x37cffffffffffffc; valaddr_reg:x3;
val_offset:20*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f22, f31, dyn, 0, 0, x3, 20*FLEN/8, x4, x1, x2)

inst_21:
// rs1==f14, rd==f31,fs1 == 0 and fe1 == 0x37d and fm1 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f14; dest:f31; op1val:0x37d0000000000000; valaddr_reg:x3;
val_offset:21*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f14, dyn, 0, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_22:
// rs1==f10, rd==f0,fs1 == 0 and fe1 == 0x37d and fm1 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f10; dest:f0; op1val:0x37d8000000000000; valaddr_reg:x3;
val_offset:22*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f0, f10, dyn, 0, 0, x3, 22*FLEN/8, x4, x1, x2)

inst_23:
// rs1==f30, rd==f29,fs1 == 0 and fe1 == 0x37d and fm1 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f29; op1val:0x37dc000000000000; valaddr_reg:x3;
val_offset:23*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f29, f30, dyn, 0, 0, x3, 23*FLEN/8, x4, x1, x2)

inst_24:
// rs1==f20, rd==f6,fs1 == 0 and fe1 == 0x37d and fm1 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f20; dest:f6; op1val:0x37de000000000000; valaddr_reg:x3;
val_offset:24*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f6, f20, dyn, 0, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_25:
// rs1==f13, rd==f23,fs1 == 0 and fe1 == 0x37d and fm1 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f13; dest:f23; op1val:0x37df000000000000; valaddr_reg:x3;
val_offset:25*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f23, f13, dyn, 0, 0, x3, 25*FLEN/8, x4, x1, x2)

inst_26:
// rs1==f19, rd==f9,fs1 == 0 and fe1 == 0x37d and fm1 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f19; dest:f9; op1val:0x37df800000000000; valaddr_reg:x3;
val_offset:26*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f9, f19, dyn, 0, 0, x3, 26*FLEN/8, x4, x1, x2)

inst_27:
// rs1==f4, rd==f12,fs1 == 0 and fe1 == 0x37d and fm1 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f4; dest:f12; op1val:0x37dfc00000000000; valaddr_reg:x3;
val_offset:27*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f12, f4, dyn, 0, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_28:
// rs1==f15, rd==f18,fs1 == 0 and fe1 == 0x37d and fm1 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f15; dest:f18; op1val:0x37dfe00000000000; valaddr_reg:x3;
val_offset:28*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f18, f15, dyn, 0, 0, x3, 28*FLEN/8, x4, x1, x2)

inst_29:
// rs1==f17, rd==f28,fs1 == 0 and fe1 == 0x37d and fm1 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f17; dest:f28; op1val:0x37dff00000000000; valaddr_reg:x3;
val_offset:29*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f28, f17, dyn, 0, 0, x3, 29*FLEN/8, x4, x1, x2)

inst_30:
// rs1==f24, rd==f15,fs1 == 0 and fe1 == 0x37d and fm1 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f24; dest:f15; op1val:0x37dff80000000000; valaddr_reg:x3;
val_offset:30*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f15, f24, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_31:
// rs1==f7, rd==f24,fs1 == 0 and fe1 == 0x37d and fm1 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f7; dest:f24; op1val:0x37dffc0000000000; valaddr_reg:x3;
val_offset:31*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f24, f7, dyn, 0, 0, x3, 31*FLEN/8, x4, x1, x2)

inst_32:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffe0000000000; valaddr_reg:x3;
val_offset:32*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 32*FLEN/8, x4, x1, x2)

inst_33:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfff0000000000; valaddr_reg:x3;
val_offset:33*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_34:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfff8000000000; valaddr_reg:x3;
val_offset:34*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 34*FLEN/8, x4, x1, x2)

inst_35:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffc000000000; valaddr_reg:x3;
val_offset:35*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 35*FLEN/8, x4, x1, x2)

inst_36:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffe000000000; valaddr_reg:x3;
val_offset:36*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_37:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffff000000000; valaddr_reg:x3;
val_offset:37*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 37*FLEN/8, x4, x1, x2)

inst_38:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffff800000000; valaddr_reg:x3;
val_offset:38*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 38*FLEN/8, x4, x1, x2)

inst_39:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffc00000000; valaddr_reg:x3;
val_offset:39*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_40:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffe00000000; valaddr_reg:x3;
val_offset:40*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 40*FLEN/8, x4, x1, x2)

inst_41:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffff00000000; valaddr_reg:x3;
val_offset:41*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 41*FLEN/8, x4, x1, x2)

inst_42:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffff80000000; valaddr_reg:x3;
val_offset:42*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_43:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffc0000000; valaddr_reg:x3;
val_offset:43*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 43*FLEN/8, x4, x1, x2)

inst_44:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffe0000000; valaddr_reg:x3;
val_offset:44*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 44*FLEN/8, x4, x1, x2)

inst_45:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffff0000000; valaddr_reg:x3;
val_offset:45*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_46:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffff8000000; valaddr_reg:x3;
val_offset:46*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 46*FLEN/8, x4, x1, x2)

inst_47:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffc000000; valaddr_reg:x3;
val_offset:47*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 47*FLEN/8, x4, x1, x2)

inst_48:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffe000000; valaddr_reg:x3;
val_offset:48*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_49:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffff000000; valaddr_reg:x3;
val_offset:49*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 49*FLEN/8, x4, x1, x2)

inst_50:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffff800000; valaddr_reg:x3;
val_offset:50*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 50*FLEN/8, x4, x1, x2)

inst_51:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffc00000; valaddr_reg:x3;
val_offset:51*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_52:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffe00000; valaddr_reg:x3;
val_offset:52*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 52*FLEN/8, x4, x1, x2)

inst_53:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffff00000; valaddr_reg:x3;
val_offset:53*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 53*FLEN/8, x4, x1, x2)

inst_54:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffff80000; valaddr_reg:x3;
val_offset:54*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_55:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffc0000; valaddr_reg:x3;
val_offset:55*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 55*FLEN/8, x4, x1, x2)

inst_56:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffe0000; valaddr_reg:x3;
val_offset:56*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 56*FLEN/8, x4, x1, x2)

inst_57:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffff0000; valaddr_reg:x3;
val_offset:57*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_58:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffff8000; valaddr_reg:x3;
val_offset:58*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 58*FLEN/8, x4, x1, x2)

inst_59:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffffc000; valaddr_reg:x3;
val_offset:59*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 59*FLEN/8, x4, x1, x2)

inst_60:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffffe000; valaddr_reg:x3;
val_offset:60*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)

inst_61:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffff000; valaddr_reg:x3;
val_offset:61*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 61*FLEN/8, x4, x1, x2)

inst_62:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffff800; valaddr_reg:x3;
val_offset:62*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 62*FLEN/8, x4, x1, x2)

inst_63:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffffc00; valaddr_reg:x3;
val_offset:63*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 63*FLEN/8, x4, x1, x2)

inst_64:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffffe00; valaddr_reg:x3;
val_offset:64*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 64*FLEN/8, x4, x1, x2)

inst_65:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffffff00; valaddr_reg:x3;
val_offset:65*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 65*FLEN/8, x4, x1, x2)

inst_66:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffffff80; valaddr_reg:x3;
val_offset:66*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 66*FLEN/8, x4, x1, x2)

inst_67:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffffffc0; valaddr_reg:x3;
val_offset:67*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 67*FLEN/8, x4, x1, x2)

inst_68:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dfffffffffffe0; valaddr_reg:x3;
val_offset:68*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 68*FLEN/8, x4, x1, x2)

inst_69:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffffff0; valaddr_reg:x3;
val_offset:69*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 69*FLEN/8, x4, x1, x2)

inst_70:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffffff8; valaddr_reg:x3;
val_offset:70*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 70*FLEN/8, x4, x1, x2)

inst_71:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffffffc; valaddr_reg:x3;
val_offset:71*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 71*FLEN/8, x4, x1, x2)

inst_72:
// fs1 == 0 and fe1 == 0x37d and fm1 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37dffffffffffffe; valaddr_reg:x3;
val_offset:72*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 72*FLEN/8, x4, x1, x2)

inst_73:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000000000; valaddr_reg:x3;
val_offset:73*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 73*FLEN/8, x4, x1, x2)

inst_74:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000000001; valaddr_reg:x3;
val_offset:74*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 74*FLEN/8, x4, x1, x2)

inst_75:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000000003; valaddr_reg:x3;
val_offset:75*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 75*FLEN/8, x4, x1, x2)

inst_76:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000000007; valaddr_reg:x3;
val_offset:76*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 76*FLEN/8, x4, x1, x2)

inst_77:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000000000f; valaddr_reg:x3;
val_offset:77*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 77*FLEN/8, x4, x1, x2)

inst_78:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000000001f; valaddr_reg:x3;
val_offset:78*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 78*FLEN/8, x4, x1, x2)

inst_79:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000000003f; valaddr_reg:x3;
val_offset:79*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 79*FLEN/8, x4, x1, x2)

inst_80:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000000007f; valaddr_reg:x3;
val_offset:80*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 80*FLEN/8, x4, x1, x2)

inst_81:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000000000ff; valaddr_reg:x3;
val_offset:81*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 81*FLEN/8, x4, x1, x2)

inst_82:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000000001ff; valaddr_reg:x3;
val_offset:82*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 82*FLEN/8, x4, x1, x2)

inst_83:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000000003ff; valaddr_reg:x3;
val_offset:83*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 83*FLEN/8, x4, x1, x2)

inst_84:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000000007ff; valaddr_reg:x3;
val_offset:84*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 84*FLEN/8, x4, x1, x2)

inst_85:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000000fff; valaddr_reg:x3;
val_offset:85*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 85*FLEN/8, x4, x1, x2)

inst_86:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000001fff; valaddr_reg:x3;
val_offset:86*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 86*FLEN/8, x4, x1, x2)

inst_87:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000003fff; valaddr_reg:x3;
val_offset:87*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 87*FLEN/8, x4, x1, x2)

inst_88:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000007fff; valaddr_reg:x3;
val_offset:88*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 88*FLEN/8, x4, x1, x2)

inst_89:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000000ffff; valaddr_reg:x3;
val_offset:89*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 89*FLEN/8, x4, x1, x2)

inst_90:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000001ffff; valaddr_reg:x3;
val_offset:90*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 90*FLEN/8, x4, x1, x2)

inst_91:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000003ffff; valaddr_reg:x3;
val_offset:91*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 91*FLEN/8, x4, x1, x2)

inst_92:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000007ffff; valaddr_reg:x3;
val_offset:92*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 92*FLEN/8, x4, x1, x2)

inst_93:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000000fffff; valaddr_reg:x3;
val_offset:93*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 93*FLEN/8, x4, x1, x2)

inst_94:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000001fffff; valaddr_reg:x3;
val_offset:94*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 94*FLEN/8, x4, x1, x2)

inst_95:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000003fffff; valaddr_reg:x3;
val_offset:95*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 95*FLEN/8, x4, x1, x2)

inst_96:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000007fffff; valaddr_reg:x3;
val_offset:96*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 96*FLEN/8, x4, x1, x2)

inst_97:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000000ffffff; valaddr_reg:x3;
val_offset:97*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 97*FLEN/8, x4, x1, x2)

inst_98:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000001ffffff; valaddr_reg:x3;
val_offset:98*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 98*FLEN/8, x4, x1, x2)

inst_99:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000003ffffff; valaddr_reg:x3;
val_offset:99*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 99*FLEN/8, x4, x1, x2)

inst_100:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000007ffffff; valaddr_reg:x3;
val_offset:100*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 100*FLEN/8, x4, x1, x2)

inst_101:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000000fffffff; valaddr_reg:x3;
val_offset:101*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 101*FLEN/8, x4, x1, x2)

inst_102:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000001fffffff; valaddr_reg:x3;
val_offset:102*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 102*FLEN/8, x4, x1, x2)

inst_103:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000003fffffff; valaddr_reg:x3;
val_offset:103*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 103*FLEN/8, x4, x1, x2)

inst_104:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000007fffffff; valaddr_reg:x3;
val_offset:104*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 104*FLEN/8, x4, x1, x2)

inst_105:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00000ffffffff; valaddr_reg:x3;
val_offset:105*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 105*FLEN/8, x4, x1, x2)

inst_106:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00001ffffffff; valaddr_reg:x3;
val_offset:106*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 106*FLEN/8, x4, x1, x2)

inst_107:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00003ffffffff; valaddr_reg:x3;
val_offset:107*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 107*FLEN/8, x4, x1, x2)

inst_108:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00007ffffffff; valaddr_reg:x3;
val_offset:108*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 108*FLEN/8, x4, x1, x2)

inst_109:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0000fffffffff; valaddr_reg:x3;
val_offset:109*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 109*FLEN/8, x4, x1, x2)

inst_110:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0001fffffffff; valaddr_reg:x3;
val_offset:110*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 110*FLEN/8, x4, x1, x2)

inst_111:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0003fffffffff; valaddr_reg:x3;
val_offset:111*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 111*FLEN/8, x4, x1, x2)

inst_112:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0007fffffffff; valaddr_reg:x3;
val_offset:112*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 112*FLEN/8, x4, x1, x2)

inst_113:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e000ffffffffff; valaddr_reg:x3;
val_offset:113*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 113*FLEN/8, x4, x1, x2)

inst_114:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e001ffffffffff; valaddr_reg:x3;
val_offset:114*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 114*FLEN/8, x4, x1, x2)

inst_115:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e003ffffffffff; valaddr_reg:x3;
val_offset:115*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 115*FLEN/8, x4, x1, x2)

inst_116:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e007ffffffffff; valaddr_reg:x3;
val_offset:116*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 116*FLEN/8, x4, x1, x2)

inst_117:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e00fffffffffff; valaddr_reg:x3;
val_offset:117*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 117*FLEN/8, x4, x1, x2)

inst_118:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e01fffffffffff; valaddr_reg:x3;
val_offset:118*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 118*FLEN/8, x4, x1, x2)

inst_119:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e03fffffffffff; valaddr_reg:x3;
val_offset:119*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 119*FLEN/8, x4, x1, x2)

inst_120:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e07fffffffffff; valaddr_reg:x3;
val_offset:120*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 120*FLEN/8, x4, x1, x2)

inst_121:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e0ffffffffffff; valaddr_reg:x3;
val_offset:121*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 121*FLEN/8, x4, x1, x2)

inst_122:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e1ffffffffffff; valaddr_reg:x3;
val_offset:122*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 122*FLEN/8, x4, x1, x2)

inst_123:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e3ffffffffffff; valaddr_reg:x3;
val_offset:123*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 123*FLEN/8, x4, x1, x2)

inst_124:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e7ffffffffffff; valaddr_reg:x3;
val_offset:124*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 124*FLEN/8, x4, x1, x2)

inst_125:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37e8000000000000; valaddr_reg:x3;
val_offset:125*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 125*FLEN/8, x4, x1, x2)

inst_126:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37ec000000000000; valaddr_reg:x3;
val_offset:126*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 126*FLEN/8, x4, x1, x2)

inst_127:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37ee000000000000; valaddr_reg:x3;
val_offset:127*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_128:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37ef000000000000; valaddr_reg:x3;
val_offset:128*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 128*FLEN/8, x4, x1, x2)

inst_129:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37ef800000000000; valaddr_reg:x3;
val_offset:129*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 129*FLEN/8, x4, x1, x2)

inst_130:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efc00000000000; valaddr_reg:x3;
val_offset:130*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 130*FLEN/8, x4, x1, x2)

inst_131:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efe00000000000; valaddr_reg:x3;
val_offset:131*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 131*FLEN/8, x4, x1, x2)

inst_132:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37eff00000000000; valaddr_reg:x3;
val_offset:132*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 132*FLEN/8, x4, x1, x2)

inst_133:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37eff80000000000; valaddr_reg:x3;
val_offset:133*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 133*FLEN/8, x4, x1, x2)

inst_134:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effc0000000000; valaddr_reg:x3;
val_offset:134*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 134*FLEN/8, x4, x1, x2)

inst_135:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effe0000000000; valaddr_reg:x3;
val_offset:135*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 135*FLEN/8, x4, x1, x2)

inst_136:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efff0000000000; valaddr_reg:x3;
val_offset:136*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 136*FLEN/8, x4, x1, x2)

inst_137:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efff8000000000; valaddr_reg:x3;
val_offset:137*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 137*FLEN/8, x4, x1, x2)

inst_138:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffc000000000; valaddr_reg:x3;
val_offset:138*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 138*FLEN/8, x4, x1, x2)

inst_139:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffe000000000; valaddr_reg:x3;
val_offset:139*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 139*FLEN/8, x4, x1, x2)

inst_140:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effff000000000; valaddr_reg:x3;
val_offset:140*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 140*FLEN/8, x4, x1, x2)

inst_141:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effff800000000; valaddr_reg:x3;
val_offset:141*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 141*FLEN/8, x4, x1, x2)

inst_142:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffc00000000; valaddr_reg:x3;
val_offset:142*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 142*FLEN/8, x4, x1, x2)

inst_143:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffe00000000; valaddr_reg:x3;
val_offset:143*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 143*FLEN/8, x4, x1, x2)

inst_144:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffff00000000; valaddr_reg:x3;
val_offset:144*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 144*FLEN/8, x4, x1, x2)

inst_145:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffff80000000; valaddr_reg:x3;
val_offset:145*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 145*FLEN/8, x4, x1, x2)

inst_146:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffc0000000; valaddr_reg:x3;
val_offset:146*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 146*FLEN/8, x4, x1, x2)

inst_147:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffe0000000; valaddr_reg:x3;
val_offset:147*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 147*FLEN/8, x4, x1, x2)

inst_148:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffff0000000; valaddr_reg:x3;
val_offset:148*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 148*FLEN/8, x4, x1, x2)

inst_149:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffff8000000; valaddr_reg:x3;
val_offset:149*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 149*FLEN/8, x4, x1, x2)

inst_150:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffc000000; valaddr_reg:x3;
val_offset:150*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 150*FLEN/8, x4, x1, x2)

inst_151:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffe000000; valaddr_reg:x3;
val_offset:151*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 151*FLEN/8, x4, x1, x2)

inst_152:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffff000000; valaddr_reg:x3;
val_offset:152*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 152*FLEN/8, x4, x1, x2)

inst_153:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffff800000; valaddr_reg:x3;
val_offset:153*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 153*FLEN/8, x4, x1, x2)

inst_154:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffc00000; valaddr_reg:x3;
val_offset:154*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 154*FLEN/8, x4, x1, x2)

inst_155:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffe00000; valaddr_reg:x3;
val_offset:155*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 155*FLEN/8, x4, x1, x2)

inst_156:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffff00000; valaddr_reg:x3;
val_offset:156*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 156*FLEN/8, x4, x1, x2)

inst_157:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffff80000; valaddr_reg:x3;
val_offset:157*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 157*FLEN/8, x4, x1, x2)

inst_158:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffc0000; valaddr_reg:x3;
val_offset:158*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 158*FLEN/8, x4, x1, x2)

inst_159:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffe0000; valaddr_reg:x3;
val_offset:159*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 159*FLEN/8, x4, x1, x2)

inst_160:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffff0000; valaddr_reg:x3;
val_offset:160*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 160*FLEN/8, x4, x1, x2)

inst_161:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffff8000; valaddr_reg:x3;
val_offset:161*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 161*FLEN/8, x4, x1, x2)

inst_162:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffc000; valaddr_reg:x3;
val_offset:162*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 162*FLEN/8, x4, x1, x2)

inst_163:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffe000; valaddr_reg:x3;
val_offset:163*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 163*FLEN/8, x4, x1, x2)

inst_164:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffff000; valaddr_reg:x3;
val_offset:164*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 164*FLEN/8, x4, x1, x2)

inst_165:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffff800; valaddr_reg:x3;
val_offset:165*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 165*FLEN/8, x4, x1, x2)

inst_166:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffffc00; valaddr_reg:x3;
val_offset:166*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 166*FLEN/8, x4, x1, x2)

inst_167:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffffe00; valaddr_reg:x3;
val_offset:167*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 167*FLEN/8, x4, x1, x2)

inst_168:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffff00; valaddr_reg:x3;
val_offset:168*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 168*FLEN/8, x4, x1, x2)

inst_169:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffff80; valaddr_reg:x3;
val_offset:169*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 169*FLEN/8, x4, x1, x2)

inst_170:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffffc0; valaddr_reg:x3;
val_offset:170*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 170*FLEN/8, x4, x1, x2)

inst_171:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffffe0; valaddr_reg:x3;
val_offset:171*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 171*FLEN/8, x4, x1, x2)

inst_172:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffffff0; valaddr_reg:x3;
val_offset:172*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 172*FLEN/8, x4, x1, x2)

inst_173:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffffff8; valaddr_reg:x3;
val_offset:173*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 173*FLEN/8, x4, x1, x2)

inst_174:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffffffc; valaddr_reg:x3;
val_offset:174*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 174*FLEN/8, x4, x1, x2)

inst_175:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37effffffffffffe; valaddr_reg:x3;
val_offset:175*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 175*FLEN/8, x4, x1, x2)

inst_176:
// fs1 == 0 and fe1 == 0x37e and fm1 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x37efffffffffffff; valaddr_reg:x3;
val_offset:176*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 176*FLEN/8, x4, x1, x2)

inst_177:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000000; valaddr_reg:x3;
val_offset:177*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 177*FLEN/8, x4, x1, x2)

inst_178:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000002 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000002; valaddr_reg:x3;
val_offset:178*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 178*FLEN/8, x4, x1, x2)

inst_179:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000004 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000004; valaddr_reg:x3;
val_offset:179*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 179*FLEN/8, x4, x1, x2)

inst_180:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000008 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000008; valaddr_reg:x3;
val_offset:180*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 180*FLEN/8, x4, x1, x2)

inst_181:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000010 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000010; valaddr_reg:x3;
val_offset:181*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 181*FLEN/8, x4, x1, x2)

inst_182:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000020 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000020; valaddr_reg:x3;
val_offset:182*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 182*FLEN/8, x4, x1, x2)

inst_183:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000040 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000040; valaddr_reg:x3;
val_offset:183*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 183*FLEN/8, x4, x1, x2)

inst_184:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000080 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000080; valaddr_reg:x3;
val_offset:184*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 184*FLEN/8, x4, x1, x2)

inst_185:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000100 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000100; valaddr_reg:x3;
val_offset:185*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 185*FLEN/8, x4, x1, x2)

inst_186:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000200 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000200; valaddr_reg:x3;
val_offset:186*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 186*FLEN/8, x4, x1, x2)

inst_187:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000400 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000400; valaddr_reg:x3;
val_offset:187*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 187*FLEN/8, x4, x1, x2)

inst_188:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000000800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000000800; valaddr_reg:x3;
val_offset:188*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 188*FLEN/8, x4, x1, x2)

inst_189:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000001000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000001000; valaddr_reg:x3;
val_offset:189*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 189*FLEN/8, x4, x1, x2)

inst_190:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000002000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000002000; valaddr_reg:x3;
val_offset:190*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 190*FLEN/8, x4, x1, x2)

inst_191:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000004000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000004000; valaddr_reg:x3;
val_offset:191*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 191*FLEN/8, x4, x1, x2)

inst_192:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000008000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000008000; valaddr_reg:x3;
val_offset:192*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 192*FLEN/8, x4, x1, x2)

inst_193:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000010000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000010000; valaddr_reg:x3;
val_offset:193*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 193*FLEN/8, x4, x1, x2)

inst_194:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000020000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000020000; valaddr_reg:x3;
val_offset:194*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 194*FLEN/8, x4, x1, x2)

inst_195:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000040000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000040000; valaddr_reg:x3;
val_offset:195*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 195*FLEN/8, x4, x1, x2)

inst_196:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000080000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000080000; valaddr_reg:x3;
val_offset:196*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 196*FLEN/8, x4, x1, x2)

inst_197:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000100000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000100000; valaddr_reg:x3;
val_offset:197*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 197*FLEN/8, x4, x1, x2)

inst_198:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000200000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000200000; valaddr_reg:x3;
val_offset:198*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 198*FLEN/8, x4, x1, x2)

inst_199:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000400000; valaddr_reg:x3;
val_offset:199*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 199*FLEN/8, x4, x1, x2)

inst_200:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000000800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000000800000; valaddr_reg:x3;
val_offset:200*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 200*FLEN/8, x4, x1, x2)

inst_201:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000001000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000001000000; valaddr_reg:x3;
val_offset:201*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 201*FLEN/8, x4, x1, x2)

inst_202:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000002000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000002000000; valaddr_reg:x3;
val_offset:202*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 202*FLEN/8, x4, x1, x2)

inst_203:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000004000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000004000000; valaddr_reg:x3;
val_offset:203*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 203*FLEN/8, x4, x1, x2)

inst_204:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000008000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000008000000; valaddr_reg:x3;
val_offset:204*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 204*FLEN/8, x4, x1, x2)

inst_205:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000010000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000010000000; valaddr_reg:x3;
val_offset:205*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 205*FLEN/8, x4, x1, x2)

inst_206:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000020000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000020000000; valaddr_reg:x3;
val_offset:206*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 206*FLEN/8, x4, x1, x2)

inst_207:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000040000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000040000000; valaddr_reg:x3;
val_offset:207*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 207*FLEN/8, x4, x1, x2)

inst_208:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000080000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000080000000; valaddr_reg:x3;
val_offset:208*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 208*FLEN/8, x4, x1, x2)

inst_209:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000100000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000100000000; valaddr_reg:x3;
val_offset:209*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 209*FLEN/8, x4, x1, x2)

inst_210:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000200000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000200000000; valaddr_reg:x3;
val_offset:210*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 210*FLEN/8, x4, x1, x2)

inst_211:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000400000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000400000000; valaddr_reg:x3;
val_offset:211*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 211*FLEN/8, x4, x1, x2)

inst_212:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe000800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe000800000000; valaddr_reg:x3;
val_offset:212*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 212*FLEN/8, x4, x1, x2)

inst_213:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe001000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe001000000000; valaddr_reg:x3;
val_offset:213*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 213*FLEN/8, x4, x1, x2)

inst_214:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe002000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe002000000000; valaddr_reg:x3;
val_offset:214*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 214*FLEN/8, x4, x1, x2)

inst_215:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe004000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe004000000000; valaddr_reg:x3;
val_offset:215*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 215*FLEN/8, x4, x1, x2)

inst_216:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe008000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe008000000000; valaddr_reg:x3;
val_offset:216*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 216*FLEN/8, x4, x1, x2)

inst_217:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe010000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe010000000000; valaddr_reg:x3;
val_offset:217*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 217*FLEN/8, x4, x1, x2)

inst_218:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe020000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe020000000000; valaddr_reg:x3;
val_offset:218*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 218*FLEN/8, x4, x1, x2)

inst_219:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe040000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe040000000000; valaddr_reg:x3;
val_offset:219*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 219*FLEN/8, x4, x1, x2)

inst_220:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe080000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe080000000000; valaddr_reg:x3;
val_offset:220*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 220*FLEN/8, x4, x1, x2)

inst_221:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe100000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe100000000000; valaddr_reg:x3;
val_offset:221*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 221*FLEN/8, x4, x1, x2)

inst_222:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe200000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe200000000000; valaddr_reg:x3;
val_offset:222*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 222*FLEN/8, x4, x1, x2)

inst_223:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe400000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe400000000000; valaddr_reg:x3;
val_offset:223*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 223*FLEN/8, x4, x1, x2)

inst_224:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xe800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffe800000000000; valaddr_reg:x3;
val_offset:224*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 224*FLEN/8, x4, x1, x2)

inst_225:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fff000000000000; valaddr_reg:x3;
val_offset:225*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 225*FLEN/8, x4, x1, x2)

inst_226:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fff800000000000; valaddr_reg:x3;
val_offset:226*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 226*FLEN/8, x4, x1, x2)

inst_227:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffc00000000000; valaddr_reg:x3;
val_offset:227*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 227*FLEN/8, x4, x1, x2)

inst_228:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffe00000000000; valaddr_reg:x3;
val_offset:228*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 228*FLEN/8, x4, x1, x2)

inst_229:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffff00000000000; valaddr_reg:x3;
val_offset:229*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 229*FLEN/8, x4, x1, x2)

inst_230:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffff80000000000; valaddr_reg:x3;
val_offset:230*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 230*FLEN/8, x4, x1, x2)

inst_231:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffc0000000000; valaddr_reg:x3;
val_offset:231*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 231*FLEN/8, x4, x1, x2)

inst_232:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffe0000000000; valaddr_reg:x3;
val_offset:232*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 232*FLEN/8, x4, x1, x2)

inst_233:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffff0000000000; valaddr_reg:x3;
val_offset:233*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 233*FLEN/8, x4, x1, x2)

inst_234:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffff8000000000; valaddr_reg:x3;
val_offset:234*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 234*FLEN/8, x4, x1, x2)

inst_235:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffc000000000; valaddr_reg:x3;
val_offset:235*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 235*FLEN/8, x4, x1, x2)

inst_236:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffe000000000; valaddr_reg:x3;
val_offset:236*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 236*FLEN/8, x4, x1, x2)

inst_237:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffff000000000; valaddr_reg:x3;
val_offset:237*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 237*FLEN/8, x4, x1, x2)

inst_238:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffff800000000; valaddr_reg:x3;
val_offset:238*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 238*FLEN/8, x4, x1, x2)

inst_239:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffc00000000; valaddr_reg:x3;
val_offset:239*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 239*FLEN/8, x4, x1, x2)

inst_240:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffe00000000; valaddr_reg:x3;
val_offset:240*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 240*FLEN/8, x4, x1, x2)

inst_241:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffff00000000; valaddr_reg:x3;
val_offset:241*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 241*FLEN/8, x4, x1, x2)

inst_242:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffff80000000; valaddr_reg:x3;
val_offset:242*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 242*FLEN/8, x4, x1, x2)

inst_243:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffc0000000; valaddr_reg:x3;
val_offset:243*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 243*FLEN/8, x4, x1, x2)

inst_244:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffe0000000; valaddr_reg:x3;
val_offset:244*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 244*FLEN/8, x4, x1, x2)

inst_245:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffff0000000; valaddr_reg:x3;
val_offset:245*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 245*FLEN/8, x4, x1, x2)

inst_246:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffff8000000; valaddr_reg:x3;
val_offset:246*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 246*FLEN/8, x4, x1, x2)

inst_247:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffc000000; valaddr_reg:x3;
val_offset:247*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 247*FLEN/8, x4, x1, x2)

inst_248:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffe000000; valaddr_reg:x3;
val_offset:248*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 248*FLEN/8, x4, x1, x2)

inst_249:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffff000000; valaddr_reg:x3;
val_offset:249*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 249*FLEN/8, x4, x1, x2)

inst_250:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffff800000; valaddr_reg:x3;
val_offset:250*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 250*FLEN/8, x4, x1, x2)

inst_251:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffc00000; valaddr_reg:x3;
val_offset:251*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 251*FLEN/8, x4, x1, x2)

inst_252:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffe00000; valaddr_reg:x3;
val_offset:252*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 252*FLEN/8, x4, x1, x2)

inst_253:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffff00000; valaddr_reg:x3;
val_offset:253*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 253*FLEN/8, x4, x1, x2)

inst_254:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffff80000; valaddr_reg:x3;
val_offset:254*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 254*FLEN/8, x4, x1, x2)

inst_255:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffc0000; valaddr_reg:x3;
val_offset:255*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_256:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffe0000; valaddr_reg:x3;
val_offset:256*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 256*FLEN/8, x4, x1, x2)

inst_257:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffff0000; valaddr_reg:x3;
val_offset:257*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 257*FLEN/8, x4, x1, x2)

inst_258:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffff8000; valaddr_reg:x3;
val_offset:258*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 258*FLEN/8, x4, x1, x2)

inst_259:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffc000; valaddr_reg:x3;
val_offset:259*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 259*FLEN/8, x4, x1, x2)

inst_260:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffe000; valaddr_reg:x3;
val_offset:260*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 260*FLEN/8, x4, x1, x2)

inst_261:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffff000; valaddr_reg:x3;
val_offset:261*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 261*FLEN/8, x4, x1, x2)

inst_262:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffff800; valaddr_reg:x3;
val_offset:262*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 262*FLEN/8, x4, x1, x2)

inst_263:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffffc00; valaddr_reg:x3;
val_offset:263*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 263*FLEN/8, x4, x1, x2)

inst_264:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffffe00; valaddr_reg:x3;
val_offset:264*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 264*FLEN/8, x4, x1, x2)

inst_265:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffff00; valaddr_reg:x3;
val_offset:265*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 265*FLEN/8, x4, x1, x2)

inst_266:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffff80; valaddr_reg:x3;
val_offset:266*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 266*FLEN/8, x4, x1, x2)

inst_267:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffffc0; valaddr_reg:x3;
val_offset:267*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 267*FLEN/8, x4, x1, x2)

inst_268:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffffe0; valaddr_reg:x3;
val_offset:268*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 268*FLEN/8, x4, x1, x2)

inst_269:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffffff0; valaddr_reg:x3;
val_offset:269*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 269*FLEN/8, x4, x1, x2)

inst_270:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffffff8; valaddr_reg:x3;
val_offset:270*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 270*FLEN/8, x4, x1, x2)

inst_271:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffffffc; valaddr_reg:x3;
val_offset:271*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 271*FLEN/8, x4, x1, x2)

inst_272:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3ffffffffffffffe; valaddr_reg:x3;
val_offset:272*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 272*FLEN/8, x4, x1, x2)

inst_273:
// fs1 == 0 and fe1 == 0x3ff and fm1 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x3fffffffffffffff; valaddr_reg:x3;
val_offset:273*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 273*FLEN/8, x4, x1, x2)

inst_274:
// fs1 == 0 and fe1 == 0x400 and fm1 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x4000000000000000; valaddr_reg:x3;
val_offset:274*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 274*FLEN/8, x4, x1, x2)

inst_275:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000000; valaddr_reg:x3;
val_offset:275*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 275*FLEN/8, x4, x1, x2)

inst_276:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000002 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000002; valaddr_reg:x3;
val_offset:276*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 276*FLEN/8, x4, x1, x2)

inst_277:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000004 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000004; valaddr_reg:x3;
val_offset:277*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 277*FLEN/8, x4, x1, x2)

inst_278:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000008 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000008; valaddr_reg:x3;
val_offset:278*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 278*FLEN/8, x4, x1, x2)

inst_279:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000010 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000010; valaddr_reg:x3;
val_offset:279*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 279*FLEN/8, x4, x1, x2)

inst_280:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000020 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000020; valaddr_reg:x3;
val_offset:280*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 280*FLEN/8, x4, x1, x2)

inst_281:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000040 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000040; valaddr_reg:x3;
val_offset:281*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 281*FLEN/8, x4, x1, x2)

inst_282:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000080 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000080; valaddr_reg:x3;
val_offset:282*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 282*FLEN/8, x4, x1, x2)

inst_283:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000100 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000100; valaddr_reg:x3;
val_offset:283*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 283*FLEN/8, x4, x1, x2)

inst_284:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000200 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000200; valaddr_reg:x3;
val_offset:284*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 284*FLEN/8, x4, x1, x2)

inst_285:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000400 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000400; valaddr_reg:x3;
val_offset:285*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 285*FLEN/8, x4, x1, x2)

inst_286:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000000800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000000800; valaddr_reg:x3;
val_offset:286*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 286*FLEN/8, x4, x1, x2)

inst_287:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000001000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000001000; valaddr_reg:x3;
val_offset:287*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 287*FLEN/8, x4, x1, x2)

inst_288:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000002000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000002000; valaddr_reg:x3;
val_offset:288*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 288*FLEN/8, x4, x1, x2)

inst_289:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000004000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000004000; valaddr_reg:x3;
val_offset:289*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 289*FLEN/8, x4, x1, x2)

inst_290:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000008000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000008000; valaddr_reg:x3;
val_offset:290*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 290*FLEN/8, x4, x1, x2)

inst_291:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000010000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000010000; valaddr_reg:x3;
val_offset:291*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 291*FLEN/8, x4, x1, x2)

inst_292:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000020000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000020000; valaddr_reg:x3;
val_offset:292*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 292*FLEN/8, x4, x1, x2)

inst_293:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000040000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000040000; valaddr_reg:x3;
val_offset:293*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 293*FLEN/8, x4, x1, x2)

inst_294:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000080000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000080000; valaddr_reg:x3;
val_offset:294*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 294*FLEN/8, x4, x1, x2)

inst_295:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000100000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000100000; valaddr_reg:x3;
val_offset:295*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 295*FLEN/8, x4, x1, x2)

inst_296:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000200000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000200000; valaddr_reg:x3;
val_offset:296*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 296*FLEN/8, x4, x1, x2)

inst_297:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000400000; valaddr_reg:x3;
val_offset:297*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 297*FLEN/8, x4, x1, x2)

inst_298:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000000800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000000800000; valaddr_reg:x3;
val_offset:298*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 298*FLEN/8, x4, x1, x2)

inst_299:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000001000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000001000000; valaddr_reg:x3;
val_offset:299*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 299*FLEN/8, x4, x1, x2)

inst_300:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000002000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000002000000; valaddr_reg:x3;
val_offset:300*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 300*FLEN/8, x4, x1, x2)

inst_301:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000004000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000004000000; valaddr_reg:x3;
val_offset:301*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 301*FLEN/8, x4, x1, x2)

inst_302:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000008000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000008000000; valaddr_reg:x3;
val_offset:302*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 302*FLEN/8, x4, x1, x2)

inst_303:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000010000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000010000000; valaddr_reg:x3;
val_offset:303*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 303*FLEN/8, x4, x1, x2)

inst_304:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000020000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000020000000; valaddr_reg:x3;
val_offset:304*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 304*FLEN/8, x4, x1, x2)

inst_305:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000040000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000040000000; valaddr_reg:x3;
val_offset:305*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 305*FLEN/8, x4, x1, x2)

inst_306:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000080000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000080000000; valaddr_reg:x3;
val_offset:306*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 306*FLEN/8, x4, x1, x2)

inst_307:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000100000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000100000000; valaddr_reg:x3;
val_offset:307*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 307*FLEN/8, x4, x1, x2)

inst_308:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000200000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000200000000; valaddr_reg:x3;
val_offset:308*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 308*FLEN/8, x4, x1, x2)

inst_309:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000400000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000400000000; valaddr_reg:x3;
val_offset:309*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 309*FLEN/8, x4, x1, x2)

inst_310:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc000800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc000800000000; valaddr_reg:x3;
val_offset:310*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 310*FLEN/8, x4, x1, x2)

inst_311:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc001000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc001000000000; valaddr_reg:x3;
val_offset:311*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 311*FLEN/8, x4, x1, x2)

inst_312:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc002000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc002000000000; valaddr_reg:x3;
val_offset:312*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 312*FLEN/8, x4, x1, x2)

inst_313:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc004000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc004000000000; valaddr_reg:x3;
val_offset:313*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 313*FLEN/8, x4, x1, x2)

inst_314:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc008000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc008000000000; valaddr_reg:x3;
val_offset:314*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 314*FLEN/8, x4, x1, x2)

inst_315:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc010000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc010000000000; valaddr_reg:x3;
val_offset:315*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 315*FLEN/8, x4, x1, x2)

inst_316:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc020000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc020000000000; valaddr_reg:x3;
val_offset:316*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 316*FLEN/8, x4, x1, x2)

inst_317:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc040000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc040000000000; valaddr_reg:x3;
val_offset:317*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 317*FLEN/8, x4, x1, x2)

inst_318:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc080000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc080000000000; valaddr_reg:x3;
val_offset:318*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 318*FLEN/8, x4, x1, x2)

inst_319:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc100000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc100000000000; valaddr_reg:x3;
val_offset:319*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 319*FLEN/8, x4, x1, x2)

inst_320:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc200000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc200000000000; valaddr_reg:x3;
val_offset:320*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 320*FLEN/8, x4, x1, x2)

inst_321:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc400000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc400000000000; valaddr_reg:x3;
val_offset:321*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 321*FLEN/8, x4, x1, x2)

inst_322:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc666666666666; valaddr_reg:x3;
val_offset:322*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 322*FLEN/8, x4, x1, x2)

inst_323:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc800000000000; valaddr_reg:x3;
val_offset:323*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 323*FLEN/8, x4, x1, x2)

inst_324:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xc924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fc924924924924; valaddr_reg:x3;
val_offset:324*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 324*FLEN/8, x4, x1, x2)

inst_325:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fccccccccccccc; valaddr_reg:x3;
val_offset:325*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 325*FLEN/8, x4, x1, x2)

inst_326:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xcdb6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fcdb6db6db6db6; valaddr_reg:x3;
val_offset:326*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 326*FLEN/8, x4, x1, x2)

inst_327:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xceeeeeeeeeeee and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fceeeeeeeeeeee; valaddr_reg:x3;
val_offset:327*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 327*FLEN/8, x4, x1, x2)

inst_328:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xd000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fd000000000000; valaddr_reg:x3;
val_offset:328*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 328*FLEN/8, x4, x1, x2)

inst_329:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xd111111111111 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fd111111111111; valaddr_reg:x3;
val_offset:329*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 329*FLEN/8, x4, x1, x2)

inst_330:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xd333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fd333333333333; valaddr_reg:x3;
val_offset:330*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 330*FLEN/8, x4, x1, x2)

inst_331:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xd6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fd6db6db6db6db; valaddr_reg:x3;
val_offset:331*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 331*FLEN/8, x4, x1, x2)

inst_332:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xd800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fd800000000000; valaddr_reg:x3;
val_offset:332*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 332*FLEN/8, x4, x1, x2)

inst_333:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xd99999999999a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fd99999999999a; valaddr_reg:x3;
val_offset:333*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 333*FLEN/8, x4, x1, x2)

inst_334:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdb6db6db6db6e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdb6db6db6db6e; valaddr_reg:x3;
val_offset:334*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 334*FLEN/8, x4, x1, x2)

inst_335:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdc00000000000; valaddr_reg:x3;
val_offset:335*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 335*FLEN/8, x4, x1, x2)

inst_336:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xde00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fde00000000000; valaddr_reg:x3;
val_offset:336*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 336*FLEN/8, x4, x1, x2)

inst_337:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdf00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdf00000000000; valaddr_reg:x3;
val_offset:337*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 337*FLEN/8, x4, x1, x2)

inst_338:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdf80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdf80000000000; valaddr_reg:x3;
val_offset:338*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 338*FLEN/8, x4, x1, x2)

inst_339:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfc0000000000; valaddr_reg:x3;
val_offset:339*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 339*FLEN/8, x4, x1, x2)

inst_340:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfe0000000000; valaddr_reg:x3;
val_offset:340*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 340*FLEN/8, x4, x1, x2)

inst_341:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdff0000000000; valaddr_reg:x3;
val_offset:341*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 341*FLEN/8, x4, x1, x2)

inst_342:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdff8000000000; valaddr_reg:x3;
val_offset:342*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 342*FLEN/8, x4, x1, x2)

inst_343:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffc000000000; valaddr_reg:x3;
val_offset:343*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 343*FLEN/8, x4, x1, x2)

inst_344:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffe000000000; valaddr_reg:x3;
val_offset:344*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 344*FLEN/8, x4, x1, x2)

inst_345:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfff000000000; valaddr_reg:x3;
val_offset:345*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 345*FLEN/8, x4, x1, x2)

inst_346:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfff800000000; valaddr_reg:x3;
val_offset:346*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 346*FLEN/8, x4, x1, x2)

inst_347:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffc00000000; valaddr_reg:x3;
val_offset:347*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 347*FLEN/8, x4, x1, x2)

inst_348:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffe00000000; valaddr_reg:x3;
val_offset:348*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 348*FLEN/8, x4, x1, x2)

inst_349:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffff00000000; valaddr_reg:x3;
val_offset:349*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 349*FLEN/8, x4, x1, x2)

inst_350:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffff80000000; valaddr_reg:x3;
val_offset:350*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 350*FLEN/8, x4, x1, x2)

inst_351:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffc0000000; valaddr_reg:x3;
val_offset:351*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 351*FLEN/8, x4, x1, x2)

inst_352:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffe0000000; valaddr_reg:x3;
val_offset:352*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 352*FLEN/8, x4, x1, x2)

inst_353:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffff0000000; valaddr_reg:x3;
val_offset:353*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 353*FLEN/8, x4, x1, x2)

inst_354:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffff8000000; valaddr_reg:x3;
val_offset:354*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 354*FLEN/8, x4, x1, x2)

inst_355:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffc000000; valaddr_reg:x3;
val_offset:355*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 355*FLEN/8, x4, x1, x2)

inst_356:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffe000000; valaddr_reg:x3;
val_offset:356*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 356*FLEN/8, x4, x1, x2)

inst_357:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffff000000; valaddr_reg:x3;
val_offset:357*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 357*FLEN/8, x4, x1, x2)

inst_358:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffff800000; valaddr_reg:x3;
val_offset:358*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 358*FLEN/8, x4, x1, x2)

inst_359:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffc00000; valaddr_reg:x3;
val_offset:359*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 359*FLEN/8, x4, x1, x2)

inst_360:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffe00000; valaddr_reg:x3;
val_offset:360*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 360*FLEN/8, x4, x1, x2)

inst_361:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffff00000; valaddr_reg:x3;
val_offset:361*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 361*FLEN/8, x4, x1, x2)

inst_362:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffff80000; valaddr_reg:x3;
val_offset:362*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 362*FLEN/8, x4, x1, x2)

inst_363:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffc0000; valaddr_reg:x3;
val_offset:363*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 363*FLEN/8, x4, x1, x2)

inst_364:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffe0000; valaddr_reg:x3;
val_offset:364*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 364*FLEN/8, x4, x1, x2)

inst_365:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffff0000; valaddr_reg:x3;
val_offset:365*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 365*FLEN/8, x4, x1, x2)

inst_366:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffff8000; valaddr_reg:x3;
val_offset:366*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 366*FLEN/8, x4, x1, x2)

inst_367:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffc000; valaddr_reg:x3;
val_offset:367*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 367*FLEN/8, x4, x1, x2)

inst_368:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffe000; valaddr_reg:x3;
val_offset:368*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 368*FLEN/8, x4, x1, x2)

inst_369:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffff000; valaddr_reg:x3;
val_offset:369*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 369*FLEN/8, x4, x1, x2)

inst_370:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffff800; valaddr_reg:x3;
val_offset:370*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 370*FLEN/8, x4, x1, x2)

inst_371:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffffc00; valaddr_reg:x3;
val_offset:371*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 371*FLEN/8, x4, x1, x2)

inst_372:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffffe00; valaddr_reg:x3;
val_offset:372*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 372*FLEN/8, x4, x1, x2)

inst_373:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffff00; valaddr_reg:x3;
val_offset:373*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 373*FLEN/8, x4, x1, x2)

inst_374:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffff80; valaddr_reg:x3;
val_offset:374*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 374*FLEN/8, x4, x1, x2)

inst_375:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffffc0; valaddr_reg:x3;
val_offset:375*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 375*FLEN/8, x4, x1, x2)

inst_376:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffffe0; valaddr_reg:x3;
val_offset:376*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 376*FLEN/8, x4, x1, x2)

inst_377:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffffff0; valaddr_reg:x3;
val_offset:377*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 377*FLEN/8, x4, x1, x2)

inst_378:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffffff8; valaddr_reg:x3;
val_offset:378*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 378*FLEN/8, x4, x1, x2)

inst_379:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffffffc; valaddr_reg:x3;
val_offset:379*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 379*FLEN/8, x4, x1, x2)

inst_380:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdfffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdfffffffffffe; valaddr_reg:x3;
val_offset:380*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 380*FLEN/8, x4, x1, x2)

inst_381:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xdffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fdffffffffffff; valaddr_reg:x3;
val_offset:381*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 381*FLEN/8, x4, x1, x2)

inst_382:
// fs1 == 0 and fe1 == 0x47f and fm1 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x47fe000000000000; valaddr_reg:x3;
val_offset:382*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 382*FLEN/8, x4, x1, x2)

inst_383:
// fs1 == 0 and fe1 == 0x369 and fm1 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fsqrt.d ; op1:f30; dest:f31; op1val:0x369fffffffe00000; valaddr_reg:x3;
val_offset:383*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val: 0 */
TEST_FPSR_OP(fsqrt.d, f31, f30, dyn, 0, 0, x3, 383*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
.dword 0x3696d601ad376ab9
.dword 0x369fffffffe00000
.dword 0x36affffffff00000
.dword 0x36bffffffff80000
.dword 0x36cffffffffc0000
.dword 0x36dffffffffe0000
.dword 0x36efffffffff0000
.dword 0x36ffffffffff8000
.dword 0x370fffffffffc000
.dword 0x371fffffffffe000
.dword 0x372ffffffffff000
.dword 0x373ffffffffff800
.dword 0x374ffffffffffc00
.dword 0x375ffffffffffe00
.dword 0x376fffffffffff00
.dword 0x377fffffffffff80
.dword 0x378fffffffffffc0
.dword 0x379fffffffffffe0
.dword 0x37affffffffffff0
.dword 0x37bffffffffffff8
.dword 0x37cffffffffffffc
.dword 0x37d0000000000000
.dword 0x37d8000000000000
.dword 0x37dc000000000000
.dword 0x37de000000000000
.dword 0x37df000000000000
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.dword 0x37dfc00000000000
.dword 0x37dfe00000000000
.dword 0x37dff00000000000
.dword 0x37dff80000000000
.dword 0x37dffc0000000000
.dword 0x37dffe0000000000
.dword 0x37dfff0000000000
.dword 0x37dfff8000000000
.dword 0x37dfffc000000000
.dword 0x37dfffe000000000
.dword 0x37dffff000000000
.dword 0x37dffff800000000
.dword 0x37dffffc00000000
.dword 0x37dffffe00000000
.dword 0x37dfffff00000000
.dword 0x37dfffff80000000
.dword 0x37dfffffc0000000
.dword 0x37dfffffe0000000
.dword 0x37dffffff0000000
.dword 0x37dffffff8000000
.dword 0x37dffffffc000000
.dword 0x37dffffffe000000
.dword 0x37dfffffff000000
.dword 0x37dfffffff800000
.dword 0x37dfffffffc00000
.dword 0x37dfffffffe00000
.dword 0x37dffffffff00000
.dword 0x37dffffffff80000
.dword 0x37dffffffffc0000
.dword 0x37dffffffffe0000
.dword 0x37dfffffffff0000
.dword 0x37dfffffffff8000
.dword 0x37dfffffffffc000
.dword 0x37dfffffffffe000
.dword 0x37dffffffffff000
.dword 0x37dffffffffff800
.dword 0x37dffffffffffc00
.dword 0x37dffffffffffe00
.dword 0x37dfffffffffff00
.dword 0x37dfffffffffff80
.dword 0x37dfffffffffffc0
.dword 0x37dfffffffffffe0
.dword 0x37dffffffffffff0
.dword 0x37dffffffffffff8
.dword 0x37dffffffffffffc
.dword 0x37dffffffffffffe
.dword 0x37e0000000000000
.dword 0x37e0000000000001
.dword 0x37e0000000000003
.dword 0x37e0000000000007
.dword 0x37e000000000000f
.dword 0x37e000000000001f
.dword 0x37e000000000003f
.dword 0x37e000000000007f
.dword 0x37e00000000000ff
.dword 0x37e00000000001ff
.dword 0x37e00000000003ff
.dword 0x37e00000000007ff
.dword 0x37e0000000000fff
.dword 0x37e0000000001fff
.dword 0x37e0000000003fff
.dword 0x37e0000000007fff
.dword 0x37e000000000ffff
.dword 0x37e000000001ffff
.dword 0x37e000000003ffff
.dword 0x37e000000007ffff
.dword 0x37e00000000fffff
.dword 0x37e00000001fffff
.dword 0x37e00000003fffff
.dword 0x37e00000007fffff
.dword 0x37e0000000ffffff
.dword 0x37e0000001ffffff
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.dword 0x37e0000007ffffff
.dword 0x37e000000fffffff
.dword 0x37e000001fffffff
.dword 0x37e000003fffffff
.dword 0x37e000007fffffff
.dword 0x37e00000ffffffff
.dword 0x37e00001ffffffff
.dword 0x37e00003ffffffff
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.dword 0x37e0000fffffffff
.dword 0x37e0001fffffffff
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.dword 0x37e000ffffffffff
.dword 0x37e001ffffffffff
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.dword 0x37e00fffffffffff
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.dword 0x37e03fffffffffff
.dword 0x37e07fffffffffff
.dword 0x37e0ffffffffffff
.dword 0x37e1ffffffffffff
.dword 0x37e3ffffffffffff
.dword 0x37e7ffffffffffff
.dword 0x37e8000000000000
.dword 0x37ec000000000000
.dword 0x37ee000000000000
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.dword 0x37efff0000000000
.dword 0x37efff8000000000
.dword 0x37efffc000000000
.dword 0x37efffe000000000
.dword 0x37effff000000000
.dword 0x37effff800000000
.dword 0x37effffc00000000
.dword 0x37effffe00000000
.dword 0x37efffff00000000
.dword 0x37efffff80000000
.dword 0x37efffffc0000000
.dword 0x37efffffe0000000
.dword 0x37effffff0000000
.dword 0x37effffff8000000
.dword 0x37effffffc000000
.dword 0x37effffffe000000
.dword 0x37efffffff000000
.dword 0x37efffffff800000
.dword 0x37efffffffc00000
.dword 0x37efffffffe00000
.dword 0x37effffffff00000
.dword 0x37effffffff80000
.dword 0x37effffffffc0000
.dword 0x37effffffffe0000
.dword 0x37efffffffff0000
.dword 0x37efffffffff8000
.dword 0x37efffffffffc000
.dword 0x37efffffffffe000
.dword 0x37effffffffff000
.dword 0x37effffffffff800
.dword 0x37effffffffffc00
.dword 0x37effffffffffe00
.dword 0x37efffffffffff00
.dword 0x37efffffffffff80
.dword 0x37efffffffffffc0
.dword 0x37efffffffffffe0
.dword 0x37effffffffffff0
.dword 0x37effffffffffff8
.dword 0x37effffffffffffc
.dword 0x37effffffffffffe
.dword 0x37efffffffffffff
.dword 0x3ffe000000000000
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.dword 0x3ffe000000001000
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.dword 0x3ffe000000004000
.dword 0x3ffe000000008000
.dword 0x3ffe000000010000
.dword 0x3ffe000000020000
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.dword 0x3ffe000000200000
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.dword 0x3ffe000001000000
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.dword 0x3ffe040000000000
.dword 0x3ffe080000000000
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.dword 0x3ffe800000000000
.dword 0x3fff000000000000
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.dword 0x3fffc00000000000
.dword 0x3fffe00000000000
.dword 0x3ffff00000000000
.dword 0x3ffff80000000000
.dword 0x3ffffc0000000000
.dword 0x3ffffe0000000000
.dword 0x3fffff0000000000
.dword 0x3fffff8000000000
.dword 0x3fffffc000000000
.dword 0x3fffffe000000000
.dword 0x3ffffff000000000
.dword 0x3ffffff800000000
.dword 0x3ffffffc00000000
.dword 0x3ffffffe00000000
.dword 0x3fffffff00000000
.dword 0x3fffffff80000000
.dword 0x3fffffffc0000000
.dword 0x3fffffffe0000000
.dword 0x3ffffffff0000000
.dword 0x3ffffffff8000000
.dword 0x3ffffffffc000000
.dword 0x3ffffffffe000000
.dword 0x3fffffffff000000
.dword 0x3fffffffff800000
.dword 0x3fffffffffc00000
.dword 0x3fffffffffe00000
.dword 0x3ffffffffff00000
.dword 0x3ffffffffff80000
.dword 0x3ffffffffffc0000
.dword 0x3ffffffffffe0000
.dword 0x3fffffffffff0000
.dword 0x3fffffffffff8000
.dword 0x3fffffffffffc000
.dword 0x3fffffffffffe000
.dword 0x3ffffffffffff000
.dword 0x3ffffffffffff800
.dword 0x3ffffffffffffc00
.dword 0x3ffffffffffffe00
.dword 0x3fffffffffffff00
.dword 0x3fffffffffffff80
.dword 0x3fffffffffffffc0
.dword 0x3fffffffffffffe0
.dword 0x3ffffffffffffff0
.dword 0x3ffffffffffffff8
.dword 0x3ffffffffffffffc
.dword 0x3ffffffffffffffe
.dword 0x3fffffffffffffff
.dword 0x4000000000000000
.dword 0x47fc000000000000
.dword 0x47fc000000000002
.dword 0x47fc000000000004
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.dword 0x47fc000000002000
.dword 0x47fc000000004000
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.dword 0x47fc000000010000
.dword 0x47fc000000020000
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.dword 0x47fc000800000000
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.dword 0x47fc004000000000
.dword 0x47fc008000000000
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.dword 0x47fc400000000000
.dword 0x47fc666666666666
.dword 0x47fc800000000000
.dword 0x47fc924924924924
.dword 0x47fccccccccccccc
.dword 0x47fcdb6db6db6db6
.dword 0x47fceeeeeeeeeeee
.dword 0x47fd000000000000
.dword 0x47fd111111111111
.dword 0x47fd333333333333
.dword 0x47fd6db6db6db6db
.dword 0x47fd800000000000
.dword 0x47fd99999999999a
.dword 0x47fdb6db6db6db6e
.dword 0x47fdc00000000000
.dword 0x47fde00000000000
.dword 0x47fdf00000000000
.dword 0x47fdf80000000000
.dword 0x47fdfc0000000000
.dword 0x47fdfe0000000000
.dword 0x47fdff0000000000
.dword 0x47fdff8000000000
.dword 0x47fdffc000000000
.dword 0x47fdffe000000000
.dword 0x47fdfff000000000
.dword 0x47fdfff800000000
.dword 0x47fdfffc00000000
.dword 0x47fdfffe00000000
.dword 0x47fdffff00000000
.dword 0x47fdffff80000000
.dword 0x47fdffffc0000000
.dword 0x47fdffffe0000000
.dword 0x47fdfffff0000000
.dword 0x47fdfffff8000000
.dword 0x47fdfffffc000000
.dword 0x47fdfffffe000000
.dword 0x47fdffffff000000
.dword 0x47fdffffff800000
.dword 0x47fdffffffc00000
.dword 0x47fdffffffe00000
.dword 0x47fdfffffff00000
.dword 0x47fdfffffff80000
.dword 0x47fdfffffffc0000
.dword 0x47fdfffffffe0000
.dword 0x47fdffffffff0000
.dword 0x47fdffffffff8000
.dword 0x47fdffffffffc000
.dword 0x47fdffffffffe000
.dword 0x47fdfffffffff000
.dword 0x47fdfffffffff800
.dword 0x47fdfffffffffc00
.dword 0x47fdfffffffffe00
.dword 0x47fdffffffffff00
.dword 0x47fdffffffffff80
.dword 0x47fdffffffffffc0
.dword 0x47fdffffffffffe0
.dword 0x47fdfffffffffff0
.dword 0x47fdfffffffffff8
.dword 0x47fdfffffffffffc
.dword 0x47fdfffffffffffe
.dword 0x47fdffffffffffff
.dword 0x47fe000000000000
.dword 0x369fffffffe00000
.dword 0x3696d601ad376ab9
.dword 0x369fffffffe00000
.dword 0x36affffffff00000
.dword 0x36bffffffff80000
.dword 0x36cffffffffc0000
.dword 0x36dffffffffe0000
.dword 0x36efffffffff0000
.dword 0x36ffffffffff8000
.dword 0x370fffffffffc000
.dword 0x371fffffffffe000
.dword 0x372ffffffffff000
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.dword 0x374ffffffffffc00
.dword 0x375ffffffffffe00
.dword 0x376fffffffffff00
.dword 0x377fffffffffff80
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.dword 0x379fffffffffffe0
.dword 0x37affffffffffff0
.dword 0x37bffffffffffff8
.dword 0x37cffffffffffffc
.dword 0x37d0000000000000
.dword 0x37d8000000000000
.dword 0x37dc000000000000
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.dword 0x37dfc00000000000
.dword 0x37dfe00000000000
.dword 0x37dff00000000000
.dword 0x37dff80000000000
.dword 0x37dffc0000000000
.dword 0x37dffe0000000000
.dword 0x37dfff0000000000
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.dword 0x37dffff000000000
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.dword 0x37dfffffffc00000
.dword 0x37dfffffffe00000
.dword 0x37dffffffff00000
.dword 0x37dffffffff80000
.dword 0x37dffffffffc0000
.dword 0x37dffffffffe0000
.dword 0x37dfffffffff0000
.dword 0x37dfffffffff8000
.dword 0x37dfffffffffc000
.dword 0x37dfffffffffe000
.dword 0x37dffffffffff000
.dword 0x37dffffffffff800
.dword 0x37dffffffffffc00
.dword 0x37dffffffffffe00
.dword 0x37dfffffffffff00
.dword 0x37dfffffffffff80
.dword 0x37dfffffffffffc0
.dword 0x37dfffffffffffe0
.dword 0x37dffffffffffff0
.dword 0x37dffffffffffff8
.dword 0x37dffffffffffffc
.dword 0x37dffffffffffffe
.dword 0x37e0000000000000
.dword 0x37e0000000000001
.dword 0x37e0000000000003
.dword 0x37e0000000000007
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.dword 0x37e000000000007f
.dword 0x37e00000000000ff
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.dword 0x37e000000000ffff
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.dword 0x37e000000007ffff
.dword 0x37e00000000fffff
.dword 0x37e00000001fffff
.dword 0x37e00000003fffff
.dword 0x37e00000007fffff
.dword 0x37e0000000ffffff
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.dword 0x37e00000ffffffff
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.dword 0x37e0000fffffffff
.dword 0x37e0001fffffffff
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.dword 0x37e0007fffffffff
.dword 0x37e000ffffffffff
.dword 0x37e001ffffffffff
.dword 0x37e003ffffffffff
.dword 0x37e007ffffffffff
.dword 0x37e00fffffffffff
.dword 0x37e01fffffffffff
.dword 0x37e03fffffffffff
.dword 0x37e07fffffffffff
.dword 0x37e0ffffffffffff
.dword 0x37e1ffffffffffff
.dword 0x37e3ffffffffffff
.dword 0x37e7ffffffffffff
.dword 0x37e8000000000000
.dword 0x37ec000000000000
.dword 0x37ee000000000000
.dword 0x37ef000000000000
.dword 0x37ef800000000000
.dword 0x37efc00000000000
.dword 0x37efe00000000000
.dword 0x37eff00000000000
.dword 0x37eff80000000000
.dword 0x37effc0000000000
.dword 0x37effe0000000000
.dword 0x37efff0000000000
.dword 0x37efff8000000000
.dword 0x37efffc000000000
.dword 0x37efffe000000000
.dword 0x37effff000000000
.dword 0x37effff800000000
.dword 0x37effffc00000000
.dword 0x37effffe00000000
.dword 0x37efffff00000000
.dword 0x37efffff80000000
.dword 0x37efffffc0000000
.dword 0x37efffffe0000000
.dword 0x37effffff0000000
.dword 0x37effffff8000000
.dword 0x37effffffc000000
.dword 0x37effffffe000000
.dword 0x37efffffff000000
.dword 0x37efffffff800000
.dword 0x37efffffffc00000
.dword 0x37efffffffe00000
.dword 0x37effffffff00000
.dword 0x37effffffff80000
.dword 0x37effffffffc0000
.dword 0x37effffffffe0000
.dword 0x37efffffffff0000
.dword 0x37efffffffff8000
.dword 0x37efffffffffc000
.dword 0x37efffffffffe000
.dword 0x37effffffffff000
.dword 0x37effffffffff800
.dword 0x37effffffffffc00
.dword 0x37effffffffffe00
.dword 0x37efffffffffff00
.dword 0x37efffffffffff80
.dword 0x37efffffffffffc0
.dword 0x37efffffffffffe0
.dword 0x37effffffffffff0
.dword 0x37effffffffffff8
.dword 0x37effffffffffffc
.dword 0x37effffffffffffe
.dword 0x37efffffffffffff
.dword 0x3ffe000000000000
.dword 0x3ffe000000000002
.dword 0x3ffe000000000004
.dword 0x3ffe000000000008
.dword 0x3ffe000000000010
.dword 0x3ffe000000000020
.dword 0x3ffe000000000040
.dword 0x3ffe000000000080
.dword 0x3ffe000000000100
.dword 0x3ffe000000000200
.dword 0x3ffe000000000400
.dword 0x3ffe000000000800
.dword 0x3ffe000000001000
.dword 0x3ffe000000002000
.dword 0x3ffe000000004000
.dword 0x3ffe000000008000
.dword 0x3ffe000000010000
.dword 0x3ffe000000020000
.dword 0x3ffe000000040000
.dword 0x3ffe000000080000
.dword 0x3ffe000000100000
.dword 0x3ffe000000200000
.dword 0x3ffe000000400000
.dword 0x3ffe000000800000
.dword 0x3ffe000001000000
.dword 0x3ffe000002000000
.dword 0x3ffe000004000000
.dword 0x3ffe000008000000
.dword 0x3ffe000010000000
.dword 0x3ffe000020000000
.dword 0x3ffe000040000000
.dword 0x3ffe000080000000
.dword 0x3ffe000100000000
.dword 0x3ffe000200000000
.dword 0x3ffe000400000000
.dword 0x3ffe000800000000
.dword 0x3ffe001000000000
.dword 0x3ffe002000000000
.dword 0x3ffe004000000000
.dword 0x3ffe008000000000
.dword 0x3ffe010000000000
.dword 0x3ffe020000000000
.dword 0x3ffe040000000000
.dword 0x3ffe080000000000
.dword 0x3ffe100000000000
.dword 0x3ffe200000000000
.dword 0x3ffe400000000000
.dword 0x3ffe800000000000
.dword 0x3fff000000000000
.dword 0x3fff800000000000
.dword 0x3fffc00000000000
.dword 0x3fffe00000000000
.dword 0x3ffff00000000000
.dword 0x3ffff80000000000
.dword 0x3ffffc0000000000
.dword 0x3ffffe0000000000
.dword 0x3fffff0000000000
.dword 0x3fffff8000000000
.dword 0x3fffffc000000000
.dword 0x3fffffe000000000
.dword 0x3ffffff000000000
.dword 0x3ffffff800000000
.dword 0x3ffffffc00000000
.dword 0x3ffffffe00000000
.dword 0x3fffffff00000000
.dword 0x3fffffff80000000
.dword 0x3fffffffc0000000
.dword 0x3fffffffe0000000
.dword 0x3ffffffff0000000
.dword 0x3ffffffff8000000
.dword 0x3ffffffffc000000
.dword 0x3ffffffffe000000
.dword 0x3fffffffff000000
.dword 0x3fffffffff800000
.dword 0x3fffffffffc00000
.dword 0x3fffffffffe00000
.dword 0x3ffffffffff00000
.dword 0x3ffffffffff80000
.dword 0x3ffffffffffc0000
.dword 0x3ffffffffffe0000
.dword 0x3fffffffffff0000
.dword 0x3fffffffffff8000
.dword 0x3fffffffffffc000
.dword 0x3fffffffffffe000
.dword 0x3ffffffffffff000
.dword 0x3ffffffffffff800
.dword 0x3ffffffffffffc00
.dword 0x3ffffffffffffe00
.dword 0x3fffffffffffff00
.dword 0x3fffffffffffff80
.dword 0x3fffffffffffffc0
.dword 0x3fffffffffffffe0
.dword 0x3ffffffffffffff0
.dword 0x3ffffffffffffff8
.dword 0x3ffffffffffffffc
.dword 0x3ffffffffffffffe
.dword 0x3fffffffffffffff
.dword 0x4000000000000000
.dword 0x47fc000000000000
.dword 0x47fc000000000002
.dword 0x47fc000000000004
.dword 0x47fc000000000008
.dword 0x47fc000000000010
.dword 0x47fc000000000020
.dword 0x47fc000000000040
.dword 0x47fc000000000080
.dword 0x47fc000000000100
.dword 0x47fc000000000200
.dword 0x47fc000000000400
.dword 0x47fc000000000800
.dword 0x47fc000000001000
.dword 0x47fc000000002000
.dword 0x47fc000000004000
.dword 0x47fc000000008000
.dword 0x47fc000000010000
.dword 0x47fc000000020000
.dword 0x47fc000000040000
.dword 0x47fc000000080000
.dword 0x47fc000000100000
.dword 0x47fc000000200000
.dword 0x47fc000000400000
.dword 0x47fc000000800000
.dword 0x47fc000001000000
.dword 0x47fc000002000000
.dword 0x47fc000004000000
.dword 0x47fc000008000000
.dword 0x47fc000010000000
.dword 0x47fc000020000000
.dword 0x47fc000040000000
.dword 0x47fc000080000000
.dword 0x47fc000100000000
.dword 0x47fc000200000000
.dword 0x47fc000400000000
.dword 0x47fc000800000000
.dword 0x47fc001000000000
.dword 0x47fc002000000000
.dword 0x47fc004000000000
.dword 0x47fc008000000000
.dword 0x47fc010000000000
.dword 0x47fc020000000000
.dword 0x47fc040000000000
.dword 0x47fc080000000000
.dword 0x47fc100000000000
.dword 0x47fc200000000000
.dword 0x47fc400000000000
.dword 0x47fc666666666666
.dword 0x47fc800000000000
.dword 0x47fc924924924924
.dword 0x47fccccccccccccc
.dword 0x47fcdb6db6db6db6
.dword 0x47fceeeeeeeeeeee
.dword 0x47fd000000000000
.dword 0x47fd111111111111
.dword 0x47fd333333333333
.dword 0x47fd6db6db6db6db
.dword 0x47fd800000000000
.dword 0x47fd99999999999a
.dword 0x47fdb6db6db6db6e
.dword 0x47fdc00000000000
.dword 0x47fde00000000000
.dword 0x47fdf00000000000
.dword 0x47fdf80000000000
.dword 0x47fdfc0000000000
.dword 0x47fdfe0000000000
.dword 0x47fdff0000000000
.dword 0x47fdff8000000000
.dword 0x47fdffc000000000
.dword 0x47fdffe000000000
.dword 0x47fdfff000000000
.dword 0x47fdfff800000000
.dword 0x47fdfffc00000000
.dword 0x47fdfffe00000000
.dword 0x47fdffff00000000
.dword 0x47fdffff80000000
.dword 0x47fdffffc0000000
.dword 0x47fdffffe0000000
.dword 0x47fdfffff0000000
.dword 0x47fdfffff8000000
.dword 0x47fdfffffc000000
.dword 0x47fdfffffe000000
.dword 0x47fdffffff000000
.dword 0x47fdffffff800000
.dword 0x47fdffffffc00000
.dword 0x47fdffffffe00000
.dword 0x47fdfffffff00000
.dword 0x47fdfffffff80000
.dword 0x47fdfffffffc0000
.dword 0x47fdfffffffe0000
.dword 0x47fdffffffff0000
.dword 0x47fdffffffff8000
.dword 0x47fdffffffffc000
.dword 0x47fdffffffffe000
.dword 0x47fdfffffffff000
.dword 0x47fdfffffffff800
.dword 0x47fdfffffffffc00
.dword 0x47fdfffffffffe00
.dword 0x47fdffffffffff00
.dword 0x47fdffffffffff80
.dword 0x47fdffffffffffc0
.dword 0x47fdffffffffffe0
.dword 0x47fdfffffffffff0
.dword 0x47fdfffffffffff8
.dword 0x47fdfffffffffffc
.dword 0x47fdfffffffffffe
.dword 0x47fdffffffffffff
.dword 0x47fe000000000000
.dword 0x369fffffffe00000
.dword 0x3696d601ad376ab9
.dword 0x369fffffffe00000
.dword 0x36affffffff00000
.dword 0x36bffffffff80000
.dword 0x36cffffffffc0000
.dword 0x36dffffffffe0000
.dword 0x36efffffffff0000
.dword 0x36ffffffffff8000
.dword 0x370fffffffffc000
.dword 0x371fffffffffe000
.dword 0x372ffffffffff000
.dword 0x373ffffffffff800
.dword 0x374ffffffffffc00
.dword 0x375ffffffffffe00
.dword 0x376fffffffffff00
.dword 0x377fffffffffff80
.dword 0x378fffffffffffc0
.dword 0x379fffffffffffe0
.dword 0x37affffffffffff0
.dword 0x37bffffffffffff8
.dword 0x37cffffffffffffc
.dword 0x37d0000000000000
.dword 0x37d8000000000000
.dword 0x37dc000000000000
.dword 0x37de000000000000
.dword 0x37df000000000000
.dword 0x37df800000000000
.dword 0x37dfc00000000000
.dword 0x37dfe00000000000
.dword 0x37dff00000000000
.dword 0x37dff80000000000
.dword 0x37dffc0000000000
.dword 0x37dffe0000000000
.dword 0x37dfff0000000000
.dword 0x37dfff8000000000
.dword 0x37dfffc000000000
.dword 0x37dfffe000000000
.dword 0x37dffff000000000
.dword 0x37dffff800000000
.dword 0x37dffffc00000000
.dword 0x37dffffe00000000
.dword 0x37dfffff00000000
.dword 0x37dfffff80000000
.dword 0x37dfffffc0000000
.dword 0x37dfffffe0000000
.dword 0x37dffffff0000000
.dword 0x37dffffff8000000
.dword 0x37dffffffc000000
.dword 0x37dffffffe000000
.dword 0x37dfffffff000000
.dword 0x37dfffffff800000
.dword 0x37dfffffffc00000
.dword 0x37dfffffffe00000
.dword 0x37dffffffff00000
.dword 0x37dffffffff80000
.dword 0x37dffffffffc0000
.dword 0x37dffffffffe0000
.dword 0x37dfffffffff0000
.dword 0x37dfffffffff8000
.dword 0x37dfffffffffc000
.dword 0x37dfffffffffe000
.dword 0x37dffffffffff000
.dword 0x37dffffffffff800
.dword 0x37dffffffffffc00
.dword 0x37dffffffffffe00
.dword 0x37dfffffffffff00
.dword 0x37dfffffffffff80
.dword 0x37dfffffffffffc0
.dword 0x37dfffffffffffe0
.dword 0x37dffffffffffff0
.dword 0x37dffffffffffff8
.dword 0x37dffffffffffffc
.dword 0x37dffffffffffffe
.dword 0x37e0000000000000
.dword 0x37e0000000000001
.dword 0x37e0000000000003
.dword 0x37e0000000000007
.dword 0x37e000000000000f
.dword 0x37e000000000001f
.dword 0x37e000000000003f
.dword 0x37e000000000007f
.dword 0x37e00000000000ff
.dword 0x37e00000000001ff
.dword 0x37e00000000003ff
.dword 0x37e00000000007ff
.dword 0x37e0000000000fff
.dword 0x37e0000000001fff
.dword 0x37e0000000003fff
.dword 0x37e0000000007fff
.dword 0x37e000000000ffff
.dword 0x37e000000001ffff
.dword 0x37e000000003ffff
.dword 0x37e000000007ffff
.dword 0x37e00000000fffff
.dword 0x37e00000001fffff
.dword 0x37e00000003fffff
.dword 0x37e00000007fffff
.dword 0x37e0000000ffffff
.dword 0x37e0000001ffffff
.dword 0x37e0000003ffffff
.dword 0x37e0000007ffffff
.dword 0x37e000000fffffff
.dword 0x37e000001fffffff
.dword 0x37e000003fffffff
.dword 0x37e000007fffffff
.dword 0x37e00000ffffffff
.dword 0x37e00001ffffffff
.dword 0x37e00003ffffffff
.dword 0x37e00007ffffffff
.dword 0x37e0000fffffffff
.dword 0x37e0001fffffffff
.dword 0x37e0003fffffffff
.dword 0x37e0007fffffffff
.dword 0x37e000ffffffffff
.dword 0x37e001ffffffffff
.dword 0x37e003ffffffffff
.dword 0x37e007ffffffffff
.dword 0x37e00fffffffffff
.dword 0x37e01fffffffffff
.dword 0x37e03fffffffffff
.dword 0x37e07fffffffffff
.dword 0x37e0ffffffffffff
.dword 0x37e1ffffffffffff
.dword 0x37e3ffffffffffff
.dword 0x37e7ffffffffffff
.dword 0x37e8000000000000
.dword 0x37ec000000000000
.dword 0x37ee000000000000
.dword 0x37ef000000000000
.dword 0x37ef800000000000
.dword 0x37efc00000000000
.dword 0x37efe00000000000
.dword 0x37eff00000000000
.dword 0x37eff80000000000
.dword 0x37effc0000000000
.dword 0x37effe0000000000
.dword 0x37efff0000000000
.dword 0x37efff8000000000
.dword 0x37efffc000000000
.dword 0x37efffe000000000
.dword 0x37effff000000000
.dword 0x37effff800000000
.dword 0x37effffc00000000
.dword 0x37effffe00000000
.dword 0x37efffff00000000
.dword 0x37efffff80000000
.dword 0x37efffffc0000000
.dword 0x37efffffe0000000
.dword 0x37effffff0000000
.dword 0x37effffff8000000
.dword 0x37effffffc000000
.dword 0x37effffffe000000
.dword 0x37efffffff000000
.dword 0x37efffffff800000
.dword 0x37efffffffc00000
.dword 0x37efffffffe00000
.dword 0x37effffffff00000
.dword 0x37effffffff80000
.dword 0x37effffffffc0000
.dword 0x37effffffffe0000
.dword 0x37efffffffff0000
.dword 0x37efffffffff8000
.dword 0x37efffffffffc000
.dword 0x37efffffffffe000
.dword 0x37effffffffff000
.dword 0x37effffffffff800
.dword 0x37effffffffffc00
.dword 0x37effffffffffe00
.dword 0x37efffffffffff00
.dword 0x37efffffffffff80
.dword 0x37efffffffffffc0
.dword 0x37efffffffffffe0
.dword 0x37effffffffffff0
.dword 0x37effffffffffff8
.dword 0x37effffffffffffc
.dword 0x37effffffffffffe
.dword 0x37efffffffffffff
.dword 0x3ffe000000000000
.dword 0x3ffe000000000002
.dword 0x3ffe000000000004
.dword 0x3ffe000000000008
.dword 0x3ffe000000000010
.dword 0x3ffe000000000020
.dword 0x3ffe000000000040
.dword 0x3ffe000000000080
.dword 0x3ffe000000000100
.dword 0x3ffe000000000200
.dword 0x3ffe000000000400
.dword 0x3ffe000000000800
.dword 0x3ffe000000001000
.dword 0x3ffe000000002000
.dword 0x3ffe000000004000
.dword 0x3ffe000000008000
.dword 0x3ffe000000010000
.dword 0x3ffe000000020000
.dword 0x3ffe000000040000
.dword 0x3ffe000000080000
.dword 0x3ffe000000100000
.dword 0x3ffe000000200000
.dword 0x3ffe000000400000
.dword 0x3ffe000000800000
.dword 0x3ffe000001000000
.dword 0x3ffe000002000000
.dword 0x3ffe000004000000
.dword 0x3ffe000008000000
.dword 0x3ffe000010000000
.dword 0x3ffe000020000000
.dword 0x3ffe000040000000
.dword 0x3ffe000080000000
.dword 0x3ffe000100000000
.dword 0x3ffe000200000000
.dword 0x3ffe000400000000
.dword 0x3ffe000800000000
.dword 0x3ffe001000000000
.dword 0x3ffe002000000000
.dword 0x3ffe004000000000
.dword 0x3ffe008000000000
.dword 0x3ffe010000000000
.dword 0x3ffe020000000000
.dword 0x3ffe040000000000
.dword 0x3ffe080000000000
.dword 0x3ffe100000000000
.dword 0x3ffe200000000000
.dword 0x3ffe400000000000
.dword 0x3ffe800000000000
.dword 0x3fff000000000000
.dword 0x3fff800000000000
.dword 0x3fffc00000000000
.dword 0x3fffe00000000000
.dword 0x3ffff00000000000
.dword 0x3ffff80000000000
.dword 0x3ffffc0000000000
.dword 0x3ffffe0000000000
.dword 0x3fffff0000000000
.dword 0x3fffff8000000000
.dword 0x3fffffc000000000
.dword 0x3fffffe000000000
.dword 0x3ffffff000000000
.dword 0x3ffffff800000000
.dword 0x3ffffffc00000000
.dword 0x3ffffffe00000000
.dword 0x3fffffff00000000
.dword 0x3fffffff80000000
.dword 0x3fffffffc0000000
.dword 0x3fffffffe0000000
.dword 0x3ffffffff0000000
.dword 0x3ffffffff8000000
.dword 0x3ffffffffc000000
.dword 0x3ffffffffe000000
.dword 0x3fffffffff000000
.dword 0x3fffffffff800000
.dword 0x3fffffffffc00000
.dword 0x3fffffffffe00000
.dword 0x3ffffffffff00000
.dword 0x3ffffffffff80000
.dword 0x3ffffffffffc0000
.dword 0x3ffffffffffe0000
.dword 0x3fffffffffff0000
.dword 0x3fffffffffff8000
.dword 0x3fffffffffffc000
.dword 0x3fffffffffffe000
.dword 0x3ffffffffffff000
.dword 0x3ffffffffffff800
.dword 0x3ffffffffffffc00
.dword 0x3ffffffffffffe00
.dword 0x3fffffffffffff00
.dword 0x3fffffffffffff80
.dword 0x3fffffffffffffc0
.dword 0x3fffffffffffffe0
.dword 0x3ffffffffffffff0
.dword 0x3ffffffffffffff8
.dword 0x3ffffffffffffffc
.dword 0x3ffffffffffffffe
.dword 0x3fffffffffffffff
.dword 0x4000000000000000
.dword 0x47fc000000000000
.dword 0x47fc000000000002
.dword 0x47fc000000000004
.dword 0x47fc000000000008
.dword 0x47fc000000000010
.dword 0x47fc000000000020
.dword 0x47fc000000000040
.dword 0x47fc000000000080
.dword 0x47fc000000000100
.dword 0x47fc000000000200
.dword 0x47fc000000000400
.dword 0x47fc000000000800
.dword 0x47fc000000001000
.dword 0x47fc000000002000
.dword 0x47fc000000004000
.dword 0x47fc000000008000
.dword 0x47fc000000010000
.dword 0x47fc000000020000
.dword 0x47fc000000040000
.dword 0x47fc000000080000
.dword 0x47fc000000100000
.dword 0x47fc000000200000
.dword 0x47fc000000400000
.dword 0x47fc000000800000
.dword 0x47fc000001000000
.dword 0x47fc000002000000
.dword 0x47fc000004000000
.dword 0x47fc000008000000
.dword 0x47fc000010000000
.dword 0x47fc000020000000
.dword 0x47fc000040000000
.dword 0x47fc000080000000
.dword 0x47fc000100000000
.dword 0x47fc000200000000
.dword 0x47fc000400000000
.dword 0x47fc000800000000
.dword 0x47fc001000000000
.dword 0x47fc002000000000
.dword 0x47fc004000000000
.dword 0x47fc008000000000
.dword 0x47fc010000000000
.dword 0x47fc020000000000
.dword 0x47fc040000000000
.dword 0x47fc080000000000
.dword 0x47fc100000000000
.dword 0x47fc200000000000
.dword 0x47fc400000000000
.dword 0x47fc666666666666
.dword 0x47fc800000000000
.dword 0x47fc924924924924
.dword 0x47fccccccccccccc
.dword 0x47fcdb6db6db6db6
.dword 0x47fceeeeeeeeeeee
.dword 0x47fd000000000000
.dword 0x47fd111111111111
.dword 0x47fd333333333333
.dword 0x47fd6db6db6db6db
.dword 0x47fd800000000000
.dword 0x47fd99999999999a
.dword 0x47fdb6db6db6db6e
.dword 0x47fdc00000000000
.dword 0x47fde00000000000
.dword 0x47fdf00000000000
.dword 0x47fdf80000000000
.dword 0x47fdfc0000000000
.dword 0x47fdfe0000000000
.dword 0x47fdff0000000000
.dword 0x47fdff8000000000
.dword 0x47fdffc000000000
.dword 0x47fdffe000000000
.dword 0x47fdfff000000000
.dword 0x47fdfff800000000
.dword 0x47fdfffc00000000
.dword 0x47fdfffe00000000
.dword 0x47fdffff00000000
.dword 0x47fdffff80000000
.dword 0x47fdffffc0000000
.dword 0x47fdffffe0000000
.dword 0x47fdfffff0000000
.dword 0x47fdfffff8000000
.dword 0x47fdfffffc000000
.dword 0x47fdfffffe000000
.dword 0x47fdffffff000000
.dword 0x47fdffffff800000
.dword 0x47fdffffffc00000
.dword 0x47fdffffffe00000
.dword 0x47fdfffffff00000
.dword 0x47fdfffffff80000
.dword 0x47fdfffffffc0000
.dword 0x47fdfffffffe0000
.dword 0x47fdffffffff0000
.dword 0x47fdffffffff8000
.dword 0x47fdffffffffc000
.dword 0x47fdffffffffe000
.dword 0x47fdfffffffff000
.dword 0x47fdfffffffff800
.dword 0x47fdfffffffffc00
.dword 0x47fdfffffffffe00
.dword 0x47fdffffffffff00
.dword 0x47fdffffffffff80
.dword 0x47fdffffffffffc0
.dword 0x47fdffffffffffe0
.dword 0x47fdfffffffffff0
.dword 0x47fdfffffffffff8
.dword 0x47fdfffffffffffc
.dword 0x47fdfffffffffffe
.dword 0x47fdffffffffffff
.dword 0x47fe000000000000
.dword 0x369fffffffe00000
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
