
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.12.2
// timestamp : Wed Sep 25 05:22:24 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/testing/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/testing/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV32Zhinx/rv32h_fdiv.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fdiv.h instruction of the RISC-V RV32_Zfinx_Zhinx,RV64_Zfinx_Zhinx extension for the fdiv_b8 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32I_Zfinx_Zhinx,RV64I_Zfinx_Zhinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*Zhinx.*);def TEST_CASE_1=True;",fdiv_b8)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x17,test_dataset_0)
RVTEST_SIGBASE(x5,signature_x5_1)

inst_0:
// rs1 == rd != rs2, rs1==x2, rs2==x14, rd==x2,fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x2; op2:x14; dest:x2; op1val:0x3a18; op2val:0x7bff;
   valaddr_reg:x17; val_offset:0*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x2, x2, x14, dyn, 0, 0, x17, 0*FLEN/8, x18, x5, x9)

inst_1:
// rs1 == rs2 != rd, rs1==x30, rs2==x30, rd==x3,fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x30; dest:x3; op1val:0x3a18; op2val:0x3a18;
   valaddr_reg:x17; val_offset:2*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x3, x30, x30, dyn, 32, 0, x17, 2*FLEN/8, x18, x5, x9)

inst_2:
// rs1 == rs2 == rd, rs1==x10, rs2==x10, rd==x10,fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x10; op2:x10; dest:x10; op1val:0x3a18; op2val:0x3a18;
   valaddr_reg:x17; val_offset:4*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x10, x10, x10, dyn, 64, 0, x17, 4*FLEN/8, x18, x5, x9)

inst_3:
// rs1 != rs2  and rs1 != rd and rs2 != rd, rs1==x29, rs2==x23, rd==x30,fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x29; op2:x23; dest:x30; op1val:0x3a18; op2val:0x7bff;
   valaddr_reg:x17; val_offset:6*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x30, x29, x23, dyn, 96, 0, x17, 6*FLEN/8, x18, x5, x9)

inst_4:
// rs2 == rd != rs1, rs1==x24, rs2==x28, rd==x28,fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x24; op2:x28; dest:x28; op1val:0x3a18; op2val:0x7bff;
   valaddr_reg:x17; val_offset:8*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x28, x24, x28, dyn, 128, 0, x17, 8*FLEN/8, x18, x5, x9)

inst_5:
// rs1==x25, rs2==x19, rd==x22,fs1 == 0 and fe1 == 0x0e and fm1 == 0x10a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x25; op2:x19; dest:x22; op1val:0x390a; op2val:0x7bff;
   valaddr_reg:x17; val_offset:10*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x22, x25, x19, dyn, 0, 0, x17, 10*FLEN/8, x18, x5, x9)

inst_6:
// rs1==x7, rs2==x26, rd==x11,fs1 == 0 and fe1 == 0x0e and fm1 == 0x10a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x7; op2:x26; dest:x11; op1val:0x390a; op2val:0x7bff;
   valaddr_reg:x17; val_offset:12*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x11, x7, x26, dyn, 32, 0, x17, 12*FLEN/8, x18, x5, x9)

inst_7:
// rs1==x6, rs2==x8, rd==x12,fs1 == 0 and fe1 == 0x0e and fm1 == 0x10a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x6; op2:x8; dest:x12; op1val:0x390a; op2val:0x7bff;
   valaddr_reg:x17; val_offset:14*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x12, x6, x8, dyn, 64, 0, x17, 14*FLEN/8, x18, x5, x9)

inst_8:
// rs1==x16, rs2==x4, rd==x14,fs1 == 0 and fe1 == 0x0e and fm1 == 0x10a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x16; op2:x4; dest:x14; op1val:0x390a; op2val:0x7bff;
   valaddr_reg:x17; val_offset:16*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x14, x16, x4, dyn, 96, 0, x17, 16*FLEN/8, x18, x5, x9)

inst_9:
// rs1==x15, rs2==x7, rd==x23,fs1 == 0 and fe1 == 0x0e and fm1 == 0x10a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x15; op2:x7; dest:x23; op1val:0x390a; op2val:0x7bff;
   valaddr_reg:x17; val_offset:18*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x23, x15, x7, dyn, 128, 0, x17, 18*FLEN/8, x18, x5, x9)

inst_10:
// rs1==x1, rs2==x15, rd==x13,fs1 == 0 and fe1 == 0x0d and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x1; op2:x15; dest:x13; op1val:0x35fd; op2val:0x7bff;
   valaddr_reg:x17; val_offset:20*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x13, x1, x15, dyn, 0, 0, x17, 20*FLEN/8, x18, x5, x9)
RVTEST_VALBASEUPD(x1,test_dataset_1)

inst_11:
// rs1==x27, rs2==x3, rd==x8,fs1 == 0 and fe1 == 0x0d and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x27; op2:x3; dest:x8; op1val:0x35fd; op2val:0x7bff;
   valaddr_reg:x1; val_offset:0*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x8, x27, x3, dyn, 32, 0, x1, 0*FLEN/8, x7, x5, x9)

inst_12:
// rs1==x20, rs2==x27, rd==x4,fs1 == 0 and fe1 == 0x0d and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x20; op2:x27; dest:x4; op1val:0x35fd; op2val:0x7bff;
   valaddr_reg:x1; val_offset:2*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x9
*/
TEST_FPRR_OP(fdiv.h, x4, x20, x27, dyn, 64, 0, x1, 2*FLEN/8, x7, x5, x9)

inst_13:
// rs1==x9, rs2==x17, rd==x26,fs1 == 0 and fe1 == 0x0d and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x9; op2:x17; dest:x26; op1val:0x35fd; op2val:0x7bff;
   valaddr_reg:x1; val_offset:4*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x26, x9, x17, dyn, 96, 0, x1, 4*FLEN/8, x7, x5, x3)
RVTEST_SIGBASE(x2,signature_x2_0)

inst_14:
// rs1==x22, rs2==x5, rd==x31,fs1 == 0 and fe1 == 0x0d and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x22; op2:x5; dest:x31; op1val:0x35fd; op2val:0x7bff;
   valaddr_reg:x1; val_offset:6*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x31, x22, x5, dyn, 128, 0, x1, 6*FLEN/8, x7, x2, x3)

inst_15:
// rs1==x17, rs2==x11, rd==x19,fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x17; op2:x11; dest:x19; op1val:0x3be5; op2val:0x7bff;
   valaddr_reg:x1; val_offset:8*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x19, x17, x11, dyn, 0, 0, x1, 8*FLEN/8, x7, x2, x3)

inst_16:
// rs1==x8, rs2==x16, rd==x29,fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x8; op2:x16; dest:x29; op1val:0x3be5; op2val:0x7bff;
   valaddr_reg:x1; val_offset:10*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x29, x8, x16, dyn, 32, 0, x1, 10*FLEN/8, x7, x2, x3)

inst_17:
// rs1==x13, rs2==x12, rd==x9,fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x13; op2:x12; dest:x9; op1val:0x3be5; op2val:0x7bff;
   valaddr_reg:x1; val_offset:12*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x9, x13, x12, dyn, 64, 0, x1, 12*FLEN/8, x7, x2, x3)

inst_18:
// rs1==x31, rs2==x24, rd==x6,fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x31; op2:x24; dest:x6; op1val:0x3be5; op2val:0x7bff;
   valaddr_reg:x1; val_offset:14*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x6, x31, x24, dyn, 96, 0, x1, 14*FLEN/8, x7, x2, x3)

inst_19:
// rs1==x14, rs2==x13, rd==x24,fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x14; op2:x13; dest:x24; op1val:0x3be5; op2val:0x7bff;
   valaddr_reg:x1; val_offset:16*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x24, x14, x13, dyn, 128, 0, x1, 16*FLEN/8, x7, x2, x3)

inst_20:
// rs1==x4, rs2==x20, rd==x16,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ec and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x4; op2:x20; dest:x16; op1val:0x39ec; op2val:0x7bff;
   valaddr_reg:x1; val_offset:18*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x16, x4, x20, dyn, 0, 0, x1, 18*FLEN/8, x7, x2, x3)

inst_21:
// rs1==x23, rs2==x21, rd==x25,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ec and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x23; op2:x21; dest:x25; op1val:0x39ec; op2val:0x7bff;
   valaddr_reg:x1; val_offset:20*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x25, x23, x21, dyn, 32, 0, x1, 20*FLEN/8, x7, x2, x3)

inst_22:
// rs1==x11, rs2==x31, rd==x27,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ec and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x11; op2:x31; dest:x27; op1val:0x39ec; op2val:0x7bff;
   valaddr_reg:x1; val_offset:22*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x27, x11, x31, dyn, 64, 0, x1, 22*FLEN/8, x7, x2, x3)

inst_23:
// rs1==x12, rs2==x25, rd==x21,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ec and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x12; op2:x25; dest:x21; op1val:0x39ec; op2val:0x7bff;
   valaddr_reg:x1; val_offset:24*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x21, x12, x25, dyn, 96, 0, x1, 24*FLEN/8, x7, x2, x3)

inst_24:
// rs1==x18, rs2==x0, rd==x20,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ec and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x18; op2:x0; dest:x20; op1val:0x39ec; op2val:0x0;
   valaddr_reg:x1; val_offset:26*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x20, x18, x0, dyn, 128, 0, x1, 26*FLEN/8, x7, x2, x3)
RVTEST_VALBASEUPD(x8,test_dataset_2)

inst_25:
// rs1==x19, rs2==x6, rd==x5,fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x19; op2:x6; dest:x5; op1val:0x1c75; op2val:0x7875;
   valaddr_reg:x8; val_offset:0*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x5, x19, x6, dyn, 0, 0, x8, 0*FLEN/8, x10, x2, x3)

inst_26:
// rs1==x21, rs2==x18, rd==x0,fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x21; op2:x18; dest:x0; op1val:0x1c75; op2val:0x7875;
   valaddr_reg:x8; val_offset:2*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x0, x21, x18, dyn, 32, 0, x8, 2*FLEN/8, x10, x2, x3)

inst_27:
// rs1==x26, rs2==x1, rd==x15,fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x26; op2:x1; dest:x15; op1val:0x1c75; op2val:0x7875;
   valaddr_reg:x8; val_offset:4*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x3
*/
TEST_FPRR_OP(fdiv.h, x15, x26, x1, dyn, 64, 0, x8, 4*FLEN/8, x10, x2, x3)

inst_28:
// rs1==x5, rs2==x22, rd==x1,fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x5; op2:x22; dest:x1; op1val:0x1c75; op2val:0x7875;
   valaddr_reg:x8; val_offset:6*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x1, x5, x22, dyn, 96, 0, x8, 6*FLEN/8, x10, x2, x4)

inst_29:
// rs1==x0, rs2==x29, rd==x7,fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x0; op2:x29; dest:x7; op1val:0x0; op2val:0x7875;
   valaddr_reg:x8; val_offset:8*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x7, x0, x29, dyn, 128, 0, x8, 8*FLEN/8, x10, x2, x4)
RVTEST_SIGBASE(x1,signature_x1_0)

inst_30:
// rs1==x3, rs2==x2, rd==x18,fs1 == 0 and fe1 == 0x0c and fm1 == 0x13b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x3; op2:x2; dest:x18; op1val:0x313b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:10*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x18, x3, x2, dyn, 0, 0, x8, 10*FLEN/8, x10, x1, x4)

inst_31:
// rs1==x28, rs2==x9, rd==x17,fs1 == 0 and fe1 == 0x0c and fm1 == 0x13b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x28; op2:x9; dest:x17; op1val:0x313b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:12*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x17, x28, x9, dyn, 32, 0, x8, 12*FLEN/8, x10, x1, x4)

inst_32:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x13b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x313b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:14*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 14*FLEN/8, x10, x1, x4)

inst_33:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x13b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x313b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:16*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 16*FLEN/8, x10, x1, x4)

inst_34:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x13b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x313b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:18*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 18*FLEN/8, x10, x1, x4)

inst_35:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1c6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35c6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:20*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 20*FLEN/8, x10, x1, x4)

inst_36:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1c6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35c6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:22*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 22*FLEN/8, x10, x1, x4)

inst_37:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1c6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35c6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:24*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 24*FLEN/8, x10, x1, x4)

inst_38:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1c6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35c6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:26*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 26*FLEN/8, x10, x1, x4)

inst_39:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1c6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35c6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:28*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 28*FLEN/8, x10, x1, x4)

inst_40:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:30*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 30*FLEN/8, x10, x1, x4)

inst_41:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:32*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 32*FLEN/8, x10, x1, x4)

inst_42:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:34*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 34*FLEN/8, x10, x1, x4)

inst_43:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:36*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 36*FLEN/8, x10, x1, x4)

inst_44:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:38*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 38*FLEN/8, x10, x1, x4)

inst_45:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37a1; op2val:0x7bff;
   valaddr_reg:x8; val_offset:40*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 40*FLEN/8, x10, x1, x4)

inst_46:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37a1; op2val:0x7bff;
   valaddr_reg:x8; val_offset:42*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 42*FLEN/8, x10, x1, x4)

inst_47:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37a1; op2val:0x7bff;
   valaddr_reg:x8; val_offset:44*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 44*FLEN/8, x10, x1, x4)

inst_48:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37a1; op2val:0x7bff;
   valaddr_reg:x8; val_offset:46*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 46*FLEN/8, x10, x1, x4)

inst_49:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37a1; op2val:0x7bff;
   valaddr_reg:x8; val_offset:48*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 48*FLEN/8, x10, x1, x4)

inst_50:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x141 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3541; op2val:0x7bff;
   valaddr_reg:x8; val_offset:50*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 50*FLEN/8, x10, x1, x4)

inst_51:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x141 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3541; op2val:0x7bff;
   valaddr_reg:x8; val_offset:52*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 52*FLEN/8, x10, x1, x4)

inst_52:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x141 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3541; op2val:0x7bff;
   valaddr_reg:x8; val_offset:54*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 54*FLEN/8, x10, x1, x4)

inst_53:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x141 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3541; op2val:0x7bff;
   valaddr_reg:x8; val_offset:56*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 56*FLEN/8, x10, x1, x4)

inst_54:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x141 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3541; op2val:0x7bff;
   valaddr_reg:x8; val_offset:58*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 58*FLEN/8, x10, x1, x4)

inst_55:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33bc; op2val:0x7bff;
   valaddr_reg:x8; val_offset:60*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 60*FLEN/8, x10, x1, x4)

inst_56:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33bc; op2val:0x7bff;
   valaddr_reg:x8; val_offset:62*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 62*FLEN/8, x10, x1, x4)

inst_57:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33bc; op2val:0x7bff;
   valaddr_reg:x8; val_offset:64*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 64*FLEN/8, x10, x1, x4)

inst_58:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33bc; op2val:0x7bff;
   valaddr_reg:x8; val_offset:66*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 66*FLEN/8, x10, x1, x4)

inst_59:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33bc; op2val:0x7bff;
   valaddr_reg:x8; val_offset:68*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 68*FLEN/8, x10, x1, x4)

inst_60:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x197 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3997; op2val:0x7bff;
   valaddr_reg:x8; val_offset:70*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 70*FLEN/8, x10, x1, x4)

inst_61:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x197 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3997; op2val:0x7bff;
   valaddr_reg:x8; val_offset:72*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 72*FLEN/8, x10, x1, x4)

inst_62:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x197 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3997; op2val:0x7bff;
   valaddr_reg:x8; val_offset:74*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 74*FLEN/8, x10, x1, x4)

inst_63:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x197 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3997; op2val:0x7bff;
   valaddr_reg:x8; val_offset:76*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 76*FLEN/8, x10, x1, x4)

inst_64:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x197 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3997; op2val:0x7bff;
   valaddr_reg:x8; val_offset:78*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 78*FLEN/8, x10, x1, x4)

inst_65:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x04d and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x304d; op2val:0x7bff;
   valaddr_reg:x8; val_offset:80*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 80*FLEN/8, x10, x1, x4)

inst_66:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x04d and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x304d; op2val:0x7bff;
   valaddr_reg:x8; val_offset:82*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 82*FLEN/8, x10, x1, x4)

inst_67:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x04d and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x304d; op2val:0x7bff;
   valaddr_reg:x8; val_offset:84*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 84*FLEN/8, x10, x1, x4)

inst_68:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x04d and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x304d; op2val:0x7bff;
   valaddr_reg:x8; val_offset:86*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 86*FLEN/8, x10, x1, x4)

inst_69:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x04d and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x304d; op2val:0x7bff;
   valaddr_reg:x8; val_offset:88*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 88*FLEN/8, x10, x1, x4)

inst_70:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x347f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:90*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 90*FLEN/8, x10, x1, x4)

inst_71:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x347f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:92*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 92*FLEN/8, x10, x1, x4)

inst_72:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x347f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:94*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 94*FLEN/8, x10, x1, x4)

inst_73:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x347f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:96*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 96*FLEN/8, x10, x1, x4)

inst_74:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x347f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:98*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 98*FLEN/8, x10, x1, x4)

inst_75:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x092 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3492; op2val:0x7bff;
   valaddr_reg:x8; val_offset:100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 100*FLEN/8, x10, x1, x4)

inst_76:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x092 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3492; op2val:0x7bff;
   valaddr_reg:x8; val_offset:102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 102*FLEN/8, x10, x1, x4)

inst_77:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x092 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3492; op2val:0x7bff;
   valaddr_reg:x8; val_offset:104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 104*FLEN/8, x10, x1, x4)

inst_78:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x092 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3492; op2val:0x7bff;
   valaddr_reg:x8; val_offset:106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 106*FLEN/8, x10, x1, x4)

inst_79:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x092 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3492; op2val:0x7bff;
   valaddr_reg:x8; val_offset:108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 108*FLEN/8, x10, x1, x4)

inst_80:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 110*FLEN/8, x10, x1, x4)

inst_81:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 112*FLEN/8, x10, x1, x4)

inst_82:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 114*FLEN/8, x10, x1, x4)

inst_83:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 116*FLEN/8, x10, x1, x4)

inst_84:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38d7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 118*FLEN/8, x10, x1, x4)

inst_85:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x071 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3871; op2val:0x7bff;
   valaddr_reg:x8; val_offset:120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 120*FLEN/8, x10, x1, x4)

inst_86:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x071 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3871; op2val:0x7bff;
   valaddr_reg:x8; val_offset:122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 122*FLEN/8, x10, x1, x4)

inst_87:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x071 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3871; op2val:0x7bff;
   valaddr_reg:x8; val_offset:124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 124*FLEN/8, x10, x1, x4)

inst_88:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x071 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3871; op2val:0x7bff;
   valaddr_reg:x8; val_offset:126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 126*FLEN/8, x10, x1, x4)

inst_89:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x071 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3871; op2val:0x7bff;
   valaddr_reg:x8; val_offset:128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 128*FLEN/8, x10, x1, x4)

inst_90:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3c0 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fc0; op2val:0x7bff;
   valaddr_reg:x8; val_offset:130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 130*FLEN/8, x10, x1, x4)

inst_91:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3c0 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fc0; op2val:0x7bff;
   valaddr_reg:x8; val_offset:132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 132*FLEN/8, x10, x1, x4)

inst_92:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3c0 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fc0; op2val:0x7bff;
   valaddr_reg:x8; val_offset:134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 134*FLEN/8, x10, x1, x4)

inst_93:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3c0 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fc0; op2val:0x7bff;
   valaddr_reg:x8; val_offset:136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 136*FLEN/8, x10, x1, x4)

inst_94:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3c0 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fc0; op2val:0x7bff;
   valaddr_reg:x8; val_offset:138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 138*FLEN/8, x10, x1, x4)

inst_95:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ae9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 140*FLEN/8, x10, x1, x4)

inst_96:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ae9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 142*FLEN/8, x10, x1, x4)

inst_97:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ae9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 144*FLEN/8, x10, x1, x4)

inst_98:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ae9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 146*FLEN/8, x10, x1, x4)

inst_99:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ae9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 148*FLEN/8, x10, x1, x4)

inst_100:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x06b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x286b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 150*FLEN/8, x10, x1, x4)

inst_101:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x06b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x286b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 152*FLEN/8, x10, x1, x4)

inst_102:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x06b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x286b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 154*FLEN/8, x10, x1, x4)

inst_103:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x06b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x286b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 156*FLEN/8, x10, x1, x4)

inst_104:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x06b and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x286b; op2val:0x7bff;
   valaddr_reg:x8; val_offset:158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 158*FLEN/8, x10, x1, x4)

inst_105:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 160*FLEN/8, x10, x1, x4)

inst_106:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 162*FLEN/8, x10, x1, x4)

inst_107:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 164*FLEN/8, x10, x1, x4)

inst_108:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 166*FLEN/8, x10, x1, x4)

inst_109:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 168*FLEN/8, x10, x1, x4)

inst_110:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e2 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e2; op2val:0x7bff;
   valaddr_reg:x8; val_offset:170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 170*FLEN/8, x10, x1, x4)

inst_111:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e2 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e2; op2val:0x7bff;
   valaddr_reg:x8; val_offset:172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 172*FLEN/8, x10, x1, x4)

inst_112:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e2 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e2; op2val:0x7bff;
   valaddr_reg:x8; val_offset:174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 174*FLEN/8, x10, x1, x4)

inst_113:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e2 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e2; op2val:0x7bff;
   valaddr_reg:x8; val_offset:176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 176*FLEN/8, x10, x1, x4)

inst_114:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e2 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e2; op2val:0x7bff;
   valaddr_reg:x8; val_offset:178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 178*FLEN/8, x10, x1, x4)

inst_115:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3931; op2val:0x7bff;
   valaddr_reg:x8; val_offset:180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 180*FLEN/8, x10, x1, x4)

inst_116:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3931; op2val:0x7bff;
   valaddr_reg:x8; val_offset:182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 182*FLEN/8, x10, x1, x4)

inst_117:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3931; op2val:0x7bff;
   valaddr_reg:x8; val_offset:184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 184*FLEN/8, x10, x1, x4)

inst_118:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3931; op2val:0x7bff;
   valaddr_reg:x8; val_offset:186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 186*FLEN/8, x10, x1, x4)

inst_119:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3931; op2val:0x7bff;
   valaddr_reg:x8; val_offset:188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 188*FLEN/8, x10, x1, x4)

inst_120:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 190*FLEN/8, x10, x1, x4)

inst_121:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 192*FLEN/8, x10, x1, x4)

inst_122:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 194*FLEN/8, x10, x1, x4)

inst_123:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 196*FLEN/8, x10, x1, x4)

inst_124:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 198*FLEN/8, x10, x1, x4)

inst_125:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3516; op2val:0x7bff;
   valaddr_reg:x8; val_offset:200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 200*FLEN/8, x10, x1, x4)

inst_126:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3516; op2val:0x7bff;
   valaddr_reg:x8; val_offset:202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 202*FLEN/8, x10, x1, x4)

inst_127:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3516; op2val:0x7bff;
   valaddr_reg:x8; val_offset:204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 204*FLEN/8, x10, x1, x4)

inst_128:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3516; op2val:0x7bff;
   valaddr_reg:x8; val_offset:206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 206*FLEN/8, x10, x1, x4)

inst_129:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3516; op2val:0x7bff;
   valaddr_reg:x8; val_offset:208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 208*FLEN/8, x10, x1, x4)

inst_130:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x098 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3098; op2val:0x7bff;
   valaddr_reg:x8; val_offset:210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 210*FLEN/8, x10, x1, x4)

inst_131:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x098 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3098; op2val:0x7bff;
   valaddr_reg:x8; val_offset:212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 212*FLEN/8, x10, x1, x4)

inst_132:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x098 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3098; op2val:0x7bff;
   valaddr_reg:x8; val_offset:214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 214*FLEN/8, x10, x1, x4)

inst_133:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x098 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3098; op2val:0x7bff;
   valaddr_reg:x8; val_offset:216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 216*FLEN/8, x10, x1, x4)

inst_134:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x098 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3098; op2val:0x7bff;
   valaddr_reg:x8; val_offset:218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 218*FLEN/8, x10, x1, x4)

inst_135:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x142 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3542; op2val:0x7bff;
   valaddr_reg:x8; val_offset:220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 220*FLEN/8, x10, x1, x4)

inst_136:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x142 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3542; op2val:0x7bff;
   valaddr_reg:x8; val_offset:222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 222*FLEN/8, x10, x1, x4)

inst_137:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x142 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3542; op2val:0x7bff;
   valaddr_reg:x8; val_offset:224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 224*FLEN/8, x10, x1, x4)

inst_138:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x142 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3542; op2val:0x7bff;
   valaddr_reg:x8; val_offset:226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 226*FLEN/8, x10, x1, x4)

inst_139:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x142 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3542; op2val:0x7bff;
   valaddr_reg:x8; val_offset:228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 228*FLEN/8, x10, x1, x4)

inst_140:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3075; op2val:0x7bff;
   valaddr_reg:x8; val_offset:230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 230*FLEN/8, x10, x1, x4)

inst_141:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3075; op2val:0x7bff;
   valaddr_reg:x8; val_offset:232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 232*FLEN/8, x10, x1, x4)

inst_142:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3075; op2val:0x7bff;
   valaddr_reg:x8; val_offset:234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 234*FLEN/8, x10, x1, x4)

inst_143:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3075; op2val:0x7bff;
   valaddr_reg:x8; val_offset:236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 236*FLEN/8, x10, x1, x4)

inst_144:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3075; op2val:0x7bff;
   valaddr_reg:x8; val_offset:238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 238*FLEN/8, x10, x1, x4)

inst_145:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e19; op2val:0x7bff;
   valaddr_reg:x8; val_offset:240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 240*FLEN/8, x10, x1, x4)

inst_146:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e19; op2val:0x7bff;
   valaddr_reg:x8; val_offset:242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 242*FLEN/8, x10, x1, x4)

inst_147:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e19; op2val:0x7bff;
   valaddr_reg:x8; val_offset:244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 244*FLEN/8, x10, x1, x4)

inst_148:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e19; op2val:0x7bff;
   valaddr_reg:x8; val_offset:246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 246*FLEN/8, x10, x1, x4)

inst_149:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e19; op2val:0x7bff;
   valaddr_reg:x8; val_offset:248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 248*FLEN/8, x10, x1, x4)

inst_150:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x094 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3494; op2val:0x7bff;
   valaddr_reg:x8; val_offset:250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 250*FLEN/8, x10, x1, x4)

inst_151:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x094 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3494; op2val:0x7bff;
   valaddr_reg:x8; val_offset:252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 252*FLEN/8, x10, x1, x4)

inst_152:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x094 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3494; op2val:0x7bff;
   valaddr_reg:x8; val_offset:254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 254*FLEN/8, x10, x1, x4)

inst_153:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x094 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3494; op2val:0x7bff;
   valaddr_reg:x8; val_offset:256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 256*FLEN/8, x10, x1, x4)

inst_154:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x094 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3494; op2val:0x7bff;
   valaddr_reg:x8; val_offset:258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 258*FLEN/8, x10, x1, x4)

inst_155:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x163 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3163; op2val:0x7bff;
   valaddr_reg:x8; val_offset:260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 260*FLEN/8, x10, x1, x4)

inst_156:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x163 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3163; op2val:0x7bff;
   valaddr_reg:x8; val_offset:262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 262*FLEN/8, x10, x1, x4)

inst_157:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x163 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3163; op2val:0x7bff;
   valaddr_reg:x8; val_offset:264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 264*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_158:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x163 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3163; op2val:0x7bff;
   valaddr_reg:x8; val_offset:266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 266*FLEN/8, x10, x1, x4)

inst_159:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x163 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3163; op2val:0x7bff;
   valaddr_reg:x8; val_offset:268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 268*FLEN/8, x10, x1, x4)

inst_160:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b8 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b8; op2val:0x7bff;
   valaddr_reg:x8; val_offset:270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 270*FLEN/8, x10, x1, x4)

inst_161:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b8 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b8; op2val:0x7bff;
   valaddr_reg:x8; val_offset:272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 272*FLEN/8, x10, x1, x4)

inst_162:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b8 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b8; op2val:0x7bff;
   valaddr_reg:x8; val_offset:274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 274*FLEN/8, x10, x1, x4)

inst_163:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b8 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b8; op2val:0x7bff;
   valaddr_reg:x8; val_offset:276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 276*FLEN/8, x10, x1, x4)

inst_164:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b8 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b8; op2val:0x7bff;
   valaddr_reg:x8; val_offset:278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 278*FLEN/8, x10, x1, x4)

inst_165:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ac and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ac; op2val:0x7bff;
   valaddr_reg:x8; val_offset:280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 280*FLEN/8, x10, x1, x4)

inst_166:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ac and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ac; op2val:0x7bff;
   valaddr_reg:x8; val_offset:282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 282*FLEN/8, x10, x1, x4)

inst_167:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ac and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ac; op2val:0x7bff;
   valaddr_reg:x8; val_offset:284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 284*FLEN/8, x10, x1, x4)

inst_168:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ac and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ac; op2val:0x7bff;
   valaddr_reg:x8; val_offset:286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 286*FLEN/8, x10, x1, x4)

inst_169:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ac and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ac; op2val:0x7bff;
   valaddr_reg:x8; val_offset:288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 288*FLEN/8, x10, x1, x4)

inst_170:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 290*FLEN/8, x10, x1, x4)

inst_171:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 292*FLEN/8, x10, x1, x4)

inst_172:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 294*FLEN/8, x10, x1, x4)

inst_173:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 296*FLEN/8, x10, x1, x4)

inst_174:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 298*FLEN/8, x10, x1, x4)

inst_175:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:300*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 300*FLEN/8, x10, x1, x4)

inst_176:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:302*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 302*FLEN/8, x10, x1, x4)

inst_177:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:304*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 304*FLEN/8, x10, x1, x4)

inst_178:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:306*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 306*FLEN/8, x10, x1, x4)

inst_179:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b7 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b7; op2val:0x7bff;
   valaddr_reg:x8; val_offset:308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 308*FLEN/8, x10, x1, x4)

inst_180:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:310*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 310*FLEN/8, x10, x1, x4)

inst_181:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:312*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 312*FLEN/8, x10, x1, x4)

inst_182:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:314*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 314*FLEN/8, x10, x1, x4)

inst_183:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:316*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 316*FLEN/8, x10, x1, x4)

inst_184:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a6; op2val:0x7bff;
   valaddr_reg:x8; val_offset:318*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 318*FLEN/8, x10, x1, x4)

inst_185:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3012; op2val:0x7bff;
   valaddr_reg:x8; val_offset:320*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 320*FLEN/8, x10, x1, x4)

inst_186:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3012; op2val:0x7bff;
   valaddr_reg:x8; val_offset:322*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 322*FLEN/8, x10, x1, x4)

inst_187:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3012; op2val:0x7bff;
   valaddr_reg:x8; val_offset:324*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 324*FLEN/8, x10, x1, x4)

inst_188:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3012; op2val:0x7bff;
   valaddr_reg:x8; val_offset:326*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 326*FLEN/8, x10, x1, x4)

inst_189:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3012; op2val:0x7bff;
   valaddr_reg:x8; val_offset:328*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 328*FLEN/8, x10, x1, x4)

inst_190:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x22a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x362a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:330*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 330*FLEN/8, x10, x1, x4)

inst_191:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x22a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x362a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:332*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 332*FLEN/8, x10, x1, x4)

inst_192:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x22a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x362a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:334*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 334*FLEN/8, x10, x1, x4)

inst_193:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x22a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x362a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:336*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 336*FLEN/8, x10, x1, x4)

inst_194:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x22a and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x362a; op2val:0x7bff;
   valaddr_reg:x8; val_offset:338*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 338*FLEN/8, x10, x1, x4)

inst_195:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3481; op2val:0x7bff;
   valaddr_reg:x8; val_offset:340*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 340*FLEN/8, x10, x1, x4)

inst_196:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3481; op2val:0x7bff;
   valaddr_reg:x8; val_offset:342*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 342*FLEN/8, x10, x1, x4)

inst_197:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3481; op2val:0x7bff;
   valaddr_reg:x8; val_offset:344*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 344*FLEN/8, x10, x1, x4)

inst_198:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3481; op2val:0x7bff;
   valaddr_reg:x8; val_offset:346*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 346*FLEN/8, x10, x1, x4)

inst_199:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3481; op2val:0x7bff;
   valaddr_reg:x8; val_offset:348*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 348*FLEN/8, x10, x1, x4)

inst_200:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x39f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f9f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:350*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 350*FLEN/8, x10, x1, x4)

inst_201:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x39f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f9f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:352*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 352*FLEN/8, x10, x1, x4)

inst_202:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x39f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f9f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:354*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 354*FLEN/8, x10, x1, x4)

inst_203:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x39f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f9f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:356*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 356*FLEN/8, x10, x1, x4)

inst_204:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x39f and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f9f; op2val:0x7bff;
   valaddr_reg:x8; val_offset:358*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 358*FLEN/8, x10, x1, x4)

inst_205:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:360*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 360*FLEN/8, x10, x1, x4)

inst_206:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:362*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 362*FLEN/8, x10, x1, x4)

inst_207:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:364*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 364*FLEN/8, x10, x1, x4)

inst_208:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:366*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 366*FLEN/8, x10, x1, x4)

inst_209:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e9 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37e9; op2val:0x7bff;
   valaddr_reg:x8; val_offset:368*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 368*FLEN/8, x10, x1, x4)

inst_210:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x188 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7188;
   valaddr_reg:x8; val_offset:370*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 370*FLEN/8, x10, x1, x4)

inst_211:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x188 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7188;
   valaddr_reg:x8; val_offset:372*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 372*FLEN/8, x10, x1, x4)

inst_212:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x188 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7188;
   valaddr_reg:x8; val_offset:374*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 374*FLEN/8, x10, x1, x4)

inst_213:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x188 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7188;
   valaddr_reg:x8; val_offset:376*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 376*FLEN/8, x10, x1, x4)

inst_214:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x188 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7188;
   valaddr_reg:x8; val_offset:378*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 378*FLEN/8, x10, x1, x4)

inst_215:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x267 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x26a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3667; op2val:0x6e6a;
   valaddr_reg:x8; val_offset:380*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 380*FLEN/8, x10, x1, x4)

inst_216:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x267 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x26a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3667; op2val:0x6e6a;
   valaddr_reg:x8; val_offset:382*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 382*FLEN/8, x10, x1, x4)

inst_217:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x267 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x26a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3667; op2val:0x6e6a;
   valaddr_reg:x8; val_offset:384*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 384*FLEN/8, x10, x1, x4)

inst_218:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x267 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x26a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3667; op2val:0x6e6a;
   valaddr_reg:x8; val_offset:386*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 386*FLEN/8, x10, x1, x4)

inst_219:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x267 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x26a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3667; op2val:0x6e6a;
   valaddr_reg:x8; val_offset:388*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 388*FLEN/8, x10, x1, x4)

inst_220:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x26b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x26e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a6b; op2val:0x726e;
   valaddr_reg:x8; val_offset:390*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 390*FLEN/8, x10, x1, x4)

inst_221:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x26b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x26e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a6b; op2val:0x726e;
   valaddr_reg:x8; val_offset:392*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 392*FLEN/8, x10, x1, x4)

inst_222:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x26b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x26e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a6b; op2val:0x726e;
   valaddr_reg:x8; val_offset:394*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 394*FLEN/8, x10, x1, x4)

inst_223:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x26b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x26e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a6b; op2val:0x726e;
   valaddr_reg:x8; val_offset:396*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 396*FLEN/8, x10, x1, x4)

inst_224:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x26b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x26e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a6b; op2val:0x726e;
   valaddr_reg:x8; val_offset:398*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 398*FLEN/8, x10, x1, x4)

inst_225:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x23e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x363b; op2val:0x6e3e;
   valaddr_reg:x8; val_offset:400*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 400*FLEN/8, x10, x1, x4)

inst_226:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x23e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x363b; op2val:0x6e3e;
   valaddr_reg:x8; val_offset:402*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 402*FLEN/8, x10, x1, x4)

inst_227:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x23e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x363b; op2val:0x6e3e;
   valaddr_reg:x8; val_offset:404*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 404*FLEN/8, x10, x1, x4)

inst_228:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x23e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x363b; op2val:0x6e3e;
   valaddr_reg:x8; val_offset:406*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 406*FLEN/8, x10, x1, x4)

inst_229:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x23e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x363b; op2val:0x6e3e;
   valaddr_reg:x8; val_offset:408*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 408*FLEN/8, x10, x1, x4)

inst_230:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3ac and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ba9; op2val:0x73ac;
   valaddr_reg:x8; val_offset:410*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 410*FLEN/8, x10, x1, x4)

inst_231:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3ac and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ba9; op2val:0x73ac;
   valaddr_reg:x8; val_offset:412*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 412*FLEN/8, x10, x1, x4)

inst_232:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3ac and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ba9; op2val:0x73ac;
   valaddr_reg:x8; val_offset:414*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 414*FLEN/8, x10, x1, x4)

inst_233:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3ac and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ba9; op2val:0x73ac;
   valaddr_reg:x8; val_offset:416*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 416*FLEN/8, x10, x1, x4)

inst_234:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3ac and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ba9; op2val:0x73ac;
   valaddr_reg:x8; val_offset:418*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 418*FLEN/8, x10, x1, x4)

inst_235:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x17f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397d; op2val:0x717f;
   valaddr_reg:x8; val_offset:420*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 420*FLEN/8, x10, x1, x4)

inst_236:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x17f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397d; op2val:0x717f;
   valaddr_reg:x8; val_offset:422*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 422*FLEN/8, x10, x1, x4)

inst_237:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x17f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397d; op2val:0x717f;
   valaddr_reg:x8; val_offset:424*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 424*FLEN/8, x10, x1, x4)

inst_238:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x17f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397d; op2val:0x717f;
   valaddr_reg:x8; val_offset:426*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 426*FLEN/8, x10, x1, x4)

inst_239:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x17f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397d; op2val:0x717f;
   valaddr_reg:x8; val_offset:428*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 428*FLEN/8, x10, x1, x4)

inst_240:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x29e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e9e; op2val:0x66a1;
   valaddr_reg:x8; val_offset:430*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 430*FLEN/8, x10, x1, x4)

inst_241:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x29e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e9e; op2val:0x66a1;
   valaddr_reg:x8; val_offset:432*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 432*FLEN/8, x10, x1, x4)

inst_242:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x29e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e9e; op2val:0x66a1;
   valaddr_reg:x8; val_offset:434*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 434*FLEN/8, x10, x1, x4)

inst_243:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x29e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e9e; op2val:0x66a1;
   valaddr_reg:x8; val_offset:436*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 436*FLEN/8, x10, x1, x4)

inst_244:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x29e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e9e; op2val:0x66a1;
   valaddr_reg:x8; val_offset:438*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 438*FLEN/8, x10, x1, x4)

inst_245:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x051 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x053 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3851; op2val:0x7053;
   valaddr_reg:x8; val_offset:440*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 440*FLEN/8, x10, x1, x4)

inst_246:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x051 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x053 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3851; op2val:0x7053;
   valaddr_reg:x8; val_offset:442*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 442*FLEN/8, x10, x1, x4)

inst_247:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x051 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x053 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3851; op2val:0x7053;
   valaddr_reg:x8; val_offset:444*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 444*FLEN/8, x10, x1, x4)

inst_248:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x051 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x053 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3851; op2val:0x7053;
   valaddr_reg:x8; val_offset:446*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 446*FLEN/8, x10, x1, x4)

inst_249:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x051 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x053 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3851; op2val:0x7053;
   valaddr_reg:x8; val_offset:448*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 448*FLEN/8, x10, x1, x4)

inst_250:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1b5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35b2; op2val:0x6db5;
   valaddr_reg:x8; val_offset:450*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 450*FLEN/8, x10, x1, x4)

inst_251:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1b5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35b2; op2val:0x6db5;
   valaddr_reg:x8; val_offset:452*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 452*FLEN/8, x10, x1, x4)

inst_252:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1b5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35b2; op2val:0x6db5;
   valaddr_reg:x8; val_offset:454*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 454*FLEN/8, x10, x1, x4)

inst_253:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1b5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35b2; op2val:0x6db5;
   valaddr_reg:x8; val_offset:456*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 456*FLEN/8, x10, x1, x4)

inst_254:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1b5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35b2; op2val:0x6db5;
   valaddr_reg:x8; val_offset:458*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 458*FLEN/8, x10, x1, x4)

inst_255:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x30d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x310 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x370d; op2val:0x6f10;
   valaddr_reg:x8; val_offset:460*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 460*FLEN/8, x10, x1, x4)

inst_256:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x30d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x310 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x370d; op2val:0x6f10;
   valaddr_reg:x8; val_offset:462*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 462*FLEN/8, x10, x1, x4)

inst_257:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x30d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x310 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x370d; op2val:0x6f10;
   valaddr_reg:x8; val_offset:464*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 464*FLEN/8, x10, x1, x4)

inst_258:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x30d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x310 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x370d; op2val:0x6f10;
   valaddr_reg:x8; val_offset:466*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 466*FLEN/8, x10, x1, x4)

inst_259:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x30d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x310 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x370d; op2val:0x6f10;
   valaddr_reg:x8; val_offset:468*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 468*FLEN/8, x10, x1, x4)

inst_260:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x39b and fs2 == 0 and fe2 == 0x18 and fm2 == 0x39f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b9b; op2val:0x639f;
   valaddr_reg:x8; val_offset:470*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 470*FLEN/8, x10, x1, x4)

inst_261:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x39b and fs2 == 0 and fe2 == 0x18 and fm2 == 0x39f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b9b; op2val:0x639f;
   valaddr_reg:x8; val_offset:472*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 472*FLEN/8, x10, x1, x4)

inst_262:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x39b and fs2 == 0 and fe2 == 0x18 and fm2 == 0x39f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b9b; op2val:0x639f;
   valaddr_reg:x8; val_offset:474*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 474*FLEN/8, x10, x1, x4)

inst_263:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x39b and fs2 == 0 and fe2 == 0x18 and fm2 == 0x39f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b9b; op2val:0x639f;
   valaddr_reg:x8; val_offset:476*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 476*FLEN/8, x10, x1, x4)

inst_264:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x39b and fs2 == 0 and fe2 == 0x18 and fm2 == 0x39f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b9b; op2val:0x639f;
   valaddr_reg:x8; val_offset:478*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 478*FLEN/8, x10, x1, x4)

inst_265:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708f;
   valaddr_reg:x8; val_offset:480*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 480*FLEN/8, x10, x1, x4)

inst_266:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708f;
   valaddr_reg:x8; val_offset:482*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 482*FLEN/8, x10, x1, x4)

inst_267:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708f;
   valaddr_reg:x8; val_offset:484*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 484*FLEN/8, x10, x1, x4)

inst_268:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708f;
   valaddr_reg:x8; val_offset:486*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 486*FLEN/8, x10, x1, x4)

inst_269:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708f;
   valaddr_reg:x8; val_offset:488*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 488*FLEN/8, x10, x1, x4)

inst_270:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a19; op2val:0x721c;
   valaddr_reg:x8; val_offset:490*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 490*FLEN/8, x10, x1, x4)

inst_271:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a19; op2val:0x721c;
   valaddr_reg:x8; val_offset:492*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 492*FLEN/8, x10, x1, x4)

inst_272:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a19; op2val:0x721c;
   valaddr_reg:x8; val_offset:494*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 494*FLEN/8, x10, x1, x4)

inst_273:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a19; op2val:0x721c;
   valaddr_reg:x8; val_offset:496*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 496*FLEN/8, x10, x1, x4)

inst_274:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x219 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a19; op2val:0x721c;
   valaddr_reg:x8; val_offset:498*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 498*FLEN/8, x10, x1, x4)

inst_275:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x1b5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x25b2; op2val:0x5db5;
   valaddr_reg:x8; val_offset:500*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 500*FLEN/8, x10, x1, x4)

inst_276:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x1b5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x25b2; op2val:0x5db5;
   valaddr_reg:x8; val_offset:502*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 502*FLEN/8, x10, x1, x4)

inst_277:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x1b5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x25b2; op2val:0x5db5;
   valaddr_reg:x8; val_offset:504*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 504*FLEN/8, x10, x1, x4)

inst_278:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x1b5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x25b2; op2val:0x5db5;
   valaddr_reg:x8; val_offset:506*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 506*FLEN/8, x10, x1, x4)

inst_279:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x1b2 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x1b5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x25b2; op2val:0x5db5;
   valaddr_reg:x8; val_offset:508*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 508*FLEN/8, x10, x1, x4)

inst_280:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x33d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3739; op2val:0x6f3d;
   valaddr_reg:x8; val_offset:510*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 510*FLEN/8, x10, x1, x4)

inst_281:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x33d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3739; op2val:0x6f3d;
   valaddr_reg:x8; val_offset:512*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 512*FLEN/8, x10, x1, x4)

inst_282:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x33d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3739; op2val:0x6f3d;
   valaddr_reg:x8; val_offset:514*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 514*FLEN/8, x10, x1, x4)

inst_283:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x33d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3739; op2val:0x6f3d;
   valaddr_reg:x8; val_offset:516*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 516*FLEN/8, x10, x1, x4)

inst_284:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x33d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3739; op2val:0x6f3d;
   valaddr_reg:x8; val_offset:518*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 518*FLEN/8, x10, x1, x4)

inst_285:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38ad; op2val:0x70b0;
   valaddr_reg:x8; val_offset:520*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 520*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_286:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38ad; op2val:0x70b0;
   valaddr_reg:x8; val_offset:522*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 522*FLEN/8, x10, x1, x4)

inst_287:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38ad; op2val:0x70b0;
   valaddr_reg:x8; val_offset:524*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 524*FLEN/8, x10, x1, x4)

inst_288:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38ad; op2val:0x70b0;
   valaddr_reg:x8; val_offset:526*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 526*FLEN/8, x10, x1, x4)

inst_289:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38ad; op2val:0x70b0;
   valaddr_reg:x8; val_offset:528*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 528*FLEN/8, x10, x1, x4)

inst_290:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d6 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3da and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd6; op2val:0x73da;
   valaddr_reg:x8; val_offset:530*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 530*FLEN/8, x10, x1, x4)

inst_291:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d6 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3da and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd6; op2val:0x73da;
   valaddr_reg:x8; val_offset:532*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 532*FLEN/8, x10, x1, x4)

inst_292:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d6 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3da and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd6; op2val:0x73da;
   valaddr_reg:x8; val_offset:534*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 534*FLEN/8, x10, x1, x4)

inst_293:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d6 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3da and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd6; op2val:0x73da;
   valaddr_reg:x8; val_offset:536*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 536*FLEN/8, x10, x1, x4)

inst_294:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d6 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3da and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd6; op2val:0x73da;
   valaddr_reg:x8; val_offset:538*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 538*FLEN/8, x10, x1, x4)

inst_295:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1e5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35e2; op2val:0x6de5;
   valaddr_reg:x8; val_offset:540*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 540*FLEN/8, x10, x1, x4)

inst_296:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1e5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35e2; op2val:0x6de5;
   valaddr_reg:x8; val_offset:542*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 542*FLEN/8, x10, x1, x4)

inst_297:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1e5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35e2; op2val:0x6de5;
   valaddr_reg:x8; val_offset:544*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 544*FLEN/8, x10, x1, x4)

inst_298:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1e5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35e2; op2val:0x6de5;
   valaddr_reg:x8; val_offset:546*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 546*FLEN/8, x10, x1, x4)

inst_299:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1e5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35e2; op2val:0x6de5;
   valaddr_reg:x8; val_offset:548*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 548*FLEN/8, x10, x1, x4)

inst_300:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f6; op2val:0x6df9;
   valaddr_reg:x8; val_offset:550*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 550*FLEN/8, x10, x1, x4)

inst_301:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f6; op2val:0x6df9;
   valaddr_reg:x8; val_offset:552*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 552*FLEN/8, x10, x1, x4)

inst_302:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f6; op2val:0x6df9;
   valaddr_reg:x8; val_offset:554*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 554*FLEN/8, x10, x1, x4)

inst_303:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f6; op2val:0x6df9;
   valaddr_reg:x8; val_offset:556*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 556*FLEN/8, x10, x1, x4)

inst_304:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f6; op2val:0x6df9;
   valaddr_reg:x8; val_offset:558*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 558*FLEN/8, x10, x1, x4)

inst_305:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x124 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3521; op2val:0x6d24;
   valaddr_reg:x8; val_offset:560*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 560*FLEN/8, x10, x1, x4)

inst_306:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x124 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3521; op2val:0x6d24;
   valaddr_reg:x8; val_offset:562*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 562*FLEN/8, x10, x1, x4)

inst_307:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x124 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3521; op2val:0x6d24;
   valaddr_reg:x8; val_offset:564*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 564*FLEN/8, x10, x1, x4)

inst_308:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x124 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3521; op2val:0x6d24;
   valaddr_reg:x8; val_offset:566*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 566*FLEN/8, x10, x1, x4)

inst_309:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x124 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3521; op2val:0x6d24;
   valaddr_reg:x8; val_offset:568*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 568*FLEN/8, x10, x1, x4)

inst_310:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0b2 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b0; op2val:0x6cb2;
   valaddr_reg:x8; val_offset:570*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 570*FLEN/8, x10, x1, x4)

inst_311:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0b2 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b0; op2val:0x6cb2;
   valaddr_reg:x8; val_offset:572*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 572*FLEN/8, x10, x1, x4)

inst_312:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0b2 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b0; op2val:0x6cb2;
   valaddr_reg:x8; val_offset:574*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 574*FLEN/8, x10, x1, x4)

inst_313:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0b2 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b0; op2val:0x6cb2;
   valaddr_reg:x8; val_offset:576*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 576*FLEN/8, x10, x1, x4)

inst_314:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0b2 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b0; op2val:0x6cb2;
   valaddr_reg:x8; val_offset:578*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 578*FLEN/8, x10, x1, x4)

inst_315:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d6 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd2; op2val:0x73d6;
   valaddr_reg:x8; val_offset:580*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 580*FLEN/8, x10, x1, x4)

inst_316:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d6 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd2; op2val:0x73d6;
   valaddr_reg:x8; val_offset:582*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 582*FLEN/8, x10, x1, x4)

inst_317:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d6 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd2; op2val:0x73d6;
   valaddr_reg:x8; val_offset:584*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 584*FLEN/8, x10, x1, x4)

inst_318:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d6 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd2; op2val:0x73d6;
   valaddr_reg:x8; val_offset:586*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 586*FLEN/8, x10, x1, x4)

inst_319:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d6 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bd2; op2val:0x73d6;
   valaddr_reg:x8; val_offset:588*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 588*FLEN/8, x10, x1, x4)

inst_320:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1b and fm2 == 0x131 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x352f; op2val:0x6d31;
   valaddr_reg:x8; val_offset:590*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 590*FLEN/8, x10, x1, x4)

inst_321:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1b and fm2 == 0x131 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x352f; op2val:0x6d31;
   valaddr_reg:x8; val_offset:592*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 592*FLEN/8, x10, x1, x4)

inst_322:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1b and fm2 == 0x131 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x352f; op2val:0x6d31;
   valaddr_reg:x8; val_offset:594*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 594*FLEN/8, x10, x1, x4)

inst_323:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1b and fm2 == 0x131 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x352f; op2val:0x6d31;
   valaddr_reg:x8; val_offset:596*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 596*FLEN/8, x10, x1, x4)

inst_324:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1b and fm2 == 0x131 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x352f; op2val:0x6d31;
   valaddr_reg:x8; val_offset:598*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 598*FLEN/8, x10, x1, x4)

inst_325:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fd; op2val:0x7200;
   valaddr_reg:x8; val_offset:600*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 600*FLEN/8, x10, x1, x4)

inst_326:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fd; op2val:0x7200;
   valaddr_reg:x8; val_offset:602*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 602*FLEN/8, x10, x1, x4)

inst_327:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fd; op2val:0x7200;
   valaddr_reg:x8; val_offset:604*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 604*FLEN/8, x10, x1, x4)

inst_328:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fd; op2val:0x7200;
   valaddr_reg:x8; val_offset:606*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 606*FLEN/8, x10, x1, x4)

inst_329:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fd; op2val:0x7200;
   valaddr_reg:x8; val_offset:608*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 608*FLEN/8, x10, x1, x4)

inst_330:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x284 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x287 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3684; op2val:0x6e87;
   valaddr_reg:x8; val_offset:610*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 610*FLEN/8, x10, x1, x4)

inst_331:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x284 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x287 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3684; op2val:0x6e87;
   valaddr_reg:x8; val_offset:612*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 612*FLEN/8, x10, x1, x4)

inst_332:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x284 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x287 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3684; op2val:0x6e87;
   valaddr_reg:x8; val_offset:614*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 614*FLEN/8, x10, x1, x4)

inst_333:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x284 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x287 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3684; op2val:0x6e87;
   valaddr_reg:x8; val_offset:616*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 616*FLEN/8, x10, x1, x4)

inst_334:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x284 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x287 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3684; op2val:0x6e87;
   valaddr_reg:x8; val_offset:618*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 618*FLEN/8, x10, x1, x4)

inst_335:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x119 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3916; op2val:0x7119;
   valaddr_reg:x8; val_offset:620*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 620*FLEN/8, x10, x1, x4)

inst_336:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x119 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3916; op2val:0x7119;
   valaddr_reg:x8; val_offset:622*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 622*FLEN/8, x10, x1, x4)

inst_337:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x119 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3916; op2val:0x7119;
   valaddr_reg:x8; val_offset:624*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 624*FLEN/8, x10, x1, x4)

inst_338:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x119 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3916; op2val:0x7119;
   valaddr_reg:x8; val_offset:626*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 626*FLEN/8, x10, x1, x4)

inst_339:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x116 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x119 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3916; op2val:0x7119;
   valaddr_reg:x8; val_offset:628*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 628*FLEN/8, x10, x1, x4)

inst_340:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390c; op2val:0x710e;
   valaddr_reg:x8; val_offset:630*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 630*FLEN/8, x10, x1, x4)

inst_341:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390c; op2val:0x710e;
   valaddr_reg:x8; val_offset:632*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 632*FLEN/8, x10, x1, x4)

inst_342:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390c; op2val:0x710e;
   valaddr_reg:x8; val_offset:634*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 634*FLEN/8, x10, x1, x4)

inst_343:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390c; op2val:0x710e;
   valaddr_reg:x8; val_offset:636*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 636*FLEN/8, x10, x1, x4)

inst_344:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390c; op2val:0x710e;
   valaddr_reg:x8; val_offset:638*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 638*FLEN/8, x10, x1, x4)

inst_345:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x198 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x19b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3998; op2val:0x719b;
   valaddr_reg:x8; val_offset:640*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 640*FLEN/8, x10, x1, x4)

inst_346:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x198 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x19b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3998; op2val:0x719b;
   valaddr_reg:x8; val_offset:642*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 642*FLEN/8, x10, x1, x4)

inst_347:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x198 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x19b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3998; op2val:0x719b;
   valaddr_reg:x8; val_offset:644*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 644*FLEN/8, x10, x1, x4)

inst_348:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x198 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x19b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3998; op2val:0x719b;
   valaddr_reg:x8; val_offset:646*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 646*FLEN/8, x10, x1, x4)

inst_349:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x198 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x19b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3998; op2val:0x719b;
   valaddr_reg:x8; val_offset:648*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 648*FLEN/8, x10, x1, x4)

inst_350:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x349 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x34d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3349; op2val:0x6b4d;
   valaddr_reg:x8; val_offset:650*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 650*FLEN/8, x10, x1, x4)

inst_351:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x349 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x34d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3349; op2val:0x6b4d;
   valaddr_reg:x8; val_offset:652*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 652*FLEN/8, x10, x1, x4)

inst_352:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x349 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x34d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3349; op2val:0x6b4d;
   valaddr_reg:x8; val_offset:654*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 654*FLEN/8, x10, x1, x4)

inst_353:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x349 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x34d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3349; op2val:0x6b4d;
   valaddr_reg:x8; val_offset:656*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 656*FLEN/8, x10, x1, x4)

inst_354:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x349 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x34d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3349; op2val:0x6b4d;
   valaddr_reg:x8; val_offset:658*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 658*FLEN/8, x10, x1, x4)

inst_355:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2e7 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36e4; op2val:0x6ee7;
   valaddr_reg:x8; val_offset:660*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 660*FLEN/8, x10, x1, x4)

inst_356:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2e7 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36e4; op2val:0x6ee7;
   valaddr_reg:x8; val_offset:662*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 662*FLEN/8, x10, x1, x4)

inst_357:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2e7 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36e4; op2val:0x6ee7;
   valaddr_reg:x8; val_offset:664*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 664*FLEN/8, x10, x1, x4)

inst_358:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2e7 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36e4; op2val:0x6ee7;
   valaddr_reg:x8; val_offset:666*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 666*FLEN/8, x10, x1, x4)

inst_359:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2e7 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36e4; op2val:0x6ee7;
   valaddr_reg:x8; val_offset:668*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 668*FLEN/8, x10, x1, x4)

inst_360:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x187 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7187;
   valaddr_reg:x8; val_offset:670*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 670*FLEN/8, x10, x1, x4)

inst_361:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x187 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7187;
   valaddr_reg:x8; val_offset:672*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 672*FLEN/8, x10, x1, x4)

inst_362:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x187 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7187;
   valaddr_reg:x8; val_offset:674*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 674*FLEN/8, x10, x1, x4)

inst_363:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x187 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7187;
   valaddr_reg:x8; val_offset:676*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 676*FLEN/8, x10, x1, x4)

inst_364:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x185 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x187 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3985; op2val:0x7187;
   valaddr_reg:x8; val_offset:678*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 678*FLEN/8, x10, x1, x4)

inst_365:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x247 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x24a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3247; op2val:0x6a4a;
   valaddr_reg:x8; val_offset:680*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 680*FLEN/8, x10, x1, x4)

inst_366:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x247 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x24a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3247; op2val:0x6a4a;
   valaddr_reg:x8; val_offset:682*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 682*FLEN/8, x10, x1, x4)

inst_367:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x247 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x24a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3247; op2val:0x6a4a;
   valaddr_reg:x8; val_offset:684*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 684*FLEN/8, x10, x1, x4)

inst_368:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x247 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x24a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3247; op2val:0x6a4a;
   valaddr_reg:x8; val_offset:686*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 686*FLEN/8, x10, x1, x4)

inst_369:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x247 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x24a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3247; op2val:0x6a4a;
   valaddr_reg:x8; val_offset:688*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 688*FLEN/8, x10, x1, x4)

inst_370:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x283 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7283;
   valaddr_reg:x8; val_offset:690*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 690*FLEN/8, x10, x1, x4)

inst_371:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x283 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7283;
   valaddr_reg:x8; val_offset:692*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 692*FLEN/8, x10, x1, x4)

inst_372:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x283 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7283;
   valaddr_reg:x8; val_offset:694*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 694*FLEN/8, x10, x1, x4)

inst_373:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x283 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7283;
   valaddr_reg:x8; val_offset:696*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 696*FLEN/8, x10, x1, x4)

inst_374:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x283 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7283;
   valaddr_reg:x8; val_offset:698*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 698*FLEN/8, x10, x1, x4)

inst_375:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d7 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34d4; op2val:0x6cd7;
   valaddr_reg:x8; val_offset:700*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 700*FLEN/8, x10, x1, x4)

inst_376:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d7 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34d4; op2val:0x6cd7;
   valaddr_reg:x8; val_offset:702*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 702*FLEN/8, x10, x1, x4)

inst_377:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d7 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34d4; op2val:0x6cd7;
   valaddr_reg:x8; val_offset:704*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 704*FLEN/8, x10, x1, x4)

inst_378:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d7 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34d4; op2val:0x6cd7;
   valaddr_reg:x8; val_offset:706*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 706*FLEN/8, x10, x1, x4)

inst_379:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d7 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34d4; op2val:0x6cd7;
   valaddr_reg:x8; val_offset:708*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 708*FLEN/8, x10, x1, x4)

inst_380:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x716f;
   valaddr_reg:x8; val_offset:710*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 710*FLEN/8, x10, x1, x4)

inst_381:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x716f;
   valaddr_reg:x8; val_offset:712*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 712*FLEN/8, x10, x1, x4)

inst_382:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x716f;
   valaddr_reg:x8; val_offset:714*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 714*FLEN/8, x10, x1, x4)

inst_383:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x716f;
   valaddr_reg:x8; val_offset:716*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 716*FLEN/8, x10, x1, x4)

inst_384:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x716f;
   valaddr_reg:x8; val_offset:718*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 718*FLEN/8, x10, x1, x4)

inst_385:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x154 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x156 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3154; op2val:0x6956;
   valaddr_reg:x8; val_offset:720*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 720*FLEN/8, x10, x1, x4)

inst_386:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x154 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x156 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3154; op2val:0x6956;
   valaddr_reg:x8; val_offset:722*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 722*FLEN/8, x10, x1, x4)

inst_387:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x154 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x156 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3154; op2val:0x6956;
   valaddr_reg:x8; val_offset:724*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 724*FLEN/8, x10, x1, x4)

inst_388:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x154 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x156 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3154; op2val:0x6956;
   valaddr_reg:x8; val_offset:726*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 726*FLEN/8, x10, x1, x4)

inst_389:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x154 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x156 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3154; op2val:0x6956;
   valaddr_reg:x8; val_offset:728*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 728*FLEN/8, x10, x1, x4)

inst_390:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x09f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a2 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x309f; op2val:0x68a2;
   valaddr_reg:x8; val_offset:730*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 730*FLEN/8, x10, x1, x4)

inst_391:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x09f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a2 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x309f; op2val:0x68a2;
   valaddr_reg:x8; val_offset:732*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 732*FLEN/8, x10, x1, x4)

inst_392:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x09f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a2 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x309f; op2val:0x68a2;
   valaddr_reg:x8; val_offset:734*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 734*FLEN/8, x10, x1, x4)

inst_393:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x09f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a2 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x309f; op2val:0x68a2;
   valaddr_reg:x8; val_offset:736*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 736*FLEN/8, x10, x1, x4)

inst_394:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x09f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a2 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x309f; op2val:0x68a2;
   valaddr_reg:x8; val_offset:738*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 738*FLEN/8, x10, x1, x4)

inst_395:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x14e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x150 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x394e; op2val:0x7150;
   valaddr_reg:x8; val_offset:740*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 740*FLEN/8, x10, x1, x4)

inst_396:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x14e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x150 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x394e; op2val:0x7150;
   valaddr_reg:x8; val_offset:742*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 742*FLEN/8, x10, x1, x4)

inst_397:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x14e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x150 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x394e; op2val:0x7150;
   valaddr_reg:x8; val_offset:744*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 744*FLEN/8, x10, x1, x4)

inst_398:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x14e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x150 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x394e; op2val:0x7150;
   valaddr_reg:x8; val_offset:746*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 746*FLEN/8, x10, x1, x4)

inst_399:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x14e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x150 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x394e; op2val:0x7150;
   valaddr_reg:x8; val_offset:748*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 748*FLEN/8, x10, x1, x4)

inst_400:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x35e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x362 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f5e; op2val:0x6762;
   valaddr_reg:x8; val_offset:750*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 750*FLEN/8, x10, x1, x4)

inst_401:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x35e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x362 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f5e; op2val:0x6762;
   valaddr_reg:x8; val_offset:752*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 752*FLEN/8, x10, x1, x4)

inst_402:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x35e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x362 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f5e; op2val:0x6762;
   valaddr_reg:x8; val_offset:754*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 754*FLEN/8, x10, x1, x4)

inst_403:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x35e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x362 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f5e; op2val:0x6762;
   valaddr_reg:x8; val_offset:756*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 756*FLEN/8, x10, x1, x4)

inst_404:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x35e and fs2 == 0 and fe2 == 0x19 and fm2 == 0x362 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2f5e; op2val:0x6762;
   valaddr_reg:x8; val_offset:758*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 758*FLEN/8, x10, x1, x4)

inst_405:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x236 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a33; op2val:0x7236;
   valaddr_reg:x8; val_offset:760*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 760*FLEN/8, x10, x1, x4)

inst_406:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x236 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a33; op2val:0x7236;
   valaddr_reg:x8; val_offset:762*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 762*FLEN/8, x10, x1, x4)

inst_407:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x236 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a33; op2val:0x7236;
   valaddr_reg:x8; val_offset:764*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 764*FLEN/8, x10, x1, x4)

inst_408:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x236 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a33; op2val:0x7236;
   valaddr_reg:x8; val_offset:766*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 766*FLEN/8, x10, x1, x4)

inst_409:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x236 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a33; op2val:0x7236;
   valaddr_reg:x8; val_offset:768*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 768*FLEN/8, x10, x1, x4)

inst_410:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x386 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x38a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3786; op2val:0x6f8a;
   valaddr_reg:x8; val_offset:770*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 770*FLEN/8, x10, x1, x4)

inst_411:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x386 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x38a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3786; op2val:0x6f8a;
   valaddr_reg:x8; val_offset:772*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 772*FLEN/8, x10, x1, x4)

inst_412:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x386 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x38a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3786; op2val:0x6f8a;
   valaddr_reg:x8; val_offset:774*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 774*FLEN/8, x10, x1, x4)

inst_413:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x386 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x38a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3786; op2val:0x6f8a;
   valaddr_reg:x8; val_offset:776*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 776*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_414:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x386 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x38a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3786; op2val:0x6f8a;
   valaddr_reg:x8; val_offset:778*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 778*FLEN/8, x10, x1, x4)

inst_415:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x232 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322f; op2val:0x6a32;
   valaddr_reg:x8; val_offset:780*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 780*FLEN/8, x10, x1, x4)

inst_416:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x232 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322f; op2val:0x6a32;
   valaddr_reg:x8; val_offset:782*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 782*FLEN/8, x10, x1, x4)

inst_417:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x232 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322f; op2val:0x6a32;
   valaddr_reg:x8; val_offset:784*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 784*FLEN/8, x10, x1, x4)

inst_418:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x232 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322f; op2val:0x6a32;
   valaddr_reg:x8; val_offset:786*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 786*FLEN/8, x10, x1, x4)

inst_419:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22f and fs2 == 0 and fe2 == 0x1a and fm2 == 0x232 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322f; op2val:0x6a32;
   valaddr_reg:x8; val_offset:788*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 788*FLEN/8, x10, x1, x4)

inst_420:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x288 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0e7 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a88; op2val:0x74e7;
   valaddr_reg:x8; val_offset:790*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 790*FLEN/8, x10, x1, x4)

inst_421:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x288 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0e7 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a88; op2val:0x74e7;
   valaddr_reg:x8; val_offset:792*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 792*FLEN/8, x10, x1, x4)

inst_422:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x288 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0e7 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a88; op2val:0x74e7;
   valaddr_reg:x8; val_offset:794*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 794*FLEN/8, x10, x1, x4)

inst_423:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x288 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0e7 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a88; op2val:0x74e7;
   valaddr_reg:x8; val_offset:796*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 796*FLEN/8, x10, x1, x4)

inst_424:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x288 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0e7 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a88; op2val:0x74e7;
   valaddr_reg:x8; val_offset:798*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 798*FLEN/8, x10, x1, x4)

inst_425:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322b; op2val:0x6ca1;
   valaddr_reg:x8; val_offset:800*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 800*FLEN/8, x10, x1, x4)

inst_426:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322b; op2val:0x6ca1;
   valaddr_reg:x8; val_offset:802*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 802*FLEN/8, x10, x1, x4)

inst_427:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322b; op2val:0x6ca1;
   valaddr_reg:x8; val_offset:804*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 804*FLEN/8, x10, x1, x4)

inst_428:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322b; op2val:0x6ca1;
   valaddr_reg:x8; val_offset:806*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 806*FLEN/8, x10, x1, x4)

inst_429:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x322b; op2val:0x6ca1;
   valaddr_reg:x8; val_offset:808*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 808*FLEN/8, x10, x1, x4)

inst_430:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a7 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3233; op2val:0x6ca7;
   valaddr_reg:x8; val_offset:810*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 810*FLEN/8, x10, x1, x4)

inst_431:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a7 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3233; op2val:0x6ca7;
   valaddr_reg:x8; val_offset:812*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 812*FLEN/8, x10, x1, x4)

inst_432:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a7 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3233; op2val:0x6ca7;
   valaddr_reg:x8; val_offset:814*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 814*FLEN/8, x10, x1, x4)

inst_433:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a7 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3233; op2val:0x6ca7;
   valaddr_reg:x8; val_offset:816*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 816*FLEN/8, x10, x1, x4)

inst_434:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x233 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0a7 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3233; op2val:0x6ca7;
   valaddr_reg:x8; val_offset:818*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 818*FLEN/8, x10, x1, x4)

inst_435:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x13a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3af6; op2val:0x753a;
   valaddr_reg:x8; val_offset:820*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 820*FLEN/8, x10, x1, x4)

inst_436:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x13a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3af6; op2val:0x753a;
   valaddr_reg:x8; val_offset:822*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 822*FLEN/8, x10, x1, x4)

inst_437:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x13a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3af6; op2val:0x753a;
   valaddr_reg:x8; val_offset:824*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 824*FLEN/8, x10, x1, x4)

inst_438:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x13a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3af6; op2val:0x753a;
   valaddr_reg:x8; val_offset:826*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 826*FLEN/8, x10, x1, x4)

inst_439:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x13a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3af6; op2val:0x753a;
   valaddr_reg:x8; val_offset:828*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 828*FLEN/8, x10, x1, x4)

inst_440:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x298 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0f3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3298; op2val:0x6cf3;
   valaddr_reg:x8; val_offset:830*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 830*FLEN/8, x10, x1, x4)

inst_441:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x298 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0f3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3298; op2val:0x6cf3;
   valaddr_reg:x8; val_offset:832*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 832*FLEN/8, x10, x1, x4)

inst_442:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x298 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0f3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3298; op2val:0x6cf3;
   valaddr_reg:x8; val_offset:834*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 834*FLEN/8, x10, x1, x4)

inst_443:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x298 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0f3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3298; op2val:0x6cf3;
   valaddr_reg:x8; val_offset:836*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 836*FLEN/8, x10, x1, x4)

inst_444:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x298 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0f3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3298; op2val:0x6cf3;
   valaddr_reg:x8; val_offset:838*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 838*FLEN/8, x10, x1, x4)

inst_445:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x13a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x393a; op2val:0x73d9;
   valaddr_reg:x8; val_offset:840*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 840*FLEN/8, x10, x1, x4)

inst_446:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x13a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x393a; op2val:0x73d9;
   valaddr_reg:x8; val_offset:842*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 842*FLEN/8, x10, x1, x4)

inst_447:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x13a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x393a; op2val:0x73d9;
   valaddr_reg:x8; val_offset:844*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 844*FLEN/8, x10, x1, x4)

inst_448:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x13a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x393a; op2val:0x73d9;
   valaddr_reg:x8; val_offset:846*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 846*FLEN/8, x10, x1, x4)

inst_449:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x13a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3d9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x393a; op2val:0x73d9;
   valaddr_reg:x8; val_offset:848*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 848*FLEN/8, x10, x1, x4)

inst_450:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a4 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2f8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a4; op2val:0x72f8;
   valaddr_reg:x8; val_offset:850*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 850*FLEN/8, x10, x1, x4)

inst_451:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a4 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2f8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a4; op2val:0x72f8;
   valaddr_reg:x8; val_offset:852*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 852*FLEN/8, x10, x1, x4)

inst_452:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a4 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2f8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a4; op2val:0x72f8;
   valaddr_reg:x8; val_offset:854*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 854*FLEN/8, x10, x1, x4)

inst_453:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a4 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2f8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a4; op2val:0x72f8;
   valaddr_reg:x8; val_offset:856*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 856*FLEN/8, x10, x1, x4)

inst_454:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a4 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2f8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a4; op2val:0x72f8;
   valaddr_reg:x8; val_offset:858*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 858*FLEN/8, x10, x1, x4)

inst_455:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x115 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d15; op2val:0x67a1;
   valaddr_reg:x8; val_offset:860*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 860*FLEN/8, x10, x1, x4)

inst_456:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x115 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d15; op2val:0x67a1;
   valaddr_reg:x8; val_offset:862*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 862*FLEN/8, x10, x1, x4)

inst_457:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x115 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d15; op2val:0x67a1;
   valaddr_reg:x8; val_offset:864*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 864*FLEN/8, x10, x1, x4)

inst_458:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x115 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d15; op2val:0x67a1;
   valaddr_reg:x8; val_offset:866*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 866*FLEN/8, x10, x1, x4)

inst_459:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x115 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d15; op2val:0x67a1;
   valaddr_reg:x8; val_offset:868*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 868*FLEN/8, x10, x1, x4)

inst_460:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1fa and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf6; op2val:0x75fa;
   valaddr_reg:x8; val_offset:870*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 870*FLEN/8, x10, x1, x4)

inst_461:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1fa and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf6; op2val:0x75fa;
   valaddr_reg:x8; val_offset:872*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 872*FLEN/8, x10, x1, x4)

inst_462:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1fa and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf6; op2val:0x75fa;
   valaddr_reg:x8; val_offset:874*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 874*FLEN/8, x10, x1, x4)

inst_463:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1fa and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf6; op2val:0x75fa;
   valaddr_reg:x8; val_offset:876*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 876*FLEN/8, x10, x1, x4)

inst_464:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f6 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1fa and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf6; op2val:0x75fa;
   valaddr_reg:x8; val_offset:878*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 878*FLEN/8, x10, x1, x4)

inst_465:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3af and fs2 == 0 and fe2 == 0x1a and fm2 == 0x1c4 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2faf; op2val:0x69c4;
   valaddr_reg:x8; val_offset:880*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 880*FLEN/8, x10, x1, x4)

inst_466:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3af and fs2 == 0 and fe2 == 0x1a and fm2 == 0x1c4 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2faf; op2val:0x69c4;
   valaddr_reg:x8; val_offset:882*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 882*FLEN/8, x10, x1, x4)

inst_467:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3af and fs2 == 0 and fe2 == 0x1a and fm2 == 0x1c4 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2faf; op2val:0x69c4;
   valaddr_reg:x8; val_offset:884*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 884*FLEN/8, x10, x1, x4)

inst_468:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3af and fs2 == 0 and fe2 == 0x1a and fm2 == 0x1c4 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2faf; op2val:0x69c4;
   valaddr_reg:x8; val_offset:886*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 886*FLEN/8, x10, x1, x4)

inst_469:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3af and fs2 == 0 and fe2 == 0x1a and fm2 == 0x1c4 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2faf; op2val:0x69c4;
   valaddr_reg:x8; val_offset:888*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 888*FLEN/8, x10, x1, x4)

inst_470:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2cb and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3886; op2val:0x72cb;
   valaddr_reg:x8; val_offset:890*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 890*FLEN/8, x10, x1, x4)

inst_471:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2cb and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3886; op2val:0x72cb;
   valaddr_reg:x8; val_offset:892*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 892*FLEN/8, x10, x1, x4)

inst_472:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2cb and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3886; op2val:0x72cb;
   valaddr_reg:x8; val_offset:894*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 894*FLEN/8, x10, x1, x4)

inst_473:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2cb and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3886; op2val:0x72cb;
   valaddr_reg:x8; val_offset:896*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 896*FLEN/8, x10, x1, x4)

inst_474:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2cb and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3886; op2val:0x72cb;
   valaddr_reg:x8; val_offset:898*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 898*FLEN/8, x10, x1, x4)

inst_475:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0a6 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2fb and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ca6; op2val:0x66fb;
   valaddr_reg:x8; val_offset:900*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 900*FLEN/8, x10, x1, x4)

inst_476:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0a6 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2fb and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ca6; op2val:0x66fb;
   valaddr_reg:x8; val_offset:902*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 902*FLEN/8, x10, x1, x4)

inst_477:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0a6 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2fb and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ca6; op2val:0x66fb;
   valaddr_reg:x8; val_offset:904*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 904*FLEN/8, x10, x1, x4)

inst_478:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0a6 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2fb and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ca6; op2val:0x66fb;
   valaddr_reg:x8; val_offset:906*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 906*FLEN/8, x10, x1, x4)

inst_479:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0a6 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2fb and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ca6; op2val:0x66fb;
   valaddr_reg:x8; val_offset:908*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 908*FLEN/8, x10, x1, x4)

inst_480:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x21c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3412; op2val:0x6e1c;
   valaddr_reg:x8; val_offset:910*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 910*FLEN/8, x10, x1, x4)

inst_481:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x21c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3412; op2val:0x6e1c;
   valaddr_reg:x8; val_offset:912*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 912*FLEN/8, x10, x1, x4)

inst_482:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x21c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3412; op2val:0x6e1c;
   valaddr_reg:x8; val_offset:914*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 914*FLEN/8, x10, x1, x4)

inst_483:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x21c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3412; op2val:0x6e1c;
   valaddr_reg:x8; val_offset:916*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 916*FLEN/8, x10, x1, x4)

inst_484:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x012 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x21c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3412; op2val:0x6e1c;
   valaddr_reg:x8; val_offset:918*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 918*FLEN/8, x10, x1, x4)

inst_485:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x164 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x00c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3564; op2val:0x700c;
   valaddr_reg:x8; val_offset:920*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 920*FLEN/8, x10, x1, x4)

inst_486:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x164 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x00c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3564; op2val:0x700c;
   valaddr_reg:x8; val_offset:922*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 922*FLEN/8, x10, x1, x4)

inst_487:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x164 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x00c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3564; op2val:0x700c;
   valaddr_reg:x8; val_offset:924*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 924*FLEN/8, x10, x1, x4)

inst_488:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x164 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x00c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3564; op2val:0x700c;
   valaddr_reg:x8; val_offset:926*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 926*FLEN/8, x10, x1, x4)

inst_489:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x164 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x00c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3564; op2val:0x700c;
   valaddr_reg:x8; val_offset:928*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 928*FLEN/8, x10, x1, x4)

inst_490:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x045 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b0; op2val:0x7445;
   valaddr_reg:x8; val_offset:930*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 930*FLEN/8, x10, x1, x4)

inst_491:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x045 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b0; op2val:0x7445;
   valaddr_reg:x8; val_offset:932*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 932*FLEN/8, x10, x1, x4)

inst_492:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x045 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b0; op2val:0x7445;
   valaddr_reg:x8; val_offset:934*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 934*FLEN/8, x10, x1, x4)

inst_493:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x045 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b0; op2val:0x7445;
   valaddr_reg:x8; val_offset:936*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 936*FLEN/8, x10, x1, x4)

inst_494:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x045 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b0; op2val:0x7445;
   valaddr_reg:x8; val_offset:938*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 938*FLEN/8, x10, x1, x4)

inst_495:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x22e and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0a3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a2e; op2val:0x74a3;
   valaddr_reg:x8; val_offset:940*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 940*FLEN/8, x10, x1, x4)

inst_496:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x22e and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0a3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a2e; op2val:0x74a3;
   valaddr_reg:x8; val_offset:942*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 942*FLEN/8, x10, x1, x4)

inst_497:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x22e and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0a3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a2e; op2val:0x74a3;
   valaddr_reg:x8; val_offset:944*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 944*FLEN/8, x10, x1, x4)

inst_498:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x22e and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0a3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a2e; op2val:0x74a3;
   valaddr_reg:x8; val_offset:946*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 946*FLEN/8, x10, x1, x4)

inst_499:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x22e and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0a3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a2e; op2val:0x74a3;
   valaddr_reg:x8; val_offset:948*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 948*FLEN/8, x10, x1, x4)

inst_500:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x294 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3694; op2val:0x70f0;
   valaddr_reg:x8; val_offset:950*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 950*FLEN/8, x10, x1, x4)

inst_501:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x294 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3694; op2val:0x70f0;
   valaddr_reg:x8; val_offset:952*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 952*FLEN/8, x10, x1, x4)

inst_502:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x294 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3694; op2val:0x70f0;
   valaddr_reg:x8; val_offset:954*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 954*FLEN/8, x10, x1, x4)

inst_503:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x294 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3694; op2val:0x70f0;
   valaddr_reg:x8; val_offset:956*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 956*FLEN/8, x10, x1, x4)

inst_504:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x294 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3694; op2val:0x70f0;
   valaddr_reg:x8; val_offset:958*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 958*FLEN/8, x10, x1, x4)

inst_505:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x213 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3213; op2val:0x6c8f;
   valaddr_reg:x8; val_offset:960*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 960*FLEN/8, x10, x1, x4)

inst_506:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x213 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3213; op2val:0x6c8f;
   valaddr_reg:x8; val_offset:962*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 962*FLEN/8, x10, x1, x4)

inst_507:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x213 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3213; op2val:0x6c8f;
   valaddr_reg:x8; val_offset:964*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 964*FLEN/8, x10, x1, x4)

inst_508:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x213 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3213; op2val:0x6c8f;
   valaddr_reg:x8; val_offset:966*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 966*FLEN/8, x10, x1, x4)

inst_509:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x213 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3213; op2val:0x6c8f;
   valaddr_reg:x8; val_offset:968*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 968*FLEN/8, x10, x1, x4)

inst_510:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e2b; op2val:0x68a1;
   valaddr_reg:x8; val_offset:970*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 970*FLEN/8, x10, x1, x4)

inst_511:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e2b; op2val:0x68a1;
   valaddr_reg:x8; val_offset:972*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 972*FLEN/8, x10, x1, x4)

inst_512:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e2b; op2val:0x68a1;
   valaddr_reg:x8; val_offset:974*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 974*FLEN/8, x10, x1, x4)

inst_513:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e2b; op2val:0x68a1;
   valaddr_reg:x8; val_offset:976*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 976*FLEN/8, x10, x1, x4)

inst_514:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x22b and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e2b; op2val:0x68a1;
   valaddr_reg:x8; val_offset:978*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 978*FLEN/8, x10, x1, x4)

inst_515:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e0 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x351 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ce0; op2val:0x6751;
   valaddr_reg:x8; val_offset:980*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 980*FLEN/8, x10, x1, x4)

inst_516:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e0 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x351 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ce0; op2val:0x6751;
   valaddr_reg:x8; val_offset:982*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 982*FLEN/8, x10, x1, x4)

inst_517:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e0 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x351 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ce0; op2val:0x6751;
   valaddr_reg:x8; val_offset:984*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 984*FLEN/8, x10, x1, x4)

inst_518:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e0 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x351 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ce0; op2val:0x6751;
   valaddr_reg:x8; val_offset:986*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 986*FLEN/8, x10, x1, x4)

inst_519:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e0 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x351 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ce0; op2val:0x6751;
   valaddr_reg:x8; val_offset:988*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 988*FLEN/8, x10, x1, x4)

inst_520:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26c and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0d2 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6c; op2val:0x68d2;
   valaddr_reg:x8; val_offset:990*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 990*FLEN/8, x10, x1, x4)

inst_521:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26c and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0d2 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6c; op2val:0x68d2;
   valaddr_reg:x8; val_offset:992*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 992*FLEN/8, x10, x1, x4)

inst_522:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26c and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0d2 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6c; op2val:0x68d2;
   valaddr_reg:x8; val_offset:994*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 994*FLEN/8, x10, x1, x4)

inst_523:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26c and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0d2 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6c; op2val:0x68d2;
   valaddr_reg:x8; val_offset:996*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 996*FLEN/8, x10, x1, x4)

inst_524:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26c and fs2 == 0 and fe2 == 0x1a and fm2 == 0x0d2 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6c; op2val:0x68d2;
   valaddr_reg:x8; val_offset:998*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 998*FLEN/8, x10, x1, x4)

inst_525:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ed and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3be5; op2val:0x75ed;
   valaddr_reg:x8; val_offset:1000*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1000*FLEN/8, x10, x1, x4)

inst_526:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ed and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3be5; op2val:0x75ed;
   valaddr_reg:x8; val_offset:1002*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1002*FLEN/8, x10, x1, x4)

inst_527:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ed and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3be5; op2val:0x75ed;
   valaddr_reg:x8; val_offset:1004*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1004*FLEN/8, x10, x1, x4)

inst_528:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ed and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3be5; op2val:0x75ed;
   valaddr_reg:x8; val_offset:1006*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1006*FLEN/8, x10, x1, x4)

inst_529:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e5 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ed and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3be5; op2val:0x75ed;
   valaddr_reg:x8; val_offset:1008*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1008*FLEN/8, x10, x1, x4)

inst_530:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0f9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa0; op2val:0x74f9;
   valaddr_reg:x8; val_offset:1010*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1010*FLEN/8, x10, x1, x4)

inst_531:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0f9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa0; op2val:0x74f9;
   valaddr_reg:x8; val_offset:1012*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1012*FLEN/8, x10, x1, x4)

inst_532:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0f9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa0; op2val:0x74f9;
   valaddr_reg:x8; val_offset:1014*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1014*FLEN/8, x10, x1, x4)

inst_533:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0f9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa0; op2val:0x74f9;
   valaddr_reg:x8; val_offset:1016*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1016*FLEN/8, x10, x1, x4)

inst_534:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a0 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0f9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa0; op2val:0x74f9;
   valaddr_reg:x8; val_offset:1018*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1018*FLEN/8, x10, x1, x4)

inst_535:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x30a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b0; op2val:0x730a;
   valaddr_reg:x8; val_offset:1020*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1020*FLEN/8, x10, x1, x4)

inst_536:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x30a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b0; op2val:0x730a;
   valaddr_reg:x8; val_offset:1022*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1022*FLEN/8, x10, x1, x4)

inst_537:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x30a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b0; op2val:0x730a;
   valaddr_reg:x8; val_offset:1024*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1024*FLEN/8, x10, x1, x4)

inst_538:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x30a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b0; op2val:0x730a;
   valaddr_reg:x8; val_offset:1026*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1026*FLEN/8, x10, x1, x4)

inst_539:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x30a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b0; op2val:0x730a;
   valaddr_reg:x8; val_offset:1028*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1028*FLEN/8, x10, x1, x4)

inst_540:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x234 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3634; op2val:0x70a8;
   valaddr_reg:x8; val_offset:1030*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1030*FLEN/8, x10, x1, x4)

inst_541:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x234 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3634; op2val:0x70a8;
   valaddr_reg:x8; val_offset:1032*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1032*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_542:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x234 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3634; op2val:0x70a8;
   valaddr_reg:x8; val_offset:1034*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1034*FLEN/8, x10, x1, x4)

inst_543:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x234 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3634; op2val:0x70a8;
   valaddr_reg:x8; val_offset:1036*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1036*FLEN/8, x10, x1, x4)

inst_544:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x234 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3634; op2val:0x70a8;
   valaddr_reg:x8; val_offset:1038*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1038*FLEN/8, x10, x1, x4)

inst_545:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fa and fs2 == 0 and fe2 == 0x1d and fm2 == 0x07d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fa; op2val:0x747d;
   valaddr_reg:x8; val_offset:1040*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1040*FLEN/8, x10, x1, x4)

inst_546:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fa and fs2 == 0 and fe2 == 0x1d and fm2 == 0x07d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fa; op2val:0x747d;
   valaddr_reg:x8; val_offset:1042*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1042*FLEN/8, x10, x1, x4)

inst_547:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fa and fs2 == 0 and fe2 == 0x1d and fm2 == 0x07d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fa; op2val:0x747d;
   valaddr_reg:x8; val_offset:1044*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1044*FLEN/8, x10, x1, x4)

inst_548:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fa and fs2 == 0 and fe2 == 0x1d and fm2 == 0x07d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fa; op2val:0x747d;
   valaddr_reg:x8; val_offset:1046*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1046*FLEN/8, x10, x1, x4)

inst_549:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fa and fs2 == 0 and fe2 == 0x1d and fm2 == 0x07d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39fa; op2val:0x747d;
   valaddr_reg:x8; val_offset:1048*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1048*FLEN/8, x10, x1, x4)

inst_550:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x247 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382e; op2val:0x7247;
   valaddr_reg:x8; val_offset:1050*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1050*FLEN/8, x10, x1, x4)

inst_551:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x247 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382e; op2val:0x7247;
   valaddr_reg:x8; val_offset:1052*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1052*FLEN/8, x10, x1, x4)

inst_552:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x247 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382e; op2val:0x7247;
   valaddr_reg:x8; val_offset:1054*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1054*FLEN/8, x10, x1, x4)

inst_553:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x247 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382e; op2val:0x7247;
   valaddr_reg:x8; val_offset:1056*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1056*FLEN/8, x10, x1, x4)

inst_554:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x247 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382e; op2val:0x7247;
   valaddr_reg:x8; val_offset:1058*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1058*FLEN/8, x10, x1, x4)

inst_555:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3c9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392f; op2val:0x73c9;
   valaddr_reg:x8; val_offset:1060*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1060*FLEN/8, x10, x1, x4)

inst_556:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3c9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392f; op2val:0x73c9;
   valaddr_reg:x8; val_offset:1062*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1062*FLEN/8, x10, x1, x4)

inst_557:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3c9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392f; op2val:0x73c9;
   valaddr_reg:x8; val_offset:1064*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1064*FLEN/8, x10, x1, x4)

inst_558:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3c9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392f; op2val:0x73c9;
   valaddr_reg:x8; val_offset:1066*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1066*FLEN/8, x10, x1, x4)

inst_559:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3c9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392f; op2val:0x73c9;
   valaddr_reg:x8; val_offset:1068*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1068*FLEN/8, x10, x1, x4)

inst_560:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x372 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x196 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3772; op2val:0x7196;
   valaddr_reg:x8; val_offset:1070*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1070*FLEN/8, x10, x1, x4)

inst_561:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x372 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x196 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3772; op2val:0x7196;
   valaddr_reg:x8; val_offset:1072*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1072*FLEN/8, x10, x1, x4)

inst_562:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x372 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x196 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3772; op2val:0x7196;
   valaddr_reg:x8; val_offset:1074*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1074*FLEN/8, x10, x1, x4)

inst_563:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x372 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x196 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3772; op2val:0x7196;
   valaddr_reg:x8; val_offset:1076*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1076*FLEN/8, x10, x1, x4)

inst_564:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x372 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x196 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3772; op2val:0x7196;
   valaddr_reg:x8; val_offset:1078*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1078*FLEN/8, x10, x1, x4)

inst_565:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a1 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0fa and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa1; op2val:0x74fa;
   valaddr_reg:x8; val_offset:1080*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1080*FLEN/8, x10, x1, x4)

inst_566:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a1 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0fa and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa1; op2val:0x74fa;
   valaddr_reg:x8; val_offset:1082*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1082*FLEN/8, x10, x1, x4)

inst_567:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a1 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0fa and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa1; op2val:0x74fa;
   valaddr_reg:x8; val_offset:1084*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1084*FLEN/8, x10, x1, x4)

inst_568:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a1 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0fa and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa1; op2val:0x74fa;
   valaddr_reg:x8; val_offset:1086*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1086*FLEN/8, x10, x1, x4)

inst_569:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2a1 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x0fa and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aa1; op2val:0x74fa;
   valaddr_reg:x8; val_offset:1088*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1088*FLEN/8, x10, x1, x4)

inst_570:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x102 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x385 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d02; op2val:0x6785;
   valaddr_reg:x8; val_offset:1090*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1090*FLEN/8, x10, x1, x4)

inst_571:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x102 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x385 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d02; op2val:0x6785;
   valaddr_reg:x8; val_offset:1092*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1092*FLEN/8, x10, x1, x4)

inst_572:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x102 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x385 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d02; op2val:0x6785;
   valaddr_reg:x8; val_offset:1094*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1094*FLEN/8, x10, x1, x4)

inst_573:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x102 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x385 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d02; op2val:0x6785;
   valaddr_reg:x8; val_offset:1096*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1096*FLEN/8, x10, x1, x4)

inst_574:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x102 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x385 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d02; op2val:0x6785;
   valaddr_reg:x8; val_offset:1098*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1098*FLEN/8, x10, x1, x4)

inst_575:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x03d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31a6; op2val:0x6c3d;
   valaddr_reg:x8; val_offset:1100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1100*FLEN/8, x10, x1, x4)

inst_576:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x03d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31a6; op2val:0x6c3d;
   valaddr_reg:x8; val_offset:1102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1102*FLEN/8, x10, x1, x4)

inst_577:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x03d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31a6; op2val:0x6c3d;
   valaddr_reg:x8; val_offset:1104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1104*FLEN/8, x10, x1, x4)

inst_578:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x03d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31a6; op2val:0x6c3d;
   valaddr_reg:x8; val_offset:1106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1106*FLEN/8, x10, x1, x4)

inst_579:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1a6 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x03d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31a6; op2val:0x6c3d;
   valaddr_reg:x8; val_offset:1108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1108*FLEN/8, x10, x1, x4)

inst_580:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x076 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f1; op2val:0x7076;
   valaddr_reg:x8; val_offset:1110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1110*FLEN/8, x10, x1, x4)

inst_581:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x076 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f1; op2val:0x7076;
   valaddr_reg:x8; val_offset:1112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1112*FLEN/8, x10, x1, x4)

inst_582:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x076 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f1; op2val:0x7076;
   valaddr_reg:x8; val_offset:1114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1114*FLEN/8, x10, x1, x4)

inst_583:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x076 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f1; op2val:0x7076;
   valaddr_reg:x8; val_offset:1116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1116*FLEN/8, x10, x1, x4)

inst_584:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x076 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35f1; op2val:0x7076;
   valaddr_reg:x8; val_offset:1118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1118*FLEN/8, x10, x1, x4)

inst_585:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x399 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1b4 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b99; op2val:0x75b4;
   valaddr_reg:x8; val_offset:1120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1120*FLEN/8, x10, x1, x4)

inst_586:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x399 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1b4 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b99; op2val:0x75b4;
   valaddr_reg:x8; val_offset:1122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1122*FLEN/8, x10, x1, x4)

inst_587:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x399 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1b4 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b99; op2val:0x75b4;
   valaddr_reg:x8; val_offset:1124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1124*FLEN/8, x10, x1, x4)

inst_588:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x399 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1b4 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b99; op2val:0x75b4;
   valaddr_reg:x8; val_offset:1126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1126*FLEN/8, x10, x1, x4)

inst_589:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x399 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1b4 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b99; op2val:0x75b4;
   valaddr_reg:x8; val_offset:1128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1128*FLEN/8, x10, x1, x4)

inst_590:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d9 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x064 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39d9; op2val:0x7464;
   valaddr_reg:x8; val_offset:1130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1130*FLEN/8, x10, x1, x4)

inst_591:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d9 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x064 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39d9; op2val:0x7464;
   valaddr_reg:x8; val_offset:1132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1132*FLEN/8, x10, x1, x4)

inst_592:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d9 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x064 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39d9; op2val:0x7464;
   valaddr_reg:x8; val_offset:1134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1134*FLEN/8, x10, x1, x4)

inst_593:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d9 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x064 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39d9; op2val:0x7464;
   valaddr_reg:x8; val_offset:1136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1136*FLEN/8, x10, x1, x4)

inst_594:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d9 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x064 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39d9; op2val:0x7464;
   valaddr_reg:x8; val_offset:1138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1138*FLEN/8, x10, x1, x4)

inst_595:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x09d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ee and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x389d; op2val:0x72ee;
   valaddr_reg:x8; val_offset:1140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1140*FLEN/8, x10, x1, x4)

inst_596:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x09d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ee and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x389d; op2val:0x72ee;
   valaddr_reg:x8; val_offset:1142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1142*FLEN/8, x10, x1, x4)

inst_597:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x09d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ee and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x389d; op2val:0x72ee;
   valaddr_reg:x8; val_offset:1144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1144*FLEN/8, x10, x1, x4)

inst_598:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x09d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ee and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x389d; op2val:0x72ee;
   valaddr_reg:x8; val_offset:1146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1146*FLEN/8, x10, x1, x4)

inst_599:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x09d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ee and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x389d; op2val:0x72ee;
   valaddr_reg:x8; val_offset:1148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1148*FLEN/8, x10, x1, x4)

inst_600:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x327 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x15e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3327; op2val:0x6d5e;
   valaddr_reg:x8; val_offset:1150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1150*FLEN/8, x10, x1, x4)

inst_601:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x327 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x15e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3327; op2val:0x6d5e;
   valaddr_reg:x8; val_offset:1152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1152*FLEN/8, x10, x1, x4)

inst_602:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x327 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x15e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3327; op2val:0x6d5e;
   valaddr_reg:x8; val_offset:1154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1154*FLEN/8, x10, x1, x4)

inst_603:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x327 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x15e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3327; op2val:0x6d5e;
   valaddr_reg:x8; val_offset:1156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1156*FLEN/8, x10, x1, x4)

inst_604:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x327 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x15e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3327; op2val:0x6d5e;
   valaddr_reg:x8; val_offset:1158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1158*FLEN/8, x10, x1, x4)

inst_605:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x38f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ac and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b8f; op2val:0x75ac;
   valaddr_reg:x8; val_offset:1160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1160*FLEN/8, x10, x1, x4)

inst_606:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x38f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ac and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b8f; op2val:0x75ac;
   valaddr_reg:x8; val_offset:1162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1162*FLEN/8, x10, x1, x4)

inst_607:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x38f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ac and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b8f; op2val:0x75ac;
   valaddr_reg:x8; val_offset:1164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1164*FLEN/8, x10, x1, x4)

inst_608:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x38f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ac and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b8f; op2val:0x75ac;
   valaddr_reg:x8; val_offset:1166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1166*FLEN/8, x10, x1, x4)

inst_609:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x38f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x1ac and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b8f; op2val:0x75ac;
   valaddr_reg:x8; val_offset:1168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1168*FLEN/8, x10, x1, x4)

inst_610:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x300 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x141 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b00; op2val:0x7541;
   valaddr_reg:x8; val_offset:1170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1170*FLEN/8, x10, x1, x4)

inst_611:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x300 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x141 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b00; op2val:0x7541;
   valaddr_reg:x8; val_offset:1172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1172*FLEN/8, x10, x1, x4)

inst_612:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x300 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x141 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b00; op2val:0x7541;
   valaddr_reg:x8; val_offset:1174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1174*FLEN/8, x10, x1, x4)

inst_613:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x300 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x141 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b00; op2val:0x7541;
   valaddr_reg:x8; val_offset:1176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1176*FLEN/8, x10, x1, x4)

inst_614:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x300 and fs2 == 0 and fe2 == 0x1d and fm2 == 0x141 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b00; op2val:0x7541;
   valaddr_reg:x8; val_offset:1178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1178*FLEN/8, x10, x1, x4)

inst_615:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x27d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0de and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x267d; op2val:0x60de;
   valaddr_reg:x8; val_offset:1180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1180*FLEN/8, x10, x1, x4)

inst_616:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x27d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0de and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x267d; op2val:0x60de;
   valaddr_reg:x8; val_offset:1182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1182*FLEN/8, x10, x1, x4)

inst_617:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x27d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0de and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x267d; op2val:0x60de;
   valaddr_reg:x8; val_offset:1184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1184*FLEN/8, x10, x1, x4)

inst_618:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x27d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0de and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x267d; op2val:0x60de;
   valaddr_reg:x8; val_offset:1186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1186*FLEN/8, x10, x1, x4)

inst_619:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x27d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0de and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x267d; op2val:0x60de;
   valaddr_reg:x8; val_offset:1188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1188*FLEN/8, x10, x1, x4)

inst_620:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x17c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4f; op2val:0x757c;
   valaddr_reg:x8; val_offset:1190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1190*FLEN/8, x10, x1, x4)

inst_621:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x17c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4f; op2val:0x757c;
   valaddr_reg:x8; val_offset:1192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1192*FLEN/8, x10, x1, x4)

inst_622:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x17c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4f; op2val:0x757c;
   valaddr_reg:x8; val_offset:1194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1194*FLEN/8, x10, x1, x4)

inst_623:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x17c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4f; op2val:0x757c;
   valaddr_reg:x8; val_offset:1196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1196*FLEN/8, x10, x1, x4)

inst_624:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x34f and fs2 == 0 and fe2 == 0x1d and fm2 == 0x17c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b4f; op2val:0x757c;
   valaddr_reg:x8; val_offset:1198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1198*FLEN/8, x10, x1, x4)

inst_625:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x179 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x177 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3979; op2val:0x7177;
   valaddr_reg:x8; val_offset:1200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1200*FLEN/8, x10, x1, x4)

inst_626:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x179 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x177 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3979; op2val:0x7177;
   valaddr_reg:x8; val_offset:1202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1202*FLEN/8, x10, x1, x4)

inst_627:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x179 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x177 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3979; op2val:0x7177;
   valaddr_reg:x8; val_offset:1204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1204*FLEN/8, x10, x1, x4)

inst_628:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x179 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x177 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3979; op2val:0x7177;
   valaddr_reg:x8; val_offset:1206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1206*FLEN/8, x10, x1, x4)

inst_629:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x179 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x177 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3979; op2val:0x7177;
   valaddr_reg:x8; val_offset:1208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1208*FLEN/8, x10, x1, x4)

inst_630:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x130 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x12f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3930; op2val:0x712f;
   valaddr_reg:x8; val_offset:1210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1210*FLEN/8, x10, x1, x4)

inst_631:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x130 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x12f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3930; op2val:0x712f;
   valaddr_reg:x8; val_offset:1212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1212*FLEN/8, x10, x1, x4)

inst_632:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x130 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x12f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3930; op2val:0x712f;
   valaddr_reg:x8; val_offset:1214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1214*FLEN/8, x10, x1, x4)

inst_633:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x130 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x12f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3930; op2val:0x712f;
   valaddr_reg:x8; val_offset:1216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1216*FLEN/8, x10, x1, x4)

inst_634:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x130 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x12f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3930; op2val:0x712f;
   valaddr_reg:x8; val_offset:1218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1218*FLEN/8, x10, x1, x4)

inst_635:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x29b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x369d; op2val:0x6e9b;
   valaddr_reg:x8; val_offset:1220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1220*FLEN/8, x10, x1, x4)

inst_636:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x29b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x369d; op2val:0x6e9b;
   valaddr_reg:x8; val_offset:1222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1222*FLEN/8, x10, x1, x4)

inst_637:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x29b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x369d; op2val:0x6e9b;
   valaddr_reg:x8; val_offset:1224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1224*FLEN/8, x10, x1, x4)

inst_638:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x29b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x369d; op2val:0x6e9b;
   valaddr_reg:x8; val_offset:1226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1226*FLEN/8, x10, x1, x4)

inst_639:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x29b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x369d; op2val:0x6e9b;
   valaddr_reg:x8; val_offset:1228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1228*FLEN/8, x10, x1, x4)

inst_640:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x276 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a78; op2val:0x7276;
   valaddr_reg:x8; val_offset:1230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1230*FLEN/8, x10, x1, x4)

inst_641:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x276 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a78; op2val:0x7276;
   valaddr_reg:x8; val_offset:1232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1232*FLEN/8, x10, x1, x4)

inst_642:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x276 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a78; op2val:0x7276;
   valaddr_reg:x8; val_offset:1234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1234*FLEN/8, x10, x1, x4)

inst_643:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x276 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a78; op2val:0x7276;
   valaddr_reg:x8; val_offset:1236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1236*FLEN/8, x10, x1, x4)

inst_644:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x276 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a78; op2val:0x7276;
   valaddr_reg:x8; val_offset:1238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1238*FLEN/8, x10, x1, x4)

inst_645:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x300 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b02; op2val:0x7300;
   valaddr_reg:x8; val_offset:1240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1240*FLEN/8, x10, x1, x4)

inst_646:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x300 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b02; op2val:0x7300;
   valaddr_reg:x8; val_offset:1242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1242*FLEN/8, x10, x1, x4)

inst_647:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x300 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b02; op2val:0x7300;
   valaddr_reg:x8; val_offset:1244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1244*FLEN/8, x10, x1, x4)

inst_648:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x300 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b02; op2val:0x7300;
   valaddr_reg:x8; val_offset:1246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1246*FLEN/8, x10, x1, x4)

inst_649:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x300 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b02; op2val:0x7300;
   valaddr_reg:x8; val_offset:1248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1248*FLEN/8, x10, x1, x4)

inst_650:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x089 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348b; op2val:0x6c89;
   valaddr_reg:x8; val_offset:1250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1250*FLEN/8, x10, x1, x4)

inst_651:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x089 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348b; op2val:0x6c89;
   valaddr_reg:x8; val_offset:1252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1252*FLEN/8, x10, x1, x4)

inst_652:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x089 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348b; op2val:0x6c89;
   valaddr_reg:x8; val_offset:1254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1254*FLEN/8, x10, x1, x4)

inst_653:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x089 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348b; op2val:0x6c89;
   valaddr_reg:x8; val_offset:1256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1256*FLEN/8, x10, x1, x4)

inst_654:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08b and fs2 == 0 and fe2 == 0x1b and fm2 == 0x089 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348b; op2val:0x6c89;
   valaddr_reg:x8; val_offset:1258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1258*FLEN/8, x10, x1, x4)

inst_655:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x35a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b5c; op2val:0x735a;
   valaddr_reg:x8; val_offset:1260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1260*FLEN/8, x10, x1, x4)

inst_656:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x35a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b5c; op2val:0x735a;
   valaddr_reg:x8; val_offset:1262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1262*FLEN/8, x10, x1, x4)

inst_657:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x35a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b5c; op2val:0x735a;
   valaddr_reg:x8; val_offset:1264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1264*FLEN/8, x10, x1, x4)

inst_658:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x35a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b5c; op2val:0x735a;
   valaddr_reg:x8; val_offset:1266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1266*FLEN/8, x10, x1, x4)

inst_659:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x35a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b5c; op2val:0x735a;
   valaddr_reg:x8; val_offset:1268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1268*FLEN/8, x10, x1, x4)

inst_660:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x103 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x102 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3903; op2val:0x7102;
   valaddr_reg:x8; val_offset:1270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1270*FLEN/8, x10, x1, x4)

inst_661:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x103 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x102 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3903; op2val:0x7102;
   valaddr_reg:x8; val_offset:1272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1272*FLEN/8, x10, x1, x4)

inst_662:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x103 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x102 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3903; op2val:0x7102;
   valaddr_reg:x8; val_offset:1274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1274*FLEN/8, x10, x1, x4)

inst_663:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x103 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x102 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3903; op2val:0x7102;
   valaddr_reg:x8; val_offset:1276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1276*FLEN/8, x10, x1, x4)

inst_664:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x103 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x102 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3903; op2val:0x7102;
   valaddr_reg:x8; val_offset:1278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1278*FLEN/8, x10, x1, x4)

inst_665:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2f3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32f5; op2val:0x6af3;
   valaddr_reg:x8; val_offset:1280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1280*FLEN/8, x10, x1, x4)

inst_666:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2f3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32f5; op2val:0x6af3;
   valaddr_reg:x8; val_offset:1282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1282*FLEN/8, x10, x1, x4)

inst_667:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2f3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32f5; op2val:0x6af3;
   valaddr_reg:x8; val_offset:1284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1284*FLEN/8, x10, x1, x4)

inst_668:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2f3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32f5; op2val:0x6af3;
   valaddr_reg:x8; val_offset:1286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1286*FLEN/8, x10, x1, x4)

inst_669:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2f3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32f5; op2val:0x6af3;
   valaddr_reg:x8; val_offset:1288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1288*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_670:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x25d and fs2 == 0 and fe2 == 0x1a and fm2 == 0x25b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x325d; op2val:0x6a5b;
   valaddr_reg:x8; val_offset:1290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1290*FLEN/8, x10, x1, x4)

inst_671:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x25d and fs2 == 0 and fe2 == 0x1a and fm2 == 0x25b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x325d; op2val:0x6a5b;
   valaddr_reg:x8; val_offset:1292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1292*FLEN/8, x10, x1, x4)

inst_672:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x25d and fs2 == 0 and fe2 == 0x1a and fm2 == 0x25b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x325d; op2val:0x6a5b;
   valaddr_reg:x8; val_offset:1294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1294*FLEN/8, x10, x1, x4)

inst_673:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x25d and fs2 == 0 and fe2 == 0x1a and fm2 == 0x25b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x325d; op2val:0x6a5b;
   valaddr_reg:x8; val_offset:1296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1296*FLEN/8, x10, x1, x4)

inst_674:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x25d and fs2 == 0 and fe2 == 0x1a and fm2 == 0x25b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x325d; op2val:0x6a5b;
   valaddr_reg:x8; val_offset:1298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1298*FLEN/8, x10, x1, x4)

inst_675:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708a;
   valaddr_reg:x8; val_offset:1300*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1300*FLEN/8, x10, x1, x4)

inst_676:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708a;
   valaddr_reg:x8; val_offset:1302*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1302*FLEN/8, x10, x1, x4)

inst_677:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708a;
   valaddr_reg:x8; val_offset:1304*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1304*FLEN/8, x10, x1, x4)

inst_678:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708a;
   valaddr_reg:x8; val_offset:1306*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1306*FLEN/8, x10, x1, x4)

inst_679:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x08a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x388c; op2val:0x708a;
   valaddr_reg:x8; val_offset:1308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1308*FLEN/8, x10, x1, x4)

inst_680:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x007 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x006 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3807; op2val:0x7006;
   valaddr_reg:x8; val_offset:1310*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1310*FLEN/8, x10, x1, x4)

inst_681:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x007 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x006 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3807; op2val:0x7006;
   valaddr_reg:x8; val_offset:1312*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1312*FLEN/8, x10, x1, x4)

inst_682:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x007 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x006 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3807; op2val:0x7006;
   valaddr_reg:x8; val_offset:1314*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1314*FLEN/8, x10, x1, x4)

inst_683:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x007 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x006 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3807; op2val:0x7006;
   valaddr_reg:x8; val_offset:1316*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1316*FLEN/8, x10, x1, x4)

inst_684:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x007 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x006 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3807; op2val:0x7006;
   valaddr_reg:x8; val_offset:1318*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1318*FLEN/8, x10, x1, x4)

inst_685:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a2; op2val:0x70a1;
   valaddr_reg:x8; val_offset:1320*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1320*FLEN/8, x10, x1, x4)

inst_686:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a2; op2val:0x70a1;
   valaddr_reg:x8; val_offset:1322*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1322*FLEN/8, x10, x1, x4)

inst_687:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a2; op2val:0x70a1;
   valaddr_reg:x8; val_offset:1324*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1324*FLEN/8, x10, x1, x4)

inst_688:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a2; op2val:0x70a1;
   valaddr_reg:x8; val_offset:1326*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1326*FLEN/8, x10, x1, x4)

inst_689:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38a2; op2val:0x70a1;
   valaddr_reg:x8; val_offset:1328*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1328*FLEN/8, x10, x1, x4)

inst_690:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x050 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x04e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3850; op2val:0x704e;
   valaddr_reg:x8; val_offset:1330*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1330*FLEN/8, x10, x1, x4)

inst_691:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x050 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x04e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3850; op2val:0x704e;
   valaddr_reg:x8; val_offset:1332*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1332*FLEN/8, x10, x1, x4)

inst_692:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x050 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x04e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3850; op2val:0x704e;
   valaddr_reg:x8; val_offset:1334*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1334*FLEN/8, x10, x1, x4)

inst_693:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x050 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x04e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3850; op2val:0x704e;
   valaddr_reg:x8; val_offset:1336*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1336*FLEN/8, x10, x1, x4)

inst_694:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x050 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x04e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3850; op2val:0x704e;
   valaddr_reg:x8; val_offset:1338*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1338*FLEN/8, x10, x1, x4)

inst_695:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x36b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376d; op2val:0x6f6b;
   valaddr_reg:x8; val_offset:1340*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1340*FLEN/8, x10, x1, x4)

inst_696:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x36b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376d; op2val:0x6f6b;
   valaddr_reg:x8; val_offset:1342*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1342*FLEN/8, x10, x1, x4)

inst_697:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x36b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376d; op2val:0x6f6b;
   valaddr_reg:x8; val_offset:1344*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1344*FLEN/8, x10, x1, x4)

inst_698:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x36b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376d; op2val:0x6f6b;
   valaddr_reg:x8; val_offset:1346*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1346*FLEN/8, x10, x1, x4)

inst_699:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1b and fm2 == 0x36b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376d; op2val:0x6f6b;
   valaddr_reg:x8; val_offset:1348*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1348*FLEN/8, x10, x1, x4)

inst_700:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x36b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b6d; op2val:0x736b;
   valaddr_reg:x8; val_offset:1350*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1350*FLEN/8, x10, x1, x4)

inst_701:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x36b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b6d; op2val:0x736b;
   valaddr_reg:x8; val_offset:1352*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1352*FLEN/8, x10, x1, x4)

inst_702:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x36b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b6d; op2val:0x736b;
   valaddr_reg:x8; val_offset:1354*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1354*FLEN/8, x10, x1, x4)

inst_703:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x36b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b6d; op2val:0x736b;
   valaddr_reg:x8; val_offset:1356*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1356*FLEN/8, x10, x1, x4)

inst_704:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x36b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b6d; op2val:0x736b;
   valaddr_reg:x8; val_offset:1358*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1358*FLEN/8, x10, x1, x4)

inst_705:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x096 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3897; op2val:0x7096;
   valaddr_reg:x8; val_offset:1360*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1360*FLEN/8, x10, x1, x4)

inst_706:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x096 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3897; op2val:0x7096;
   valaddr_reg:x8; val_offset:1362*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1362*FLEN/8, x10, x1, x4)

inst_707:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x096 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3897; op2val:0x7096;
   valaddr_reg:x8; val_offset:1364*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1364*FLEN/8, x10, x1, x4)

inst_708:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x096 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3897; op2val:0x7096;
   valaddr_reg:x8; val_offset:1366*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1366*FLEN/8, x10, x1, x4)

inst_709:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x096 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3897; op2val:0x7096;
   valaddr_reg:x8; val_offset:1368*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1368*FLEN/8, x10, x1, x4)

inst_710:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x011 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x010 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c11; op2val:0x6410;
   valaddr_reg:x8; val_offset:1370*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1370*FLEN/8, x10, x1, x4)

inst_711:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x011 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x010 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c11; op2val:0x6410;
   valaddr_reg:x8; val_offset:1372*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1372*FLEN/8, x10, x1, x4)

inst_712:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x011 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x010 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c11; op2val:0x6410;
   valaddr_reg:x8; val_offset:1374*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1374*FLEN/8, x10, x1, x4)

inst_713:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x011 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x010 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c11; op2val:0x6410;
   valaddr_reg:x8; val_offset:1376*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1376*FLEN/8, x10, x1, x4)

inst_714:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x011 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x010 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c11; op2val:0x6410;
   valaddr_reg:x8; val_offset:1378*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1378*FLEN/8, x10, x1, x4)

inst_715:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x28a and fs2 == 0 and fe2 == 0x19 and fm2 == 0x288 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e8a; op2val:0x6688;
   valaddr_reg:x8; val_offset:1380*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1380*FLEN/8, x10, x1, x4)

inst_716:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x28a and fs2 == 0 and fe2 == 0x19 and fm2 == 0x288 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e8a; op2val:0x6688;
   valaddr_reg:x8; val_offset:1382*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1382*FLEN/8, x10, x1, x4)

inst_717:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x28a and fs2 == 0 and fe2 == 0x19 and fm2 == 0x288 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e8a; op2val:0x6688;
   valaddr_reg:x8; val_offset:1384*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1384*FLEN/8, x10, x1, x4)

inst_718:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x28a and fs2 == 0 and fe2 == 0x19 and fm2 == 0x288 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e8a; op2val:0x6688;
   valaddr_reg:x8; val_offset:1386*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1386*FLEN/8, x10, x1, x4)

inst_719:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x28a and fs2 == 0 and fe2 == 0x19 and fm2 == 0x288 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e8a; op2val:0x6688;
   valaddr_reg:x8; val_offset:1388*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1388*FLEN/8, x10, x1, x4)

inst_720:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e7 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1e5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e7; op2val:0x71e5;
   valaddr_reg:x8; val_offset:1390*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1390*FLEN/8, x10, x1, x4)

inst_721:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e7 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1e5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e7; op2val:0x71e5;
   valaddr_reg:x8; val_offset:1392*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1392*FLEN/8, x10, x1, x4)

inst_722:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e7 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1e5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e7; op2val:0x71e5;
   valaddr_reg:x8; val_offset:1394*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1394*FLEN/8, x10, x1, x4)

inst_723:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e7 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1e5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e7; op2val:0x71e5;
   valaddr_reg:x8; val_offset:1396*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1396*FLEN/8, x10, x1, x4)

inst_724:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e7 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1e5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e7; op2val:0x71e5;
   valaddr_reg:x8; val_offset:1398*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1398*FLEN/8, x10, x1, x4)

inst_725:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x303 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x301 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b03; op2val:0x7301;
   valaddr_reg:x8; val_offset:1400*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1400*FLEN/8, x10, x1, x4)

inst_726:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x303 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x301 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b03; op2val:0x7301;
   valaddr_reg:x8; val_offset:1402*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1402*FLEN/8, x10, x1, x4)

inst_727:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x303 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x301 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b03; op2val:0x7301;
   valaddr_reg:x8; val_offset:1404*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1404*FLEN/8, x10, x1, x4)

inst_728:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x303 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x301 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b03; op2val:0x7301;
   valaddr_reg:x8; val_offset:1406*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1406*FLEN/8, x10, x1, x4)

inst_729:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x303 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x301 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b03; op2val:0x7301;
   valaddr_reg:x8; val_offset:1408*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1408*FLEN/8, x10, x1, x4)

inst_730:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x165 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3567; op2val:0x6d65;
   valaddr_reg:x8; val_offset:1410*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1410*FLEN/8, x10, x1, x4)

inst_731:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x165 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3567; op2val:0x6d65;
   valaddr_reg:x8; val_offset:1412*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1412*FLEN/8, x10, x1, x4)

inst_732:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x165 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3567; op2val:0x6d65;
   valaddr_reg:x8; val_offset:1414*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1414*FLEN/8, x10, x1, x4)

inst_733:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x165 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3567; op2val:0x6d65;
   valaddr_reg:x8; val_offset:1416*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1416*FLEN/8, x10, x1, x4)

inst_734:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x165 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3567; op2val:0x6d65;
   valaddr_reg:x8; val_offset:1418*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1418*FLEN/8, x10, x1, x4)

inst_735:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a4 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2a2 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32a4; op2val:0x6aa2;
   valaddr_reg:x8; val_offset:1420*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1420*FLEN/8, x10, x1, x4)

inst_736:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a4 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2a2 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32a4; op2val:0x6aa2;
   valaddr_reg:x8; val_offset:1422*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1422*FLEN/8, x10, x1, x4)

inst_737:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a4 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2a2 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32a4; op2val:0x6aa2;
   valaddr_reg:x8; val_offset:1424*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1424*FLEN/8, x10, x1, x4)

inst_738:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a4 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2a2 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32a4; op2val:0x6aa2;
   valaddr_reg:x8; val_offset:1426*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1426*FLEN/8, x10, x1, x4)

inst_739:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a4 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2a2 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32a4; op2val:0x6aa2;
   valaddr_reg:x8; val_offset:1428*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1428*FLEN/8, x10, x1, x4)

inst_740:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x041 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3442; op2val:0x6c41;
   valaddr_reg:x8; val_offset:1430*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1430*FLEN/8, x10, x1, x4)

inst_741:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x041 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3442; op2val:0x6c41;
   valaddr_reg:x8; val_offset:1432*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1432*FLEN/8, x10, x1, x4)

inst_742:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x041 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3442; op2val:0x6c41;
   valaddr_reg:x8; val_offset:1434*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1434*FLEN/8, x10, x1, x4)

inst_743:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x041 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3442; op2val:0x6c41;
   valaddr_reg:x8; val_offset:1436*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1436*FLEN/8, x10, x1, x4)

inst_744:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x041 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3442; op2val:0x6c41;
   valaddr_reg:x8; val_offset:1438*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1438*FLEN/8, x10, x1, x4)

inst_745:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x32c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x32a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b2c; op2val:0x732a;
   valaddr_reg:x8; val_offset:1440*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1440*FLEN/8, x10, x1, x4)

inst_746:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x32c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x32a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b2c; op2val:0x732a;
   valaddr_reg:x8; val_offset:1442*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1442*FLEN/8, x10, x1, x4)

inst_747:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x32c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x32a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b2c; op2val:0x732a;
   valaddr_reg:x8; val_offset:1444*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1444*FLEN/8, x10, x1, x4)

inst_748:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x32c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x32a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b2c; op2val:0x732a;
   valaddr_reg:x8; val_offset:1446*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1446*FLEN/8, x10, x1, x4)

inst_749:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x32c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x32a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b2c; op2val:0x732a;
   valaddr_reg:x8; val_offset:1448*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1448*FLEN/8, x10, x1, x4)

inst_750:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3f3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf5; op2val:0x73f3;
   valaddr_reg:x8; val_offset:1450*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1450*FLEN/8, x10, x1, x4)

inst_751:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3f3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf5; op2val:0x73f3;
   valaddr_reg:x8; val_offset:1452*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1452*FLEN/8, x10, x1, x4)

inst_752:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3f3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf5; op2val:0x73f3;
   valaddr_reg:x8; val_offset:1454*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1454*FLEN/8, x10, x1, x4)

inst_753:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3f3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf5; op2val:0x73f3;
   valaddr_reg:x8; val_offset:1456*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1456*FLEN/8, x10, x1, x4)

inst_754:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3f3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf5; op2val:0x73f3;
   valaddr_reg:x8; val_offset:1458*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1458*FLEN/8, x10, x1, x4)

inst_755:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x337 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3339; op2val:0x6b37;
   valaddr_reg:x8; val_offset:1460*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1460*FLEN/8, x10, x1, x4)

inst_756:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x337 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3339; op2val:0x6b37;
   valaddr_reg:x8; val_offset:1462*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1462*FLEN/8, x10, x1, x4)

inst_757:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x337 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3339; op2val:0x6b37;
   valaddr_reg:x8; val_offset:1464*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1464*FLEN/8, x10, x1, x4)

inst_758:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x337 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3339; op2val:0x6b37;
   valaddr_reg:x8; val_offset:1466*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1466*FLEN/8, x10, x1, x4)

inst_759:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x339 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x337 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3339; op2val:0x6b37;
   valaddr_reg:x8; val_offset:1468*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1468*FLEN/8, x10, x1, x4)

inst_760:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x344 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x341 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b44; op2val:0x7341;
   valaddr_reg:x8; val_offset:1470*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1470*FLEN/8, x10, x1, x4)

inst_761:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x344 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x341 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b44; op2val:0x7341;
   valaddr_reg:x8; val_offset:1472*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1472*FLEN/8, x10, x1, x4)

inst_762:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x344 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x341 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b44; op2val:0x7341;
   valaddr_reg:x8; val_offset:1474*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1474*FLEN/8, x10, x1, x4)

inst_763:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x344 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x341 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b44; op2val:0x7341;
   valaddr_reg:x8; val_offset:1476*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1476*FLEN/8, x10, x1, x4)

inst_764:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x344 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x341 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b44; op2val:0x7341;
   valaddr_reg:x8; val_offset:1478*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1478*FLEN/8, x10, x1, x4)

inst_765:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3a7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fa7; op2val:0x67a5;
   valaddr_reg:x8; val_offset:1480*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1480*FLEN/8, x10, x1, x4)

inst_766:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3a7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fa7; op2val:0x67a5;
   valaddr_reg:x8; val_offset:1482*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1482*FLEN/8, x10, x1, x4)

inst_767:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3a7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fa7; op2val:0x67a5;
   valaddr_reg:x8; val_offset:1484*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1484*FLEN/8, x10, x1, x4)

inst_768:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3a7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fa7; op2val:0x67a5;
   valaddr_reg:x8; val_offset:1486*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1486*FLEN/8, x10, x1, x4)

inst_769:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3a7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x3a5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2fa7; op2val:0x67a5;
   valaddr_reg:x8; val_offset:1488*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1488*FLEN/8, x10, x1, x4)

inst_770:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cf and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3cd and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcf; op2val:0x73cd;
   valaddr_reg:x8; val_offset:1490*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1490*FLEN/8, x10, x1, x4)

inst_771:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cf and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3cd and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcf; op2val:0x73cd;
   valaddr_reg:x8; val_offset:1492*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1492*FLEN/8, x10, x1, x4)

inst_772:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cf and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3cd and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcf; op2val:0x73cd;
   valaddr_reg:x8; val_offset:1494*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1494*FLEN/8, x10, x1, x4)

inst_773:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cf and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3cd and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcf; op2val:0x73cd;
   valaddr_reg:x8; val_offset:1496*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1496*FLEN/8, x10, x1, x4)

inst_774:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cf and fs2 == 0 and fe2 == 0x1c and fm2 == 0x3cd and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcf; op2val:0x73cd;
   valaddr_reg:x8; val_offset:1498*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1498*FLEN/8, x10, x1, x4)

inst_775:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x307 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x305 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b07; op2val:0x7305;
   valaddr_reg:x8; val_offset:1500*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1500*FLEN/8, x10, x1, x4)

inst_776:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x307 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x305 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b07; op2val:0x7305;
   valaddr_reg:x8; val_offset:1502*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1502*FLEN/8, x10, x1, x4)

inst_777:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x307 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x305 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b07; op2val:0x7305;
   valaddr_reg:x8; val_offset:1504*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1504*FLEN/8, x10, x1, x4)

inst_778:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x307 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x305 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b07; op2val:0x7305;
   valaddr_reg:x8; val_offset:1506*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1506*FLEN/8, x10, x1, x4)

inst_779:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x307 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x305 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b07; op2val:0x7305;
   valaddr_reg:x8; val_offset:1508*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1508*FLEN/8, x10, x1, x4)

inst_780:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x139 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x137 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3539; op2val:0x6d37;
   valaddr_reg:x8; val_offset:1510*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1510*FLEN/8, x10, x1, x4)

inst_781:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x139 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x137 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3539; op2val:0x6d37;
   valaddr_reg:x8; val_offset:1512*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1512*FLEN/8, x10, x1, x4)

inst_782:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x139 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x137 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3539; op2val:0x6d37;
   valaddr_reg:x8; val_offset:1514*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1514*FLEN/8, x10, x1, x4)

inst_783:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x139 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x137 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3539; op2val:0x6d37;
   valaddr_reg:x8; val_offset:1516*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1516*FLEN/8, x10, x1, x4)

inst_784:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x139 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x137 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3539; op2val:0x6d37;
   valaddr_reg:x8; val_offset:1518*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1518*FLEN/8, x10, x1, x4)

inst_785:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x219 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x217 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2a19; op2val:0x6217;
   valaddr_reg:x8; val_offset:1520*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1520*FLEN/8, x10, x1, x4)

inst_786:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x219 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x217 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2a19; op2val:0x6217;
   valaddr_reg:x8; val_offset:1522*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1522*FLEN/8, x10, x1, x4)

inst_787:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x219 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x217 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2a19; op2val:0x6217;
   valaddr_reg:x8; val_offset:1524*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1524*FLEN/8, x10, x1, x4)

inst_788:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x219 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x217 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2a19; op2val:0x6217;
   valaddr_reg:x8; val_offset:1526*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1526*FLEN/8, x10, x1, x4)

inst_789:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x219 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x217 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2a19; op2val:0x6217;
   valaddr_reg:x8; val_offset:1528*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1528*FLEN/8, x10, x1, x4)

inst_790:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x26f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3271; op2val:0x6a6f;
   valaddr_reg:x8; val_offset:1530*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1530*FLEN/8, x10, x1, x4)

inst_791:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x26f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3271; op2val:0x6a6f;
   valaddr_reg:x8; val_offset:1532*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1532*FLEN/8, x10, x1, x4)

inst_792:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x26f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3271; op2val:0x6a6f;
   valaddr_reg:x8; val_offset:1534*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1534*FLEN/8, x10, x1, x4)

inst_793:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x26f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3271; op2val:0x6a6f;
   valaddr_reg:x8; val_offset:1536*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1536*FLEN/8, x10, x1, x4)

inst_794:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x26f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3271; op2val:0x6a6f;
   valaddr_reg:x8; val_offset:1538*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1538*FLEN/8, x10, x1, x4)

inst_795:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x371 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x36f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3371; op2val:0x6b6f;
   valaddr_reg:x8; val_offset:1540*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1540*FLEN/8, x10, x1, x4)

inst_796:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x371 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x36f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3371; op2val:0x6b6f;
   valaddr_reg:x8; val_offset:1542*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1542*FLEN/8, x10, x1, x4)

inst_797:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x371 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x36f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3371; op2val:0x6b6f;
   valaddr_reg:x8; val_offset:1544*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1544*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_798:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x371 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x36f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3371; op2val:0x6b6f;
   valaddr_reg:x8; val_offset:1546*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1546*FLEN/8, x10, x1, x4)

inst_799:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x371 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x36f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3371; op2val:0x6b6f;
   valaddr_reg:x8; val_offset:1548*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1548*FLEN/8, x10, x1, x4)

inst_800:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08e and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348e; op2val:0x6c8d;
   valaddr_reg:x8; val_offset:1550*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1550*FLEN/8, x10, x1, x4)

inst_801:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08e and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348e; op2val:0x6c8d;
   valaddr_reg:x8; val_offset:1552*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1552*FLEN/8, x10, x1, x4)

inst_802:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08e and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348e; op2val:0x6c8d;
   valaddr_reg:x8; val_offset:1554*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1554*FLEN/8, x10, x1, x4)

inst_803:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08e and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348e; op2val:0x6c8d;
   valaddr_reg:x8; val_offset:1556*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1556*FLEN/8, x10, x1, x4)

inst_804:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08e and fs2 == 0 and fe2 == 0x1b and fm2 == 0x08d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x348e; op2val:0x6c8d;
   valaddr_reg:x8; val_offset:1558*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1558*FLEN/8, x10, x1, x4)

inst_805:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x004 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x003 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3404; op2val:0x6c03;
   valaddr_reg:x8; val_offset:1560*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1560*FLEN/8, x10, x1, x4)

inst_806:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x004 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x003 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3404; op2val:0x6c03;
   valaddr_reg:x8; val_offset:1562*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1562*FLEN/8, x10, x1, x4)

inst_807:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x004 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x003 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3404; op2val:0x6c03;
   valaddr_reg:x8; val_offset:1564*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1564*FLEN/8, x10, x1, x4)

inst_808:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x004 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x003 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3404; op2val:0x6c03;
   valaddr_reg:x8; val_offset:1566*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1566*FLEN/8, x10, x1, x4)

inst_809:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x004 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x003 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3404; op2val:0x6c03;
   valaddr_reg:x8; val_offset:1568*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1568*FLEN/8, x10, x1, x4)

inst_810:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x382 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x380 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b82; op2val:0x7380;
   valaddr_reg:x8; val_offset:1570*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1570*FLEN/8, x10, x1, x4)

inst_811:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x382 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x380 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b82; op2val:0x7380;
   valaddr_reg:x8; val_offset:1572*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1572*FLEN/8, x10, x1, x4)

inst_812:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x382 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x380 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b82; op2val:0x7380;
   valaddr_reg:x8; val_offset:1574*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1574*FLEN/8, x10, x1, x4)

inst_813:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x382 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x380 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b82; op2val:0x7380;
   valaddr_reg:x8; val_offset:1576*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1576*FLEN/8, x10, x1, x4)

inst_814:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x382 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x380 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b82; op2val:0x7380;
   valaddr_reg:x8; val_offset:1578*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1578*FLEN/8, x10, x1, x4)

inst_815:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2fa and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36fa; op2val:0x6ef8;
   valaddr_reg:x8; val_offset:1580*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1580*FLEN/8, x10, x1, x4)

inst_816:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2fa and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36fa; op2val:0x6ef8;
   valaddr_reg:x8; val_offset:1582*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1582*FLEN/8, x10, x1, x4)

inst_817:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2fa and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36fa; op2val:0x6ef8;
   valaddr_reg:x8; val_offset:1584*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1584*FLEN/8, x10, x1, x4)

inst_818:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2fa and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36fa; op2val:0x6ef8;
   valaddr_reg:x8; val_offset:1586*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1586*FLEN/8, x10, x1, x4)

inst_819:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2fa and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36fa; op2val:0x6ef8;
   valaddr_reg:x8; val_offset:1588*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1588*FLEN/8, x10, x1, x4)

inst_820:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x20e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x720e;
   valaddr_reg:x8; val_offset:1590*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1590*FLEN/8, x10, x1, x4)

inst_821:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x20e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x720e;
   valaddr_reg:x8; val_offset:1592*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1592*FLEN/8, x10, x1, x4)

inst_822:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x20e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x720e;
   valaddr_reg:x8; val_offset:1594*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1594*FLEN/8, x10, x1, x4)

inst_823:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x20e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x720e;
   valaddr_reg:x8; val_offset:1596*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1596*FLEN/8, x10, x1, x4)

inst_824:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x20e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x720e;
   valaddr_reg:x8; val_offset:1598*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1598*FLEN/8, x10, x1, x4)

inst_825:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x200 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fe and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a00; op2val:0x71fe;
   valaddr_reg:x8; val_offset:1600*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1600*FLEN/8, x10, x1, x4)

inst_826:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x200 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fe and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a00; op2val:0x71fe;
   valaddr_reg:x8; val_offset:1602*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1602*FLEN/8, x10, x1, x4)

inst_827:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x200 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fe and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a00; op2val:0x71fe;
   valaddr_reg:x8; val_offset:1604*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1604*FLEN/8, x10, x1, x4)

inst_828:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x200 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fe and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a00; op2val:0x71fe;
   valaddr_reg:x8; val_offset:1606*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1606*FLEN/8, x10, x1, x4)

inst_829:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x200 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fe and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a00; op2val:0x71fe;
   valaddr_reg:x8; val_offset:1608*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1608*FLEN/8, x10, x1, x4)

inst_830:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3e3 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3e0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33e3; op2val:0x6be0;
   valaddr_reg:x8; val_offset:1610*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1610*FLEN/8, x10, x1, x4)

inst_831:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3e3 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3e0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33e3; op2val:0x6be0;
   valaddr_reg:x8; val_offset:1612*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1612*FLEN/8, x10, x1, x4)

inst_832:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3e3 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3e0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33e3; op2val:0x6be0;
   valaddr_reg:x8; val_offset:1614*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1614*FLEN/8, x10, x1, x4)

inst_833:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3e3 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3e0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33e3; op2val:0x6be0;
   valaddr_reg:x8; val_offset:1616*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1616*FLEN/8, x10, x1, x4)

inst_834:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3e3 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3e0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33e3; op2val:0x6be0;
   valaddr_reg:x8; val_offset:1618*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1618*FLEN/8, x10, x1, x4)

inst_835:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0ac and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390f; op2val:0x70ac;
   valaddr_reg:x8; val_offset:1620*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1620*FLEN/8, x10, x1, x4)

inst_836:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0ac and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390f; op2val:0x70ac;
   valaddr_reg:x8; val_offset:1622*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1622*FLEN/8, x10, x1, x4)

inst_837:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0ac and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390f; op2val:0x70ac;
   valaddr_reg:x8; val_offset:1624*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1624*FLEN/8, x10, x1, x4)

inst_838:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0ac and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390f; op2val:0x70ac;
   valaddr_reg:x8; val_offset:1626*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1626*FLEN/8, x10, x1, x4)

inst_839:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0ac and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x390f; op2val:0x70ac;
   valaddr_reg:x8; val_offset:1628*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1628*FLEN/8, x10, x1, x4)

inst_840:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0cc and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3932; op2val:0x70cc;
   valaddr_reg:x8; val_offset:1630*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1630*FLEN/8, x10, x1, x4)

inst_841:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0cc and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3932; op2val:0x70cc;
   valaddr_reg:x8; val_offset:1632*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1632*FLEN/8, x10, x1, x4)

inst_842:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0cc and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3932; op2val:0x70cc;
   valaddr_reg:x8; val_offset:1634*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1634*FLEN/8, x10, x1, x4)

inst_843:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0cc and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3932; op2val:0x70cc;
   valaddr_reg:x8; val_offset:1636*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1636*FLEN/8, x10, x1, x4)

inst_844:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0cc and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3932; op2val:0x70cc;
   valaddr_reg:x8; val_offset:1638*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1638*FLEN/8, x10, x1, x4)

inst_845:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x355 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2c5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b55; op2val:0x72c5;
   valaddr_reg:x8; val_offset:1640*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1640*FLEN/8, x10, x1, x4)

inst_846:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x355 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2c5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b55; op2val:0x72c5;
   valaddr_reg:x8; val_offset:1642*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1642*FLEN/8, x10, x1, x4)

inst_847:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x355 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2c5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b55; op2val:0x72c5;
   valaddr_reg:x8; val_offset:1644*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1644*FLEN/8, x10, x1, x4)

inst_848:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x355 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2c5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b55; op2val:0x72c5;
   valaddr_reg:x8; val_offset:1646*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1646*FLEN/8, x10, x1, x4)

inst_849:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x355 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2c5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b55; op2val:0x72c5;
   valaddr_reg:x8; val_offset:1648*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1648*FLEN/8, x10, x1, x4)

inst_850:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x262 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x26e9; op2val:0x5e62;
   valaddr_reg:x8; val_offset:1650*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1650*FLEN/8, x10, x1, x4)

inst_851:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x262 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x26e9; op2val:0x5e62;
   valaddr_reg:x8; val_offset:1652*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1652*FLEN/8, x10, x1, x4)

inst_852:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x262 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x26e9; op2val:0x5e62;
   valaddr_reg:x8; val_offset:1654*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1654*FLEN/8, x10, x1, x4)

inst_853:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x262 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x26e9; op2val:0x5e62;
   valaddr_reg:x8; val_offset:1656*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1656*FLEN/8, x10, x1, x4)

inst_854:
// fs1 == 0 and fe1 == 0x09 and fm1 == 0x2e9 and fs2 == 0 and fe2 == 0x17 and fm2 == 0x262 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x26e9; op2val:0x5e62;
   valaddr_reg:x8; val_offset:1658*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1658*FLEN/8, x10, x1, x4)

inst_855:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x00a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x376 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x340a; op2val:0x6b76;
   valaddr_reg:x8; val_offset:1660*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1660*FLEN/8, x10, x1, x4)

inst_856:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x00a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x376 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x340a; op2val:0x6b76;
   valaddr_reg:x8; val_offset:1662*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1662*FLEN/8, x10, x1, x4)

inst_857:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x00a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x376 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x340a; op2val:0x6b76;
   valaddr_reg:x8; val_offset:1664*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1664*FLEN/8, x10, x1, x4)

inst_858:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x00a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x376 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x340a; op2val:0x6b76;
   valaddr_reg:x8; val_offset:1666*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1666*FLEN/8, x10, x1, x4)

inst_859:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x00a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x376 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x340a; op2val:0x6b76;
   valaddr_reg:x8; val_offset:1668*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1668*FLEN/8, x10, x1, x4)

inst_860:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x091 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f2; op2val:0x6c91;
   valaddr_reg:x8; val_offset:1670*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1670*FLEN/8, x10, x1, x4)

inst_861:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x091 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f2; op2val:0x6c91;
   valaddr_reg:x8; val_offset:1672*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1672*FLEN/8, x10, x1, x4)

inst_862:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x091 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f2; op2val:0x6c91;
   valaddr_reg:x8; val_offset:1674*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1674*FLEN/8, x10, x1, x4)

inst_863:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x091 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f2; op2val:0x6c91;
   valaddr_reg:x8; val_offset:1676*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1676*FLEN/8, x10, x1, x4)

inst_864:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f2 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x091 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f2; op2val:0x6c91;
   valaddr_reg:x8; val_offset:1678*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1678*FLEN/8, x10, x1, x4)

inst_865:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x138 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3538; op2val:0x6cd1;
   valaddr_reg:x8; val_offset:1680*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1680*FLEN/8, x10, x1, x4)

inst_866:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x138 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3538; op2val:0x6cd1;
   valaddr_reg:x8; val_offset:1682*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1682*FLEN/8, x10, x1, x4)

inst_867:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x138 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3538; op2val:0x6cd1;
   valaddr_reg:x8; val_offset:1684*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1684*FLEN/8, x10, x1, x4)

inst_868:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x138 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3538; op2val:0x6cd1;
   valaddr_reg:x8; val_offset:1686*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1686*FLEN/8, x10, x1, x4)

inst_869:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x138 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3538; op2val:0x6cd1;
   valaddr_reg:x8; val_offset:1688*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1688*FLEN/8, x10, x1, x4)

inst_870:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x021 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3821; op2val:0x6fa0;
   valaddr_reg:x8; val_offset:1690*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1690*FLEN/8, x10, x1, x4)

inst_871:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x021 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3821; op2val:0x6fa0;
   valaddr_reg:x8; val_offset:1692*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1692*FLEN/8, x10, x1, x4)

inst_872:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x021 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3821; op2val:0x6fa0;
   valaddr_reg:x8; val_offset:1694*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1694*FLEN/8, x10, x1, x4)

inst_873:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x021 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3821; op2val:0x6fa0;
   valaddr_reg:x8; val_offset:1696*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1696*FLEN/8, x10, x1, x4)

inst_874:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x021 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3821; op2val:0x6fa0;
   valaddr_reg:x8; val_offset:1698*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1698*FLEN/8, x10, x1, x4)

inst_875:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x291 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x210 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e91; op2val:0x6610;
   valaddr_reg:x8; val_offset:1700*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1700*FLEN/8, x10, x1, x4)

inst_876:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x291 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x210 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e91; op2val:0x6610;
   valaddr_reg:x8; val_offset:1702*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1702*FLEN/8, x10, x1, x4)

inst_877:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x291 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x210 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e91; op2val:0x6610;
   valaddr_reg:x8; val_offset:1704*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1704*FLEN/8, x10, x1, x4)

inst_878:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x291 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x210 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e91; op2val:0x6610;
   valaddr_reg:x8; val_offset:1706*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1706*FLEN/8, x10, x1, x4)

inst_879:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x291 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x210 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e91; op2val:0x6610;
   valaddr_reg:x8; val_offset:1708*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1708*FLEN/8, x10, x1, x4)

inst_880:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x33b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ad and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b3b; op2val:0x72ad;
   valaddr_reg:x8; val_offset:1710*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1710*FLEN/8, x10, x1, x4)

inst_881:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x33b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ad and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b3b; op2val:0x72ad;
   valaddr_reg:x8; val_offset:1712*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1712*FLEN/8, x10, x1, x4)

inst_882:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x33b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ad and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b3b; op2val:0x72ad;
   valaddr_reg:x8; val_offset:1714*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1714*FLEN/8, x10, x1, x4)

inst_883:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x33b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ad and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b3b; op2val:0x72ad;
   valaddr_reg:x8; val_offset:1716*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1716*FLEN/8, x10, x1, x4)

inst_884:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x33b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2ad and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b3b; op2val:0x72ad;
   valaddr_reg:x8; val_offset:1718*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1718*FLEN/8, x10, x1, x4)

inst_885:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x157 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x0ee and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d57; op2val:0x64ee;
   valaddr_reg:x8; val_offset:1720*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1720*FLEN/8, x10, x1, x4)

inst_886:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x157 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x0ee and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d57; op2val:0x64ee;
   valaddr_reg:x8; val_offset:1722*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1722*FLEN/8, x10, x1, x4)

inst_887:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x157 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x0ee and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d57; op2val:0x64ee;
   valaddr_reg:x8; val_offset:1724*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1724*FLEN/8, x10, x1, x4)

inst_888:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x157 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x0ee and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d57; op2val:0x64ee;
   valaddr_reg:x8; val_offset:1726*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1726*FLEN/8, x10, x1, x4)

inst_889:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x157 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x0ee and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d57; op2val:0x64ee;
   valaddr_reg:x8; val_offset:1728*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1728*FLEN/8, x10, x1, x4)

inst_890:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x074 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x01d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3874; op2val:0x701d;
   valaddr_reg:x8; val_offset:1730*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1730*FLEN/8, x10, x1, x4)

inst_891:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x074 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x01d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3874; op2val:0x701d;
   valaddr_reg:x8; val_offset:1732*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1732*FLEN/8, x10, x1, x4)

inst_892:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x074 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x01d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3874; op2val:0x701d;
   valaddr_reg:x8; val_offset:1734*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1734*FLEN/8, x10, x1, x4)

inst_893:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x074 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x01d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3874; op2val:0x701d;
   valaddr_reg:x8; val_offset:1736*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1736*FLEN/8, x10, x1, x4)

inst_894:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x074 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x01d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3874; op2val:0x701d;
   valaddr_reg:x8; val_offset:1738*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1738*FLEN/8, x10, x1, x4)

inst_895:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x282 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x202 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a82; op2val:0x7202;
   valaddr_reg:x8; val_offset:1740*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1740*FLEN/8, x10, x1, x4)

inst_896:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x282 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x202 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a82; op2val:0x7202;
   valaddr_reg:x8; val_offset:1742*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1742*FLEN/8, x10, x1, x4)

inst_897:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x282 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x202 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a82; op2val:0x7202;
   valaddr_reg:x8; val_offset:1744*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1744*FLEN/8, x10, x1, x4)

inst_898:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x282 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x202 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a82; op2val:0x7202;
   valaddr_reg:x8; val_offset:1746*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1746*FLEN/8, x10, x1, x4)

inst_899:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x282 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x202 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a82; op2val:0x7202;
   valaddr_reg:x8; val_offset:1748*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1748*FLEN/8, x10, x1, x4)

inst_900:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x268 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1ea and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a68; op2val:0x71ea;
   valaddr_reg:x8; val_offset:1750*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1750*FLEN/8, x10, x1, x4)

inst_901:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x268 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1ea and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a68; op2val:0x71ea;
   valaddr_reg:x8; val_offset:1752*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1752*FLEN/8, x10, x1, x4)

inst_902:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x268 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1ea and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a68; op2val:0x71ea;
   valaddr_reg:x8; val_offset:1754*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1754*FLEN/8, x10, x1, x4)

inst_903:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x268 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1ea and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a68; op2val:0x71ea;
   valaddr_reg:x8; val_offset:1756*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1756*FLEN/8, x10, x1, x4)

inst_904:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x268 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1ea and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a68; op2val:0x71ea;
   valaddr_reg:x8; val_offset:1758*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1758*FLEN/8, x10, x1, x4)

inst_905:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397b; op2val:0x710f;
   valaddr_reg:x8; val_offset:1760*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1760*FLEN/8, x10, x1, x4)

inst_906:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397b; op2val:0x710f;
   valaddr_reg:x8; val_offset:1762*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1762*FLEN/8, x10, x1, x4)

inst_907:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397b; op2val:0x710f;
   valaddr_reg:x8; val_offset:1764*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1764*FLEN/8, x10, x1, x4)

inst_908:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397b; op2val:0x710f;
   valaddr_reg:x8; val_offset:1766*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1766*FLEN/8, x10, x1, x4)

inst_909:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x10f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397b; op2val:0x710f;
   valaddr_reg:x8; val_offset:1768*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1768*FLEN/8, x10, x1, x4)

inst_910:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f1 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x090 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f1; op2val:0x6c90;
   valaddr_reg:x8; val_offset:1770*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1770*FLEN/8, x10, x1, x4)

inst_911:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f1 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x090 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f1; op2val:0x6c90;
   valaddr_reg:x8; val_offset:1772*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1772*FLEN/8, x10, x1, x4)

inst_912:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f1 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x090 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f1; op2val:0x6c90;
   valaddr_reg:x8; val_offset:1774*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1774*FLEN/8, x10, x1, x4)

inst_913:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f1 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x090 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f1; op2val:0x6c90;
   valaddr_reg:x8; val_offset:1776*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1776*FLEN/8, x10, x1, x4)

inst_914:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0f1 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x090 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34f1; op2val:0x6c90;
   valaddr_reg:x8; val_offset:1778*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1778*FLEN/8, x10, x1, x4)

inst_915:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x133 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x7133;
   valaddr_reg:x8; val_offset:1780*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1780*FLEN/8, x10, x1, x4)

inst_916:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x133 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x7133;
   valaddr_reg:x8; val_offset:1782*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1782*FLEN/8, x10, x1, x4)

inst_917:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x133 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x7133;
   valaddr_reg:x8; val_offset:1784*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1784*FLEN/8, x10, x1, x4)

inst_918:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x133 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x7133;
   valaddr_reg:x8; val_offset:1786*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1786*FLEN/8, x10, x1, x4)

inst_919:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x133 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x7133;
   valaddr_reg:x8; val_offset:1788*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1788*FLEN/8, x10, x1, x4)

inst_920:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x055 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b1; op2val:0x7055;
   valaddr_reg:x8; val_offset:1790*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1790*FLEN/8, x10, x1, x4)

inst_921:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x055 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b1; op2val:0x7055;
   valaddr_reg:x8; val_offset:1792*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1792*FLEN/8, x10, x1, x4)

inst_922:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x055 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b1; op2val:0x7055;
   valaddr_reg:x8; val_offset:1794*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1794*FLEN/8, x10, x1, x4)

inst_923:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x055 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b1; op2val:0x7055;
   valaddr_reg:x8; val_offset:1796*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1796*FLEN/8, x10, x1, x4)

inst_924:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x055 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38b1; op2val:0x7055;
   valaddr_reg:x8; val_offset:1798*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1798*FLEN/8, x10, x1, x4)

inst_925:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a5 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x222 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a5; op2val:0x6e22;
   valaddr_reg:x8; val_offset:1800*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1800*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_7)

inst_926:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a5 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x222 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a5; op2val:0x6e22;
   valaddr_reg:x8; val_offset:1802*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1802*FLEN/8, x10, x1, x4)

inst_927:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a5 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x222 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a5; op2val:0x6e22;
   valaddr_reg:x8; val_offset:1804*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1804*FLEN/8, x10, x1, x4)

inst_928:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a5 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x222 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a5; op2val:0x6e22;
   valaddr_reg:x8; val_offset:1806*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1806*FLEN/8, x10, x1, x4)

inst_929:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2a5 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x222 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36a5; op2val:0x6e22;
   valaddr_reg:x8; val_offset:1808*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1808*FLEN/8, x10, x1, x4)

inst_930:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x242 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1c7 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a42; op2val:0x71c7;
   valaddr_reg:x8; val_offset:1810*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1810*FLEN/8, x10, x1, x4)

inst_931:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x242 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1c7 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a42; op2val:0x71c7;
   valaddr_reg:x8; val_offset:1812*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1812*FLEN/8, x10, x1, x4)

inst_932:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x242 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1c7 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a42; op2val:0x71c7;
   valaddr_reg:x8; val_offset:1814*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1814*FLEN/8, x10, x1, x4)

inst_933:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x242 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1c7 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a42; op2val:0x71c7;
   valaddr_reg:x8; val_offset:1816*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1816*FLEN/8, x10, x1, x4)

inst_934:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x242 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1c7 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a42; op2val:0x71c7;
   valaddr_reg:x8; val_offset:1818*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1818*FLEN/8, x10, x1, x4)

inst_935:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382a; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1820*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1820*FLEN/8, x10, x1, x4)

inst_936:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382a; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1822*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1822*FLEN/8, x10, x1, x4)

inst_937:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382a; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1824*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1824*FLEN/8, x10, x1, x4)

inst_938:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382a; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1826*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1826*FLEN/8, x10, x1, x4)

inst_939:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x382a; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1828*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1828*FLEN/8, x10, x1, x4)

inst_940:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x29f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a9f; op2val:0x721d;
   valaddr_reg:x8; val_offset:1830*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1830*FLEN/8, x10, x1, x4)

inst_941:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x29f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a9f; op2val:0x721d;
   valaddr_reg:x8; val_offset:1832*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1832*FLEN/8, x10, x1, x4)

inst_942:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x29f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a9f; op2val:0x721d;
   valaddr_reg:x8; val_offset:1834*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1834*FLEN/8, x10, x1, x4)

inst_943:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x29f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a9f; op2val:0x721d;
   valaddr_reg:x8; val_offset:1836*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1836*FLEN/8, x10, x1, x4)

inst_944:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x29f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x21d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a9f; op2val:0x721d;
   valaddr_reg:x8; val_offset:1838*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1838*FLEN/8, x10, x1, x4)

inst_945:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x101 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x7101;
   valaddr_reg:x8; val_offset:1840*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1840*FLEN/8, x10, x1, x4)

inst_946:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x101 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x7101;
   valaddr_reg:x8; val_offset:1842*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1842*FLEN/8, x10, x1, x4)

inst_947:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x101 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x7101;
   valaddr_reg:x8; val_offset:1844*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1844*FLEN/8, x10, x1, x4)

inst_948:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x101 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x7101;
   valaddr_reg:x8; val_offset:1846*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1846*FLEN/8, x10, x1, x4)

inst_949:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x16c and fs2 == 0 and fe2 == 0x1c and fm2 == 0x101 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x396c; op2val:0x7101;
   valaddr_reg:x8; val_offset:1848*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1848*FLEN/8, x10, x1, x4)

inst_950:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x253 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ad9; op2val:0x7253;
   valaddr_reg:x8; val_offset:1850*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1850*FLEN/8, x10, x1, x4)

inst_951:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x253 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ad9; op2val:0x7253;
   valaddr_reg:x8; val_offset:1852*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1852*FLEN/8, x10, x1, x4)

inst_952:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x253 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ad9; op2val:0x7253;
   valaddr_reg:x8; val_offset:1854*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1854*FLEN/8, x10, x1, x4)

inst_953:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x253 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ad9; op2val:0x7253;
   valaddr_reg:x8; val_offset:1856*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1856*FLEN/8, x10, x1, x4)

inst_954:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d9 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x253 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ad9; op2val:0x7253;
   valaddr_reg:x8; val_offset:1858*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1858*FLEN/8, x10, x1, x4)

inst_955:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x029 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3829; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1860*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1860*FLEN/8, x10, x1, x4)

inst_956:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x029 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3829; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1862*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1862*FLEN/8, x10, x1, x4)

inst_957:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x029 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3829; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1864*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1864*FLEN/8, x10, x1, x4)

inst_958:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x029 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3829; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1866*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1866*FLEN/8, x10, x1, x4)

inst_959:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x029 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3b0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3829; op2val:0x6fb0;
   valaddr_reg:x8; val_offset:1868*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1868*FLEN/8, x10, x1, x4)

inst_960:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x041 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3db and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3841; op2val:0x6fdb;
   valaddr_reg:x8; val_offset:1870*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1870*FLEN/8, x10, x1, x4)

inst_961:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x041 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3db and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3841; op2val:0x6fdb;
   valaddr_reg:x8; val_offset:1872*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1872*FLEN/8, x10, x1, x4)

inst_962:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x041 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3db and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3841; op2val:0x6fdb;
   valaddr_reg:x8; val_offset:1874*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1874*FLEN/8, x10, x1, x4)

inst_963:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x041 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3db and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3841; op2val:0x6fdb;
   valaddr_reg:x8; val_offset:1876*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1876*FLEN/8, x10, x1, x4)

inst_964:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x041 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3db and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3841; op2val:0x6fdb;
   valaddr_reg:x8; val_offset:1878*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1878*FLEN/8, x10, x1, x4)

inst_965:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1b5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x145 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31b5; op2val:0x6945;
   valaddr_reg:x8; val_offset:1880*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1880*FLEN/8, x10, x1, x4)

inst_966:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1b5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x145 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31b5; op2val:0x6945;
   valaddr_reg:x8; val_offset:1882*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1882*FLEN/8, x10, x1, x4)

inst_967:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1b5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x145 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31b5; op2val:0x6945;
   valaddr_reg:x8; val_offset:1884*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1884*FLEN/8, x10, x1, x4)

inst_968:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1b5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x145 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31b5; op2val:0x6945;
   valaddr_reg:x8; val_offset:1886*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1886*FLEN/8, x10, x1, x4)

inst_969:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1b5 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x145 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x31b5; op2val:0x6945;
   valaddr_reg:x8; val_offset:1888*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1888*FLEN/8, x10, x1, x4)

inst_970:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x026 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3826; op2val:0x6fa9;
   valaddr_reg:x8; val_offset:1890*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1890*FLEN/8, x10, x1, x4)

inst_971:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x026 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3826; op2val:0x6fa9;
   valaddr_reg:x8; val_offset:1892*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1892*FLEN/8, x10, x1, x4)

inst_972:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x026 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3826; op2val:0x6fa9;
   valaddr_reg:x8; val_offset:1894*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1894*FLEN/8, x10, x1, x4)

inst_973:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x026 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3826; op2val:0x6fa9;
   valaddr_reg:x8; val_offset:1896*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1896*FLEN/8, x10, x1, x4)

inst_974:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x026 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3a9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3826; op2val:0x6fa9;
   valaddr_reg:x8; val_offset:1898*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1898*FLEN/8, x10, x1, x4)

inst_975:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x096 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x03c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3096; op2val:0x683c;
   valaddr_reg:x8; val_offset:1900*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1900*FLEN/8, x10, x1, x4)

inst_976:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x096 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x03c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3096; op2val:0x683c;
   valaddr_reg:x8; val_offset:1902*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1902*FLEN/8, x10, x1, x4)

inst_977:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x096 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x03c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3096; op2val:0x683c;
   valaddr_reg:x8; val_offset:1904*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1904*FLEN/8, x10, x1, x4)

inst_978:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x096 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x03c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3096; op2val:0x683c;
   valaddr_reg:x8; val_offset:1906*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1906*FLEN/8, x10, x1, x4)

inst_979:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x096 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x03c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3096; op2val:0x683c;
   valaddr_reg:x8; val_offset:1908*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1908*FLEN/8, x10, x1, x4)

inst_980:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x043 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3df and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3443; op2val:0x6bdf;
   valaddr_reg:x8; val_offset:1910*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1910*FLEN/8, x10, x1, x4)

inst_981:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x043 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3df and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3443; op2val:0x6bdf;
   valaddr_reg:x8; val_offset:1912*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1912*FLEN/8, x10, x1, x4)

inst_982:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x043 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3df and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3443; op2val:0x6bdf;
   valaddr_reg:x8; val_offset:1914*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1914*FLEN/8, x10, x1, x4)

inst_983:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x043 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3df and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3443; op2val:0x6bdf;
   valaddr_reg:x8; val_offset:1916*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1916*FLEN/8, x10, x1, x4)

inst_984:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x043 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3df and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3443; op2val:0x6bdf;
   valaddr_reg:x8; val_offset:1918*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1918*FLEN/8, x10, x1, x4)

inst_985:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3de and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3842; op2val:0x6fde;
   valaddr_reg:x8; val_offset:1920*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1920*FLEN/8, x10, x1, x4)

inst_986:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3de and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3842; op2val:0x6fde;
   valaddr_reg:x8; val_offset:1922*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1922*FLEN/8, x10, x1, x4)

inst_987:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3de and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3842; op2val:0x6fde;
   valaddr_reg:x8; val_offset:1924*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1924*FLEN/8, x10, x1, x4)

inst_988:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3de and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3842; op2val:0x6fde;
   valaddr_reg:x8; val_offset:1926*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1926*FLEN/8, x10, x1, x4)

inst_989:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x042 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3de and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3842; op2val:0x6fde;
   valaddr_reg:x8; val_offset:1928*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1928*FLEN/8, x10, x1, x4)

inst_990:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x21f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a6 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a1f; op2val:0x71a6;
   valaddr_reg:x8; val_offset:1930*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1930*FLEN/8, x10, x1, x4)

inst_991:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x21f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a6 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a1f; op2val:0x71a6;
   valaddr_reg:x8; val_offset:1932*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1932*FLEN/8, x10, x1, x4)

inst_992:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x21f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a6 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a1f; op2val:0x71a6;
   valaddr_reg:x8; val_offset:1934*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1934*FLEN/8, x10, x1, x4)

inst_993:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x21f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a6 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a1f; op2val:0x71a6;
   valaddr_reg:x8; val_offset:1936*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1936*FLEN/8, x10, x1, x4)

inst_994:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x21f and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a6 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a1f; op2val:0x71a6;
   valaddr_reg:x8; val_offset:1938*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1938*FLEN/8, x10, x1, x4)

inst_995:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0cb and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3531; op2val:0x6ccb;
   valaddr_reg:x8; val_offset:1940*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1940*FLEN/8, x10, x1, x4)

inst_996:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0cb and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3531; op2val:0x6ccb;
   valaddr_reg:x8; val_offset:1942*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1942*FLEN/8, x10, x1, x4)

inst_997:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0cb and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3531; op2val:0x6ccb;
   valaddr_reg:x8; val_offset:1944*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1944*FLEN/8, x10, x1, x4)

inst_998:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0cb and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3531; op2val:0x6ccb;
   valaddr_reg:x8; val_offset:1946*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1946*FLEN/8, x10, x1, x4)

inst_999:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x131 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0cb and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3531; op2val:0x6ccb;
   valaddr_reg:x8; val_offset:1948*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1948*FLEN/8, x10, x1, x4)

inst_1000:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1a and fm2 == 0x051 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ad; op2val:0x6851;
   valaddr_reg:x8; val_offset:1950*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1950*FLEN/8, x10, x1, x4)

inst_1001:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1a and fm2 == 0x051 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ad; op2val:0x6851;
   valaddr_reg:x8; val_offset:1952*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1952*FLEN/8, x10, x1, x4)

inst_1002:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1a and fm2 == 0x051 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ad; op2val:0x6851;
   valaddr_reg:x8; val_offset:1954*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1954*FLEN/8, x10, x1, x4)

inst_1003:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1a and fm2 == 0x051 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ad; op2val:0x6851;
   valaddr_reg:x8; val_offset:1956*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1956*FLEN/8, x10, x1, x4)

inst_1004:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0ad and fs2 == 0 and fe2 == 0x1a and fm2 == 0x051 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x30ad; op2val:0x6851;
   valaddr_reg:x8; val_offset:1958*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1958*FLEN/8, x10, x1, x4)

inst_1005:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fc and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a7b; op2val:0x71fc;
   valaddr_reg:x8; val_offset:1960*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1960*FLEN/8, x10, x1, x4)

inst_1006:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fc and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a7b; op2val:0x71fc;
   valaddr_reg:x8; val_offset:1962*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1962*FLEN/8, x10, x1, x4)

inst_1007:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fc and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a7b; op2val:0x71fc;
   valaddr_reg:x8; val_offset:1964*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1964*FLEN/8, x10, x1, x4)

inst_1008:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fc and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a7b; op2val:0x71fc;
   valaddr_reg:x8; val_offset:1966*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1966*FLEN/8, x10, x1, x4)

inst_1009:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27b and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1fc and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a7b; op2val:0x71fc;
   valaddr_reg:x8; val_offset:1968*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1968*FLEN/8, x10, x1, x4)

inst_1010:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7200;
   valaddr_reg:x8; val_offset:1970*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1970*FLEN/8, x10, x1, x4)

inst_1011:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7200;
   valaddr_reg:x8; val_offset:1972*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1972*FLEN/8, x10, x1, x4)

inst_1012:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7200;
   valaddr_reg:x8; val_offset:1974*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1974*FLEN/8, x10, x1, x4)

inst_1013:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7200;
   valaddr_reg:x8; val_offset:1976*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1976*FLEN/8, x10, x1, x4)

inst_1014:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x280 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x200 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a80; op2val:0x7200;
   valaddr_reg:x8; val_offset:1978*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1978*FLEN/8, x10, x1, x4)

inst_1015:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x02d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3086; op2val:0x682d;
   valaddr_reg:x8; val_offset:1980*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1980*FLEN/8, x10, x1, x4)

inst_1016:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x02d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3086; op2val:0x682d;
   valaddr_reg:x8; val_offset:1982*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1982*FLEN/8, x10, x1, x4)

inst_1017:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x02d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3086; op2val:0x682d;
   valaddr_reg:x8; val_offset:1984*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1984*FLEN/8, x10, x1, x4)

inst_1018:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x02d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3086; op2val:0x682d;
   valaddr_reg:x8; val_offset:1986*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1986*FLEN/8, x10, x1, x4)

inst_1019:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x086 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x02d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3086; op2val:0x682d;
   valaddr_reg:x8; val_offset:1988*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1988*FLEN/8, x10, x1, x4)

inst_1020:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x180 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39f5; op2val:0x7180;
   valaddr_reg:x8; val_offset:1990*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 1990*FLEN/8, x10, x1, x4)

inst_1021:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x180 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39f5; op2val:0x7180;
   valaddr_reg:x8; val_offset:1992*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 1992*FLEN/8, x10, x1, x4)

inst_1022:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x180 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39f5; op2val:0x7180;
   valaddr_reg:x8; val_offset:1994*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 1994*FLEN/8, x10, x1, x4)

inst_1023:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x180 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39f5; op2val:0x7180;
   valaddr_reg:x8; val_offset:1996*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 1996*FLEN/8, x10, x1, x4)

inst_1024:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x180 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39f5; op2val:0x7180;
   valaddr_reg:x8; val_offset:1998*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 1998*FLEN/8, x10, x1, x4)

inst_1025:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x112 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397e; op2val:0x7112;
   valaddr_reg:x8; val_offset:2000*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2000*FLEN/8, x10, x1, x4)

inst_1026:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x112 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397e; op2val:0x7112;
   valaddr_reg:x8; val_offset:2002*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2002*FLEN/8, x10, x1, x4)

inst_1027:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x112 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397e; op2val:0x7112;
   valaddr_reg:x8; val_offset:2004*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2004*FLEN/8, x10, x1, x4)

inst_1028:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x112 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397e; op2val:0x7112;
   valaddr_reg:x8; val_offset:2006*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2006*FLEN/8, x10, x1, x4)

inst_1029:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x17e and fs2 == 0 and fe2 == 0x1c and fm2 == 0x112 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x397e; op2val:0x7112;
   valaddr_reg:x8; val_offset:2008*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2008*FLEN/8, x10, x1, x4)

inst_1030:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x056 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x001 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3456; op2val:0x6c01;
   valaddr_reg:x8; val_offset:2010*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2010*FLEN/8, x10, x1, x4)

inst_1031:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x056 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x001 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3456; op2val:0x6c01;
   valaddr_reg:x8; val_offset:2012*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2012*FLEN/8, x10, x1, x4)

inst_1032:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x056 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x001 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3456; op2val:0x6c01;
   valaddr_reg:x8; val_offset:2014*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2014*FLEN/8, x10, x1, x4)

inst_1033:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x056 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x001 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3456; op2val:0x6c01;
   valaddr_reg:x8; val_offset:2016*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2016*FLEN/8, x10, x1, x4)

inst_1034:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x056 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x001 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3456; op2val:0x6c01;
   valaddr_reg:x8; val_offset:2018*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2018*FLEN/8, x10, x1, x4)

inst_1035:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x342 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2b3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b42; op2val:0x72b3;
   valaddr_reg:x8; val_offset:2020*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2020*FLEN/8, x10, x1, x4)

inst_1036:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x342 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2b3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b42; op2val:0x72b3;
   valaddr_reg:x8; val_offset:2022*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2022*FLEN/8, x10, x1, x4)

inst_1037:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x342 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2b3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b42; op2val:0x72b3;
   valaddr_reg:x8; val_offset:2024*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2024*FLEN/8, x10, x1, x4)

inst_1038:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x342 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2b3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b42; op2val:0x72b3;
   valaddr_reg:x8; val_offset:2026*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2026*FLEN/8, x10, x1, x4)

inst_1039:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x342 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2b3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b42; op2val:0x72b3;
   valaddr_reg:x8; val_offset:2028*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2028*FLEN/8, x10, x1, x4)

inst_1040:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x13b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39aa; op2val:0x713b;
   valaddr_reg:x8; val_offset:2030*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2030*FLEN/8, x10, x1, x4)

inst_1041:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x13b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39aa; op2val:0x713b;
   valaddr_reg:x8; val_offset:2032*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2032*FLEN/8, x10, x1, x4)

inst_1042:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x13b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39aa; op2val:0x713b;
   valaddr_reg:x8; val_offset:2034*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2034*FLEN/8, x10, x1, x4)

inst_1043:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x13b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39aa; op2val:0x713b;
   valaddr_reg:x8; val_offset:2036*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2036*FLEN/8, x10, x1, x4)

inst_1044:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x13b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39aa; op2val:0x713b;
   valaddr_reg:x8; val_offset:2038*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2038*FLEN/8, x10, x1, x4)

inst_1045:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2b7 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1c2 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36b7; op2val:0x6dc2;
   valaddr_reg:x8; val_offset:2040*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2040*FLEN/8, x10, x1, x4)

inst_1046:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2b7 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1c2 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36b7; op2val:0x6dc2;
   valaddr_reg:x8; val_offset:2042*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2042*FLEN/8, x10, x1, x4)

inst_1047:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2b7 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1c2 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36b7; op2val:0x6dc2;
   valaddr_reg:x8; val_offset:2044*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2044*FLEN/8, x10, x1, x4)

inst_1048:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2b7 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1c2 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36b7; op2val:0x6dc2;
   valaddr_reg:x8; val_offset:2046*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2046*FLEN/8, x10, x1, x4)

inst_1049:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2b7 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1c2 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36b7; op2val:0x6dc2;
   valaddr_reg:x8; val_offset:2048*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2048*FLEN/8, x10, x1, x4)

inst_1050:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2d0 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf1; op2val:0x72d0;
   valaddr_reg:x8; val_offset:2050*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2050*FLEN/8, x10, x1, x4)

inst_1051:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2d0 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf1; op2val:0x72d0;
   valaddr_reg:x8; val_offset:2052*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2052*FLEN/8, x10, x1, x4)

inst_1052:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2d0 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf1; op2val:0x72d0;
   valaddr_reg:x8; val_offset:2054*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2054*FLEN/8, x10, x1, x4)

inst_1053:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2d0 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf1; op2val:0x72d0;
   valaddr_reg:x8; val_offset:2056*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2056*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_8)

inst_1054:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3f1 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x2d0 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bf1; op2val:0x72d0;
   valaddr_reg:x8; val_offset:2058*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2058*FLEN/8, x10, x1, x4)

inst_1055:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3bc and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3882; op2val:0x6fbc;
   valaddr_reg:x8; val_offset:2060*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2060*FLEN/8, x10, x1, x4)

inst_1056:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3bc and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3882; op2val:0x6fbc;
   valaddr_reg:x8; val_offset:2062*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2062*FLEN/8, x10, x1, x4)

inst_1057:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3bc and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3882; op2val:0x6fbc;
   valaddr_reg:x8; val_offset:2064*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2064*FLEN/8, x10, x1, x4)

inst_1058:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3bc and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3882; op2val:0x6fbc;
   valaddr_reg:x8; val_offset:2066*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2066*FLEN/8, x10, x1, x4)

inst_1059:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x3bc and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3882; op2val:0x6fbc;
   valaddr_reg:x8; val_offset:2068*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2068*FLEN/8, x10, x1, x4)

inst_1060:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x251 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16b and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a51; op2val:0x716b;
   valaddr_reg:x8; val_offset:2070*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2070*FLEN/8, x10, x1, x4)

inst_1061:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x251 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16b and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a51; op2val:0x716b;
   valaddr_reg:x8; val_offset:2072*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2072*FLEN/8, x10, x1, x4)

inst_1062:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x251 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16b and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a51; op2val:0x716b;
   valaddr_reg:x8; val_offset:2074*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2074*FLEN/8, x10, x1, x4)

inst_1063:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x251 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16b and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a51; op2val:0x716b;
   valaddr_reg:x8; val_offset:2076*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2076*FLEN/8, x10, x1, x4)

inst_1064:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x251 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x16b and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a51; op2val:0x716b;
   valaddr_reg:x8; val_offset:2078*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2078*FLEN/8, x10, x1, x4)

inst_1065:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0e8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x29b9; op2val:0x60e8;
   valaddr_reg:x8; val_offset:2080*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2080*FLEN/8, x10, x1, x4)

inst_1066:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0e8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x29b9; op2val:0x60e8;
   valaddr_reg:x8; val_offset:2082*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2082*FLEN/8, x10, x1, x4)

inst_1067:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0e8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x29b9; op2val:0x60e8;
   valaddr_reg:x8; val_offset:2084*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2084*FLEN/8, x10, x1, x4)

inst_1068:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0e8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x29b9; op2val:0x60e8;
   valaddr_reg:x8; val_offset:2086*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2086*FLEN/8, x10, x1, x4)

inst_1069:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x0e8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x29b9; op2val:0x60e8;
   valaddr_reg:x8; val_offset:2088*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2088*FLEN/8, x10, x1, x4)

inst_1070:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x240 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x374a; op2val:0x6e40;
   valaddr_reg:x8; val_offset:2090*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2090*FLEN/8, x10, x1, x4)

inst_1071:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x240 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x374a; op2val:0x6e40;
   valaddr_reg:x8; val_offset:2092*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2092*FLEN/8, x10, x1, x4)

inst_1072:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x240 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x374a; op2val:0x6e40;
   valaddr_reg:x8; val_offset:2094*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2094*FLEN/8, x10, x1, x4)

inst_1073:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x240 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x374a; op2val:0x6e40;
   valaddr_reg:x8; val_offset:2096*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2096*FLEN/8, x10, x1, x4)

inst_1074:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x34a and fs2 == 0 and fe2 == 0x1b and fm2 == 0x240 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x374a; op2val:0x6e40;
   valaddr_reg:x8; val_offset:2098*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2098*FLEN/8, x10, x1, x4)

inst_1075:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39cd; op2val:0x70f9;
   valaddr_reg:x8; val_offset:2100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2100*FLEN/8, x10, x1, x4)

inst_1076:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39cd; op2val:0x70f9;
   valaddr_reg:x8; val_offset:2102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2102*FLEN/8, x10, x1, x4)

inst_1077:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39cd; op2val:0x70f9;
   valaddr_reg:x8; val_offset:2104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2104*FLEN/8, x10, x1, x4)

inst_1078:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39cd; op2val:0x70f9;
   valaddr_reg:x8; val_offset:2106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2106*FLEN/8, x10, x1, x4)

inst_1079:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0f9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39cd; op2val:0x70f9;
   valaddr_reg:x8; val_offset:2108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2108*FLEN/8, x10, x1, x4)

inst_1080:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x319 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x216 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b19; op2val:0x7216;
   valaddr_reg:x8; val_offset:2110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2110*FLEN/8, x10, x1, x4)

inst_1081:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x319 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x216 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b19; op2val:0x7216;
   valaddr_reg:x8; val_offset:2112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2112*FLEN/8, x10, x1, x4)

inst_1082:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x319 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x216 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b19; op2val:0x7216;
   valaddr_reg:x8; val_offset:2114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2114*FLEN/8, x10, x1, x4)

inst_1083:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x319 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x216 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b19; op2val:0x7216;
   valaddr_reg:x8; val_offset:2116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2116*FLEN/8, x10, x1, x4)

inst_1084:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x319 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x216 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b19; op2val:0x7216;
   valaddr_reg:x8; val_offset:2118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2118*FLEN/8, x10, x1, x4)

inst_1085:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x102 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2dd7; op2val:0x6502;
   valaddr_reg:x8; val_offset:2120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2120*FLEN/8, x10, x1, x4)

inst_1086:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x102 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2dd7; op2val:0x6502;
   valaddr_reg:x8; val_offset:2122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2122*FLEN/8, x10, x1, x4)

inst_1087:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x102 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2dd7; op2val:0x6502;
   valaddr_reg:x8; val_offset:2124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2124*FLEN/8, x10, x1, x4)

inst_1088:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x102 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2dd7; op2val:0x6502;
   valaddr_reg:x8; val_offset:2126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2126*FLEN/8, x10, x1, x4)

inst_1089:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d7 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x102 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2dd7; op2val:0x6502;
   valaddr_reg:x8; val_offset:2128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2128*FLEN/8, x10, x1, x4)

inst_1090:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x386 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x273 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b86; op2val:0x6273;
   valaddr_reg:x8; val_offset:2130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2130*FLEN/8, x10, x1, x4)

inst_1091:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x386 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x273 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b86; op2val:0x6273;
   valaddr_reg:x8; val_offset:2132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2132*FLEN/8, x10, x1, x4)

inst_1092:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x386 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x273 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b86; op2val:0x6273;
   valaddr_reg:x8; val_offset:2134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2134*FLEN/8, x10, x1, x4)

inst_1093:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x386 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x273 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b86; op2val:0x6273;
   valaddr_reg:x8; val_offset:2136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2136*FLEN/8, x10, x1, x4)

inst_1094:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x386 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x273 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b86; op2val:0x6273;
   valaddr_reg:x8; val_offset:2138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2138*FLEN/8, x10, x1, x4)

inst_1095:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x348 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x23f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3348; op2val:0x6a3f;
   valaddr_reg:x8; val_offset:2140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2140*FLEN/8, x10, x1, x4)

inst_1096:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x348 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x23f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3348; op2val:0x6a3f;
   valaddr_reg:x8; val_offset:2142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2142*FLEN/8, x10, x1, x4)

inst_1097:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x348 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x23f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3348; op2val:0x6a3f;
   valaddr_reg:x8; val_offset:2144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2144*FLEN/8, x10, x1, x4)

inst_1098:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x348 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x23f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3348; op2val:0x6a3f;
   valaddr_reg:x8; val_offset:2146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2146*FLEN/8, x10, x1, x4)

inst_1099:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x348 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x23f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3348; op2val:0x6a3f;
   valaddr_reg:x8; val_offset:2148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2148*FLEN/8, x10, x1, x4)

inst_1100:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0d5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x70d5;
   valaddr_reg:x8; val_offset:2150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2150*FLEN/8, x10, x1, x4)

inst_1101:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0d5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x70d5;
   valaddr_reg:x8; val_offset:2152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2152*FLEN/8, x10, x1, x4)

inst_1102:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0d5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x70d5;
   valaddr_reg:x8; val_offset:2154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2154*FLEN/8, x10, x1, x4)

inst_1103:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0d5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x70d5;
   valaddr_reg:x8; val_offset:2156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2156*FLEN/8, x10, x1, x4)

inst_1104:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a2 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0d5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a2; op2val:0x70d5;
   valaddr_reg:x8; val_offset:2158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2158*FLEN/8, x10, x1, x4)

inst_1105:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x189 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0bf and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3589; op2val:0x6cbf;
   valaddr_reg:x8; val_offset:2160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2160*FLEN/8, x10, x1, x4)

inst_1106:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x189 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0bf and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3589; op2val:0x6cbf;
   valaddr_reg:x8; val_offset:2162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2162*FLEN/8, x10, x1, x4)

inst_1107:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x189 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0bf and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3589; op2val:0x6cbf;
   valaddr_reg:x8; val_offset:2164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2164*FLEN/8, x10, x1, x4)

inst_1108:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x189 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0bf and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3589; op2val:0x6cbf;
   valaddr_reg:x8; val_offset:2166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2166*FLEN/8, x10, x1, x4)

inst_1109:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x189 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0bf and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3589; op2val:0x6cbf;
   valaddr_reg:x8; val_offset:2168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2168*FLEN/8, x10, x1, x4)

inst_1110:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e0; op2val:0x7109;
   valaddr_reg:x8; val_offset:2170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2170*FLEN/8, x10, x1, x4)

inst_1111:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e0; op2val:0x7109;
   valaddr_reg:x8; val_offset:2172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2172*FLEN/8, x10, x1, x4)

inst_1112:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e0; op2val:0x7109;
   valaddr_reg:x8; val_offset:2174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2174*FLEN/8, x10, x1, x4)

inst_1113:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e0; op2val:0x7109;
   valaddr_reg:x8; val_offset:2176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2176*FLEN/8, x10, x1, x4)

inst_1114:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e0 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39e0; op2val:0x7109;
   valaddr_reg:x8; val_offset:2178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2178*FLEN/8, x10, x1, x4)

inst_1115:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0f5 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x040 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x28f5; op2val:0x6040;
   valaddr_reg:x8; val_offset:2180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2180*FLEN/8, x10, x1, x4)

inst_1116:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0f5 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x040 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x28f5; op2val:0x6040;
   valaddr_reg:x8; val_offset:2182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2182*FLEN/8, x10, x1, x4)

inst_1117:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0f5 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x040 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x28f5; op2val:0x6040;
   valaddr_reg:x8; val_offset:2184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2184*FLEN/8, x10, x1, x4)

inst_1118:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0f5 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x040 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x28f5; op2val:0x6040;
   valaddr_reg:x8; val_offset:2186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2186*FLEN/8, x10, x1, x4)

inst_1119:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0f5 and fs2 == 0 and fe2 == 0x18 and fm2 == 0x040 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x28f5; op2val:0x6040;
   valaddr_reg:x8; val_offset:2188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2188*FLEN/8, x10, x1, x4)

inst_1120:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x25d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376c; op2val:0x6e5d;
   valaddr_reg:x8; val_offset:2190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2190*FLEN/8, x10, x1, x4)

inst_1121:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x25d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376c; op2val:0x6e5d;
   valaddr_reg:x8; val_offset:2192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2192*FLEN/8, x10, x1, x4)

inst_1122:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x25d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376c; op2val:0x6e5d;
   valaddr_reg:x8; val_offset:2194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2194*FLEN/8, x10, x1, x4)

inst_1123:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x25d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376c; op2val:0x6e5d;
   valaddr_reg:x8; val_offset:2196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2196*FLEN/8, x10, x1, x4)

inst_1124:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x25d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x376c; op2val:0x6e5d;
   valaddr_reg:x8; val_offset:2198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2198*FLEN/8, x10, x1, x4)

inst_1125:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x380c; op2val:0x6ef1;
   valaddr_reg:x8; val_offset:2200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2200*FLEN/8, x10, x1, x4)

inst_1126:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x380c; op2val:0x6ef1;
   valaddr_reg:x8; val_offset:2202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2202*FLEN/8, x10, x1, x4)

inst_1127:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x380c; op2val:0x6ef1;
   valaddr_reg:x8; val_offset:2204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2204*FLEN/8, x10, x1, x4)

inst_1128:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x380c; op2val:0x6ef1;
   valaddr_reg:x8; val_offset:2206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2206*FLEN/8, x10, x1, x4)

inst_1129:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00c and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2f1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x380c; op2val:0x6ef1;
   valaddr_reg:x8; val_offset:2208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2208*FLEN/8, x10, x1, x4)

inst_1130:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3bc and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3482; op2val:0x6bbc;
   valaddr_reg:x8; val_offset:2210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2210*FLEN/8, x10, x1, x4)

inst_1131:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3bc and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3482; op2val:0x6bbc;
   valaddr_reg:x8; val_offset:2212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2212*FLEN/8, x10, x1, x4)

inst_1132:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3bc and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3482; op2val:0x6bbc;
   valaddr_reg:x8; val_offset:2214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2214*FLEN/8, x10, x1, x4)

inst_1133:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3bc and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3482; op2val:0x6bbc;
   valaddr_reg:x8; val_offset:2216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2216*FLEN/8, x10, x1, x4)

inst_1134:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x3bc and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3482; op2val:0x6bbc;
   valaddr_reg:x8; val_offset:2218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2218*FLEN/8, x10, x1, x4)

inst_1135:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2f0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36f0; op2val:0x6df3;
   valaddr_reg:x8; val_offset:2220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2220*FLEN/8, x10, x1, x4)

inst_1136:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2f0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36f0; op2val:0x6df3;
   valaddr_reg:x8; val_offset:2222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2222*FLEN/8, x10, x1, x4)

inst_1137:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2f0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36f0; op2val:0x6df3;
   valaddr_reg:x8; val_offset:2224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2224*FLEN/8, x10, x1, x4)

inst_1138:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2f0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36f0; op2val:0x6df3;
   valaddr_reg:x8; val_offset:2226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2226*FLEN/8, x10, x1, x4)

inst_1139:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2f0 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x1f3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36f0; op2val:0x6df3;
   valaddr_reg:x8; val_offset:2228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2228*FLEN/8, x10, x1, x4)

inst_1140:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1ab and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0dc and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35ab; op2val:0x6cdc;
   valaddr_reg:x8; val_offset:2230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2230*FLEN/8, x10, x1, x4)

inst_1141:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1ab and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0dc and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35ab; op2val:0x6cdc;
   valaddr_reg:x8; val_offset:2232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2232*FLEN/8, x10, x1, x4)

inst_1142:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1ab and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0dc and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35ab; op2val:0x6cdc;
   valaddr_reg:x8; val_offset:2234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2234*FLEN/8, x10, x1, x4)

inst_1143:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1ab and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0dc and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35ab; op2val:0x6cdc;
   valaddr_reg:x8; val_offset:2236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2236*FLEN/8, x10, x1, x4)

inst_1144:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1ab and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0dc and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35ab; op2val:0x6cdc;
   valaddr_reg:x8; val_offset:2238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2238*FLEN/8, x10, x1, x4)

inst_1145:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x291 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a91; op2val:0x71a1;
   valaddr_reg:x8; val_offset:2240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2240*FLEN/8, x10, x1, x4)

inst_1146:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x291 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a91; op2val:0x71a1;
   valaddr_reg:x8; val_offset:2242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2242*FLEN/8, x10, x1, x4)

inst_1147:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x291 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a91; op2val:0x71a1;
   valaddr_reg:x8; val_offset:2244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2244*FLEN/8, x10, x1, x4)

inst_1148:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x291 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a91; op2val:0x71a1;
   valaddr_reg:x8; val_offset:2246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2246*FLEN/8, x10, x1, x4)

inst_1149:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x291 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x1a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a91; op2val:0x71a1;
   valaddr_reg:x8; val_offset:2248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2248*FLEN/8, x10, x1, x4)

inst_1150:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0ba and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3583; op2val:0x6cba;
   valaddr_reg:x8; val_offset:2250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2250*FLEN/8, x10, x1, x4)

inst_1151:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0ba and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3583; op2val:0x6cba;
   valaddr_reg:x8; val_offset:2252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2252*FLEN/8, x10, x1, x4)

inst_1152:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0ba and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3583; op2val:0x6cba;
   valaddr_reg:x8; val_offset:2254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2254*FLEN/8, x10, x1, x4)

inst_1153:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0ba and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3583; op2val:0x6cba;
   valaddr_reg:x8; val_offset:2256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2256*FLEN/8, x10, x1, x4)

inst_1154:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0ba and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3583; op2val:0x6cba;
   valaddr_reg:x8; val_offset:2258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2258*FLEN/8, x10, x1, x4)

inst_1155:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x05d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x37c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c5d; op2val:0x637c;
   valaddr_reg:x8; val_offset:2260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2260*FLEN/8, x10, x1, x4)

inst_1156:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x05d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x37c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c5d; op2val:0x637c;
   valaddr_reg:x8; val_offset:2262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2262*FLEN/8, x10, x1, x4)

inst_1157:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x05d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x37c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c5d; op2val:0x637c;
   valaddr_reg:x8; val_offset:2264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2264*FLEN/8, x10, x1, x4)

inst_1158:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x05d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x37c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c5d; op2val:0x637c;
   valaddr_reg:x8; val_offset:2266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2266*FLEN/8, x10, x1, x4)

inst_1159:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x05d and fs2 == 0 and fe2 == 0x18 and fm2 == 0x37c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2c5d; op2val:0x637c;
   valaddr_reg:x8; val_offset:2268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2268*FLEN/8, x10, x1, x4)

inst_1160:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x159 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x095 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3959; op2val:0x7095;
   valaddr_reg:x8; val_offset:2270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2270*FLEN/8, x10, x1, x4)

inst_1161:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x159 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x095 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3959; op2val:0x7095;
   valaddr_reg:x8; val_offset:2272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2272*FLEN/8, x10, x1, x4)

inst_1162:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x159 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x095 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3959; op2val:0x7095;
   valaddr_reg:x8; val_offset:2274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2274*FLEN/8, x10, x1, x4)

inst_1163:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x159 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x095 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3959; op2val:0x7095;
   valaddr_reg:x8; val_offset:2276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2276*FLEN/8, x10, x1, x4)

inst_1164:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x159 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x095 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3959; op2val:0x7095;
   valaddr_reg:x8; val_offset:2278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2278*FLEN/8, x10, x1, x4)

inst_1165:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x186 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3671; op2val:0x6d86;
   valaddr_reg:x8; val_offset:2280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2280*FLEN/8, x10, x1, x4)

inst_1166:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x186 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3671; op2val:0x6d86;
   valaddr_reg:x8; val_offset:2282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2282*FLEN/8, x10, x1, x4)

inst_1167:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x186 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3671; op2val:0x6d86;
   valaddr_reg:x8; val_offset:2284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2284*FLEN/8, x10, x1, x4)

inst_1168:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x186 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3671; op2val:0x6d86;
   valaddr_reg:x8; val_offset:2286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2286*FLEN/8, x10, x1, x4)

inst_1169:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x271 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x186 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3671; op2val:0x6d86;
   valaddr_reg:x8; val_offset:2288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2288*FLEN/8, x10, x1, x4)

inst_1170:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d6 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35a4; op2val:0x6cd6;
   valaddr_reg:x8; val_offset:2290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2290*FLEN/8, x10, x1, x4)

inst_1171:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d6 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35a4; op2val:0x6cd6;
   valaddr_reg:x8; val_offset:2292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2292*FLEN/8, x10, x1, x4)

inst_1172:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d6 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35a4; op2val:0x6cd6;
   valaddr_reg:x8; val_offset:2294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2294*FLEN/8, x10, x1, x4)

inst_1173:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d6 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35a4; op2val:0x6cd6;
   valaddr_reg:x8; val_offset:2296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2296*FLEN/8, x10, x1, x4)

inst_1174:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x0d6 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x35a4; op2val:0x6cd6;
   valaddr_reg:x8; val_offset:2298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2298*FLEN/8, x10, x1, x4)

inst_1175:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x180 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b7 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3980; op2val:0x70b7;
   valaddr_reg:x8; val_offset:2300*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2300*FLEN/8, x10, x1, x4)

inst_1176:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x180 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b7 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3980; op2val:0x70b7;
   valaddr_reg:x8; val_offset:2302*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2302*FLEN/8, x10, x1, x4)

inst_1177:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x180 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b7 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3980; op2val:0x70b7;
   valaddr_reg:x8; val_offset:2304*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2304*FLEN/8, x10, x1, x4)

inst_1178:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x180 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b7 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3980; op2val:0x70b7;
   valaddr_reg:x8; val_offset:2306*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2306*FLEN/8, x10, x1, x4)

inst_1179:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x180 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x0b7 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3980; op2val:0x70b7;
   valaddr_reg:x8; val_offset:2308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2308*FLEN/8, x10, x1, x4)

inst_1180:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x373 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x263 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b73; op2val:0x7263;
   valaddr_reg:x8; val_offset:2310*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2310*FLEN/8, x10, x1, x4)

inst_1181:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x373 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x263 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b73; op2val:0x7263;
   valaddr_reg:x8; val_offset:2312*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2312*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_9)

inst_1182:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x373 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x263 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b73; op2val:0x7263;
   valaddr_reg:x8; val_offset:2314*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2314*FLEN/8, x10, x1, x4)

inst_1183:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x373 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x263 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b73; op2val:0x7263;
   valaddr_reg:x8; val_offset:2316*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2316*FLEN/8, x10, x1, x4)

inst_1184:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x373 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x263 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b73; op2val:0x7263;
   valaddr_reg:x8; val_offset:2318*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2318*FLEN/8, x10, x1, x4)

inst_1185:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3db and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2bd and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33db; op2val:0x6abd;
   valaddr_reg:x8; val_offset:2320*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2320*FLEN/8, x10, x1, x4)

inst_1186:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3db and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2bd and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33db; op2val:0x6abd;
   valaddr_reg:x8; val_offset:2322*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2322*FLEN/8, x10, x1, x4)

inst_1187:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3db and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2bd and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33db; op2val:0x6abd;
   valaddr_reg:x8; val_offset:2324*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2324*FLEN/8, x10, x1, x4)

inst_1188:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3db and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2bd and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33db; op2val:0x6abd;
   valaddr_reg:x8; val_offset:2326*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2326*FLEN/8, x10, x1, x4)

inst_1189:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3db and fs2 == 0 and fe2 == 0x1a and fm2 == 0x2bd and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33db; op2val:0x6abd;
   valaddr_reg:x8; val_offset:2328*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2328*FLEN/8, x10, x1, x4)

inst_1190:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x325 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x342a; op2val:0x6b25;
   valaddr_reg:x8; val_offset:2330*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2330*FLEN/8, x10, x1, x4)

inst_1191:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x325 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x342a; op2val:0x6b25;
   valaddr_reg:x8; val_offset:2332*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2332*FLEN/8, x10, x1, x4)

inst_1192:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x325 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x342a; op2val:0x6b25;
   valaddr_reg:x8; val_offset:2334*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2334*FLEN/8, x10, x1, x4)

inst_1193:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x325 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x342a; op2val:0x6b25;
   valaddr_reg:x8; val_offset:2336*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2336*FLEN/8, x10, x1, x4)

inst_1194:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x02a and fs2 == 0 and fe2 == 0x1a and fm2 == 0x325 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x342a; op2val:0x6b25;
   valaddr_reg:x8; val_offset:2338*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2338*FLEN/8, x10, x1, x4)

inst_1195:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1df and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39df; op2val:0x7109;
   valaddr_reg:x8; val_offset:2340*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2340*FLEN/8, x10, x1, x4)

inst_1196:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1df and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39df; op2val:0x7109;
   valaddr_reg:x8; val_offset:2342*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2342*FLEN/8, x10, x1, x4)

inst_1197:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1df and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39df; op2val:0x7109;
   valaddr_reg:x8; val_offset:2344*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2344*FLEN/8, x10, x1, x4)

inst_1198:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1df and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39df; op2val:0x7109;
   valaddr_reg:x8; val_offset:2346*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2346*FLEN/8, x10, x1, x4)

inst_1199:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1df and fs2 == 0 and fe2 == 0x1c and fm2 == 0x109 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39df; op2val:0x7109;
   valaddr_reg:x8; val_offset:2348*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2348*FLEN/8, x10, x1, x4)

inst_1200:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2ff and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3014; op2val:0x66ff;
   valaddr_reg:x8; val_offset:2350*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2350*FLEN/8, x10, x1, x4)

inst_1201:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3014; op2val:0x66ff;
   valaddr_reg:x8; val_offset:2352*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2352*FLEN/8, x10, x1, x4)

inst_1202:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3014; op2val:0x66ff;
   valaddr_reg:x8; val_offset:2354*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2354*FLEN/8, x10, x1, x4)

inst_1203:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2ff and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3014; op2val:0x66ff;
   valaddr_reg:x8; val_offset:2356*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2356*FLEN/8, x10, x1, x4)

inst_1204:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 0 and fe2 == 0x19 and fm2 == 0x2ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3014; op2val:0x66ff;
   valaddr_reg:x8; val_offset:2358*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2358*FLEN/8, x10, x1, x4)

inst_1205:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3ec and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2cb and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37ec; op2val:0x6ecb;
   valaddr_reg:x8; val_offset:2360*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2360*FLEN/8, x10, x1, x4)

inst_1206:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3ec and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2cb and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37ec; op2val:0x6ecb;
   valaddr_reg:x8; val_offset:2362*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2362*FLEN/8, x10, x1, x4)

inst_1207:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3ec and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2cb and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37ec; op2val:0x6ecb;
   valaddr_reg:x8; val_offset:2364*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2364*FLEN/8, x10, x1, x4)

inst_1208:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3ec and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2cb and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37ec; op2val:0x6ecb;
   valaddr_reg:x8; val_offset:2366*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2366*FLEN/8, x10, x1, x4)

inst_1209:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3ec and fs2 == 0 and fe2 == 0x1b and fm2 == 0x2cb and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x37ec; op2val:0x6ecb;
   valaddr_reg:x8; val_offset:2368*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2368*FLEN/8, x10, x1, x4)

inst_1210:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x365 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x257 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3365; op2val:0x6a57;
   valaddr_reg:x8; val_offset:2370*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2370*FLEN/8, x10, x1, x4)

inst_1211:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x365 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x257 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3365; op2val:0x6a57;
   valaddr_reg:x8; val_offset:2372*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2372*FLEN/8, x10, x1, x4)

inst_1212:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x365 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x257 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3365; op2val:0x6a57;
   valaddr_reg:x8; val_offset:2374*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2374*FLEN/8, x10, x1, x4)

inst_1213:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x365 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x257 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3365; op2val:0x6a57;
   valaddr_reg:x8; val_offset:2376*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2376*FLEN/8, x10, x1, x4)

inst_1214:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x365 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x257 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3365; op2val:0x6a57;
   valaddr_reg:x8; val_offset:2378*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2378*FLEN/8, x10, x1, x4)

inst_1215:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x156 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x093 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3956; op2val:0x7093;
   valaddr_reg:x8; val_offset:2380*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2380*FLEN/8, x10, x1, x4)

inst_1216:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x156 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x093 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3956; op2val:0x7093;
   valaddr_reg:x8; val_offset:2382*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2382*FLEN/8, x10, x1, x4)

inst_1217:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x156 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x093 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3956; op2val:0x7093;
   valaddr_reg:x8; val_offset:2384*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2384*FLEN/8, x10, x1, x4)

inst_1218:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x156 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x093 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3956; op2val:0x7093;
   valaddr_reg:x8; val_offset:2386*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2386*FLEN/8, x10, x1, x4)

inst_1219:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x156 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x093 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3956; op2val:0x7093;
   valaddr_reg:x8; val_offset:2388*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2388*FLEN/8, x10, x1, x4)

inst_1220:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x356 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x24a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3756; op2val:0x6e4a;
   valaddr_reg:x8; val_offset:2390*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2390*FLEN/8, x10, x1, x4)

inst_1221:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x356 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x24a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3756; op2val:0x6e4a;
   valaddr_reg:x8; val_offset:2392*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2392*FLEN/8, x10, x1, x4)

inst_1222:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x356 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x24a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3756; op2val:0x6e4a;
   valaddr_reg:x8; val_offset:2394*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2394*FLEN/8, x10, x1, x4)

inst_1223:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x356 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x24a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3756; op2val:0x6e4a;
   valaddr_reg:x8; val_offset:2396*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2396*FLEN/8, x10, x1, x4)

inst_1224:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x356 and fs2 == 0 and fe2 == 0x1b and fm2 == 0x24a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3756; op2val:0x6e4a;
   valaddr_reg:x8; val_offset:2398*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2398*FLEN/8, x10, x1, x4)

inst_1225:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x070 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392d; op2val:0x7070;
   valaddr_reg:x8; val_offset:2400*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2400*FLEN/8, x10, x1, x4)

inst_1226:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x070 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392d; op2val:0x7070;
   valaddr_reg:x8; val_offset:2402*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2402*FLEN/8, x10, x1, x4)

inst_1227:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x070 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392d; op2val:0x7070;
   valaddr_reg:x8; val_offset:2404*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2404*FLEN/8, x10, x1, x4)

inst_1228:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x070 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392d; op2val:0x7070;
   valaddr_reg:x8; val_offset:2406*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2406*FLEN/8, x10, x1, x4)

inst_1229:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12d and fs2 == 0 and fe2 == 0x1c and fm2 == 0x070 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x392d; op2val:0x7070;
   valaddr_reg:x8; val_offset:2408*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2408*FLEN/8, x10, x1, x4)

inst_1230:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x217 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1a; op2val:0x7217;
   valaddr_reg:x8; val_offset:2410*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2410*FLEN/8, x10, x1, x4)

inst_1231:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x217 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1a; op2val:0x7217;
   valaddr_reg:x8; val_offset:2412*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2412*FLEN/8, x10, x1, x4)

inst_1232:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x217 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1a; op2val:0x7217;
   valaddr_reg:x8; val_offset:2414*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2414*FLEN/8, x10, x1, x4)

inst_1233:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x217 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1a; op2val:0x7217;
   valaddr_reg:x8; val_offset:2416*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2416*FLEN/8, x10, x1, x4)

inst_1234:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31a and fs2 == 0 and fe2 == 0x1c and fm2 == 0x217 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1a; op2val:0x7217;
   valaddr_reg:x8; val_offset:2418*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2418*FLEN/8, x10, x1, x4)

inst_1235:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x333 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x22d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b33; op2val:0x722d;
   valaddr_reg:x8; val_offset:2420*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2420*FLEN/8, x10, x1, x4)

inst_1236:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x333 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x22d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b33; op2val:0x722d;
   valaddr_reg:x8; val_offset:2422*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2422*FLEN/8, x10, x1, x4)

inst_1237:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x333 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x22d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b33; op2val:0x722d;
   valaddr_reg:x8; val_offset:2424*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2424*FLEN/8, x10, x1, x4)

inst_1238:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x333 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x22d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b33; op2val:0x722d;
   valaddr_reg:x8; val_offset:2426*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2426*FLEN/8, x10, x1, x4)

inst_1239:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x333 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x22d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b33; op2val:0x722d;
   valaddr_reg:x8; val_offset:2428*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2428*FLEN/8, x10, x1, x4)

inst_1240:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x313 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x210 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3313; op2val:0x6a10;
   valaddr_reg:x8; val_offset:2430*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2430*FLEN/8, x10, x1, x4)

inst_1241:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x313 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x210 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3313; op2val:0x6a10;
   valaddr_reg:x8; val_offset:2432*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2432*FLEN/8, x10, x1, x4)

inst_1242:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x313 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x210 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3313; op2val:0x6a10;
   valaddr_reg:x8; val_offset:2434*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2434*FLEN/8, x10, x1, x4)

inst_1243:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x313 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x210 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3313; op2val:0x6a10;
   valaddr_reg:x8; val_offset:2436*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2436*FLEN/8, x10, x1, x4)

inst_1244:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x313 and fs2 == 0 and fe2 == 0x1a and fm2 == 0x210 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3313; op2val:0x6a10;
   valaddr_reg:x8; val_offset:2438*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2438*FLEN/8, x10, x1, x4)

inst_1245:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x285 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x197 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a85; op2val:0x7197;
   valaddr_reg:x8; val_offset:2440*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2440*FLEN/8, x10, x1, x4)

inst_1246:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x285 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x197 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a85; op2val:0x7197;
   valaddr_reg:x8; val_offset:2442*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2442*FLEN/8, x10, x1, x4)

inst_1247:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x285 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x197 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a85; op2val:0x7197;
   valaddr_reg:x8; val_offset:2444*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2444*FLEN/8, x10, x1, x4)

inst_1248:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x285 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x197 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a85; op2val:0x7197;
   valaddr_reg:x8; val_offset:2446*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2446*FLEN/8, x10, x1, x4)

inst_1249:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x285 and fs2 == 0 and fe2 == 0x1c and fm2 == 0x197 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a85; op2val:0x7197;
   valaddr_reg:x8; val_offset:2448*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2448*FLEN/8, x10, x1, x4)

inst_1250:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x000 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38aa; op2val:0x7000;
   valaddr_reg:x8; val_offset:2450*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2450*FLEN/8, x10, x1, x4)

inst_1251:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x000 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38aa; op2val:0x7000;
   valaddr_reg:x8; val_offset:2452*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2452*FLEN/8, x10, x1, x4)

inst_1252:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x000 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38aa; op2val:0x7000;
   valaddr_reg:x8; val_offset:2454*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2454*FLEN/8, x10, x1, x4)

inst_1253:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x000 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38aa; op2val:0x7000;
   valaddr_reg:x8; val_offset:2456*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2456*FLEN/8, x10, x1, x4)

inst_1254:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0aa and fs2 == 0 and fe2 == 0x1c and fm2 == 0x000 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38aa; op2val:0x7000;
   valaddr_reg:x8; val_offset:2458*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2458*FLEN/8, x10, x1, x4)

inst_1255:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x28c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x28c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x528c; op2val:0x3a8c;
   valaddr_reg:x8; val_offset:2460*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2460*FLEN/8, x10, x1, x4)

inst_1256:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x28c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x28c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x528c; op2val:0x3a8c;
   valaddr_reg:x8; val_offset:2462*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2462*FLEN/8, x10, x1, x4)

inst_1257:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x28c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x28c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x528c; op2val:0x3a8c;
   valaddr_reg:x8; val_offset:2464*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2464*FLEN/8, x10, x1, x4)

inst_1258:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x28c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x28c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x528c; op2val:0x3a8c;
   valaddr_reg:x8; val_offset:2466*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2466*FLEN/8, x10, x1, x4)

inst_1259:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x28c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x28c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x528c; op2val:0x3a8c;
   valaddr_reg:x8; val_offset:2468*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2468*FLEN/8, x10, x1, x4)

inst_1260:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0c9 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50c9; op2val:0x38c9;
   valaddr_reg:x8; val_offset:2470*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2470*FLEN/8, x10, x1, x4)

inst_1261:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0c9 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50c9; op2val:0x38c9;
   valaddr_reg:x8; val_offset:2472*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2472*FLEN/8, x10, x1, x4)

inst_1262:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0c9 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50c9; op2val:0x38c9;
   valaddr_reg:x8; val_offset:2474*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2474*FLEN/8, x10, x1, x4)

inst_1263:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0c9 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50c9; op2val:0x38c9;
   valaddr_reg:x8; val_offset:2476*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2476*FLEN/8, x10, x1, x4)

inst_1264:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0c9 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50c9; op2val:0x38c9;
   valaddr_reg:x8; val_offset:2478*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2478*FLEN/8, x10, x1, x4)

inst_1265:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x286 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x286 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4e86; op2val:0x3686;
   valaddr_reg:x8; val_offset:2480*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2480*FLEN/8, x10, x1, x4)

inst_1266:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x286 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x286 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4e86; op2val:0x3686;
   valaddr_reg:x8; val_offset:2482*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2482*FLEN/8, x10, x1, x4)

inst_1267:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x286 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x286 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4e86; op2val:0x3686;
   valaddr_reg:x8; val_offset:2484*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2484*FLEN/8, x10, x1, x4)

inst_1268:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x286 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x286 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4e86; op2val:0x3686;
   valaddr_reg:x8; val_offset:2486*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2486*FLEN/8, x10, x1, x4)

inst_1269:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x286 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x286 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4e86; op2val:0x3686;
   valaddr_reg:x8; val_offset:2488*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2488*FLEN/8, x10, x1, x4)

inst_1270:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x047 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x047 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5047; op2val:0x3847;
   valaddr_reg:x8; val_offset:2490*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2490*FLEN/8, x10, x1, x4)

inst_1271:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x047 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x047 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5047; op2val:0x3847;
   valaddr_reg:x8; val_offset:2492*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2492*FLEN/8, x10, x1, x4)

inst_1272:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x047 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x047 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5047; op2val:0x3847;
   valaddr_reg:x8; val_offset:2494*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2494*FLEN/8, x10, x1, x4)

inst_1273:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x047 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x047 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5047; op2val:0x3847;
   valaddr_reg:x8; val_offset:2496*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2496*FLEN/8, x10, x1, x4)

inst_1274:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x047 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x047 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5047; op2val:0x3847;
   valaddr_reg:x8; val_offset:2498*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2498*FLEN/8, x10, x1, x4)

inst_1275:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2dd and fs2 == 0 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4add; op2val:0x32dd;
   valaddr_reg:x8; val_offset:2500*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2500*FLEN/8, x10, x1, x4)

inst_1276:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2dd and fs2 == 0 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4add; op2val:0x32dd;
   valaddr_reg:x8; val_offset:2502*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2502*FLEN/8, x10, x1, x4)

inst_1277:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2dd and fs2 == 0 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4add; op2val:0x32dd;
   valaddr_reg:x8; val_offset:2504*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2504*FLEN/8, x10, x1, x4)

inst_1278:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2dd and fs2 == 0 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4add; op2val:0x32dd;
   valaddr_reg:x8; val_offset:2506*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2506*FLEN/8, x10, x1, x4)

inst_1279:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2dd and fs2 == 0 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4add; op2val:0x32dd;
   valaddr_reg:x8; val_offset:2508*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2508*FLEN/8, x10, x1, x4)

inst_1280:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x248 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x247 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5248; op2val:0x3a47;
   valaddr_reg:x8; val_offset:2510*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2510*FLEN/8, x10, x1, x4)

inst_1281:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x248 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x247 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5248; op2val:0x3a47;
   valaddr_reg:x8; val_offset:2512*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2512*FLEN/8, x10, x1, x4)

inst_1282:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x248 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x247 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5248; op2val:0x3a47;
   valaddr_reg:x8; val_offset:2514*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2514*FLEN/8, x10, x1, x4)

inst_1283:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x248 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x247 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5248; op2val:0x3a47;
   valaddr_reg:x8; val_offset:2516*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2516*FLEN/8, x10, x1, x4)

inst_1284:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x248 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x247 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5248; op2val:0x3a47;
   valaddr_reg:x8; val_offset:2518*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2518*FLEN/8, x10, x1, x4)

inst_1285:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x273 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x273 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5273; op2val:0x3a73;
   valaddr_reg:x8; val_offset:2520*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2520*FLEN/8, x10, x1, x4)

inst_1286:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x273 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x273 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5273; op2val:0x3a73;
   valaddr_reg:x8; val_offset:2522*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2522*FLEN/8, x10, x1, x4)

inst_1287:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x273 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x273 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5273; op2val:0x3a73;
   valaddr_reg:x8; val_offset:2524*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2524*FLEN/8, x10, x1, x4)

inst_1288:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x273 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x273 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5273; op2val:0x3a73;
   valaddr_reg:x8; val_offset:2526*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2526*FLEN/8, x10, x1, x4)

inst_1289:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x273 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x273 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5273; op2val:0x3a73;
   valaddr_reg:x8; val_offset:2528*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2528*FLEN/8, x10, x1, x4)

inst_1290:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x39a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x399 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x539a; op2val:0x3b99;
   valaddr_reg:x8; val_offset:2530*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2530*FLEN/8, x10, x1, x4)

inst_1291:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x39a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x399 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x539a; op2val:0x3b99;
   valaddr_reg:x8; val_offset:2532*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2532*FLEN/8, x10, x1, x4)

inst_1292:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x39a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x399 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x539a; op2val:0x3b99;
   valaddr_reg:x8; val_offset:2534*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2534*FLEN/8, x10, x1, x4)

inst_1293:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x39a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x399 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x539a; op2val:0x3b99;
   valaddr_reg:x8; val_offset:2536*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2536*FLEN/8, x10, x1, x4)

inst_1294:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x39a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x399 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x539a; op2val:0x3b99;
   valaddr_reg:x8; val_offset:2538*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2538*FLEN/8, x10, x1, x4)

inst_1295:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x07a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x07a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x507a; op2val:0x387a;
   valaddr_reg:x8; val_offset:2540*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2540*FLEN/8, x10, x1, x4)

inst_1296:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x07a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x07a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x507a; op2val:0x387a;
   valaddr_reg:x8; val_offset:2542*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2542*FLEN/8, x10, x1, x4)

inst_1297:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x07a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x07a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x507a; op2val:0x387a;
   valaddr_reg:x8; val_offset:2544*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2544*FLEN/8, x10, x1, x4)

inst_1298:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x07a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x07a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x507a; op2val:0x387a;
   valaddr_reg:x8; val_offset:2546*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2546*FLEN/8, x10, x1, x4)

inst_1299:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x07a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x07a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x507a; op2val:0x387a;
   valaddr_reg:x8; val_offset:2548*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2548*FLEN/8, x10, x1, x4)

inst_1300:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x11d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x511d; op2val:0x391d;
   valaddr_reg:x8; val_offset:2550*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2550*FLEN/8, x10, x1, x4)

inst_1301:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x11d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x511d; op2val:0x391d;
   valaddr_reg:x8; val_offset:2552*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2552*FLEN/8, x10, x1, x4)

inst_1302:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x11d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x511d; op2val:0x391d;
   valaddr_reg:x8; val_offset:2554*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2554*FLEN/8, x10, x1, x4)

inst_1303:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x11d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x511d; op2val:0x391d;
   valaddr_reg:x8; val_offset:2556*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2556*FLEN/8, x10, x1, x4)

inst_1304:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x11d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x511d; op2val:0x391d;
   valaddr_reg:x8; val_offset:2558*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2558*FLEN/8, x10, x1, x4)

inst_1305:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x188 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x188 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5188; op2val:0x3988;
   valaddr_reg:x8; val_offset:2560*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2560*FLEN/8, x10, x1, x4)

inst_1306:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x188 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x188 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5188; op2val:0x3988;
   valaddr_reg:x8; val_offset:2562*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2562*FLEN/8, x10, x1, x4)

inst_1307:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x188 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x188 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5188; op2val:0x3988;
   valaddr_reg:x8; val_offset:2564*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2564*FLEN/8, x10, x1, x4)

inst_1308:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x188 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x188 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5188; op2val:0x3988;
   valaddr_reg:x8; val_offset:2566*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2566*FLEN/8, x10, x1, x4)

inst_1309:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x188 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x188 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5188; op2val:0x3988;
   valaddr_reg:x8; val_offset:2568*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2568*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_10)

inst_1310:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e6; op2val:0x3ae5;
   valaddr_reg:x8; val_offset:2570*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2570*FLEN/8, x10, x1, x4)

inst_1311:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e6; op2val:0x3ae5;
   valaddr_reg:x8; val_offset:2572*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2572*FLEN/8, x10, x1, x4)

inst_1312:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e6; op2val:0x3ae5;
   valaddr_reg:x8; val_offset:2574*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2574*FLEN/8, x10, x1, x4)

inst_1313:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e6; op2val:0x3ae5;
   valaddr_reg:x8; val_offset:2576*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2576*FLEN/8, x10, x1, x4)

inst_1314:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e6; op2val:0x3ae5;
   valaddr_reg:x8; val_offset:2578*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2578*FLEN/8, x10, x1, x4)

inst_1315:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0dc and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0dc and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50dc; op2val:0x38dc;
   valaddr_reg:x8; val_offset:2580*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2580*FLEN/8, x10, x1, x4)

inst_1316:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0dc and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0dc and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50dc; op2val:0x38dc;
   valaddr_reg:x8; val_offset:2582*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2582*FLEN/8, x10, x1, x4)

inst_1317:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0dc and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0dc and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50dc; op2val:0x38dc;
   valaddr_reg:x8; val_offset:2584*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2584*FLEN/8, x10, x1, x4)

inst_1318:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0dc and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0dc and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50dc; op2val:0x38dc;
   valaddr_reg:x8; val_offset:2586*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2586*FLEN/8, x10, x1, x4)

inst_1319:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0dc and fs2 == 0 and fe2 == 0x0e and fm2 == 0x0dc and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x50dc; op2val:0x38dc;
   valaddr_reg:x8; val_offset:2588*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2588*FLEN/8, x10, x1, x4)

inst_1320:
// fs1 == 0 and fe1 == 0x0f and fm1 == 0x099 and fs2 == 0 and fe2 == 0x09 and fm2 == 0x098 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3c99; op2val:0x2498;
   valaddr_reg:x8; val_offset:2590*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2590*FLEN/8, x10, x1, x4)

inst_1321:
// fs1 == 0 and fe1 == 0x0f and fm1 == 0x099 and fs2 == 0 and fe2 == 0x09 and fm2 == 0x098 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3c99; op2val:0x2498;
   valaddr_reg:x8; val_offset:2592*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2592*FLEN/8, x10, x1, x4)

inst_1322:
// fs1 == 0 and fe1 == 0x0f and fm1 == 0x099 and fs2 == 0 and fe2 == 0x09 and fm2 == 0x098 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3c99; op2val:0x2498;
   valaddr_reg:x8; val_offset:2594*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2594*FLEN/8, x10, x1, x4)

inst_1323:
// fs1 == 0 and fe1 == 0x0f and fm1 == 0x099 and fs2 == 0 and fe2 == 0x09 and fm2 == 0x098 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3c99; op2val:0x2498;
   valaddr_reg:x8; val_offset:2596*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2596*FLEN/8, x10, x1, x4)

inst_1324:
// fs1 == 0 and fe1 == 0x0f and fm1 == 0x099 and fs2 == 0 and fe2 == 0x09 and fm2 == 0x098 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3c99; op2val:0x2498;
   valaddr_reg:x8; val_offset:2598*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2598*FLEN/8, x10, x1, x4)

inst_1325:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x156 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x156 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5156; op2val:0x3956;
   valaddr_reg:x8; val_offset:2600*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2600*FLEN/8, x10, x1, x4)

inst_1326:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x156 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x156 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5156; op2val:0x3956;
   valaddr_reg:x8; val_offset:2602*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2602*FLEN/8, x10, x1, x4)

inst_1327:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x156 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x156 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5156; op2val:0x3956;
   valaddr_reg:x8; val_offset:2604*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2604*FLEN/8, x10, x1, x4)

inst_1328:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x156 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x156 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5156; op2val:0x3956;
   valaddr_reg:x8; val_offset:2606*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2606*FLEN/8, x10, x1, x4)

inst_1329:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x156 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x156 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5156; op2val:0x3956;
   valaddr_reg:x8; val_offset:2608*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2608*FLEN/8, x10, x1, x4)

inst_1330:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x03f and fs2 == 0 and fe2 == 0x0e and fm2 == 0x03f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x503f; op2val:0x383f;
   valaddr_reg:x8; val_offset:2610*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2610*FLEN/8, x10, x1, x4)

inst_1331:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x03f and fs2 == 0 and fe2 == 0x0e and fm2 == 0x03f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x503f; op2val:0x383f;
   valaddr_reg:x8; val_offset:2612*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2612*FLEN/8, x10, x1, x4)

inst_1332:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x03f and fs2 == 0 and fe2 == 0x0e and fm2 == 0x03f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x503f; op2val:0x383f;
   valaddr_reg:x8; val_offset:2614*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2614*FLEN/8, x10, x1, x4)

inst_1333:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x03f and fs2 == 0 and fe2 == 0x0e and fm2 == 0x03f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x503f; op2val:0x383f;
   valaddr_reg:x8; val_offset:2616*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2616*FLEN/8, x10, x1, x4)

inst_1334:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x03f and fs2 == 0 and fe2 == 0x0e and fm2 == 0x03f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x503f; op2val:0x383f;
   valaddr_reg:x8; val_offset:2618*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2618*FLEN/8, x10, x1, x4)

inst_1335:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x297 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x297 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a97; op2val:0x3297;
   valaddr_reg:x8; val_offset:2620*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2620*FLEN/8, x10, x1, x4)

inst_1336:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x297 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x297 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a97; op2val:0x3297;
   valaddr_reg:x8; val_offset:2622*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2622*FLEN/8, x10, x1, x4)

inst_1337:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x297 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x297 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a97; op2val:0x3297;
   valaddr_reg:x8; val_offset:2624*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2624*FLEN/8, x10, x1, x4)

inst_1338:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x297 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x297 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a97; op2val:0x3297;
   valaddr_reg:x8; val_offset:2626*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2626*FLEN/8, x10, x1, x4)

inst_1339:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x297 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x297 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a97; op2val:0x3297;
   valaddr_reg:x8; val_offset:2628*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2628*FLEN/8, x10, x1, x4)

inst_1340:
// fs1 == 0 and fe1 == 0x10 and fm1 == 0x2ab and fs2 == 0 and fe2 == 0x0a and fm2 == 0x2ab and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x42ab; op2val:0x2aab;
   valaddr_reg:x8; val_offset:2630*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2630*FLEN/8, x10, x1, x4)

inst_1341:
// fs1 == 0 and fe1 == 0x10 and fm1 == 0x2ab and fs2 == 0 and fe2 == 0x0a and fm2 == 0x2ab and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x42ab; op2val:0x2aab;
   valaddr_reg:x8; val_offset:2632*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2632*FLEN/8, x10, x1, x4)

inst_1342:
// fs1 == 0 and fe1 == 0x10 and fm1 == 0x2ab and fs2 == 0 and fe2 == 0x0a and fm2 == 0x2ab and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x42ab; op2val:0x2aab;
   valaddr_reg:x8; val_offset:2634*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2634*FLEN/8, x10, x1, x4)

inst_1343:
// fs1 == 0 and fe1 == 0x10 and fm1 == 0x2ab and fs2 == 0 and fe2 == 0x0a and fm2 == 0x2ab and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x42ab; op2val:0x2aab;
   valaddr_reg:x8; val_offset:2636*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2636*FLEN/8, x10, x1, x4)

inst_1344:
// fs1 == 0 and fe1 == 0x10 and fm1 == 0x2ab and fs2 == 0 and fe2 == 0x0a and fm2 == 0x2ab and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x42ab; op2val:0x2aab;
   valaddr_reg:x8; val_offset:2638*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2638*FLEN/8, x10, x1, x4)

inst_1345:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x136 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x136 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5136; op2val:0x3936;
   valaddr_reg:x8; val_offset:2640*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2640*FLEN/8, x10, x1, x4)

inst_1346:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x136 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x136 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5136; op2val:0x3936;
   valaddr_reg:x8; val_offset:2642*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2642*FLEN/8, x10, x1, x4)

inst_1347:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x136 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x136 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5136; op2val:0x3936;
   valaddr_reg:x8; val_offset:2644*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2644*FLEN/8, x10, x1, x4)

inst_1348:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x136 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x136 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5136; op2val:0x3936;
   valaddr_reg:x8; val_offset:2646*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2646*FLEN/8, x10, x1, x4)

inst_1349:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x136 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x136 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5136; op2val:0x3936;
   valaddr_reg:x8; val_offset:2648*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2648*FLEN/8, x10, x1, x4)

inst_1350:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x095 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x095 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5095; op2val:0x3895;
   valaddr_reg:x8; val_offset:2650*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2650*FLEN/8, x10, x1, x4)

inst_1351:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x095 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x095 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5095; op2val:0x3895;
   valaddr_reg:x8; val_offset:2652*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2652*FLEN/8, x10, x1, x4)

inst_1352:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x095 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x095 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5095; op2val:0x3895;
   valaddr_reg:x8; val_offset:2654*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2654*FLEN/8, x10, x1, x4)

inst_1353:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x095 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x095 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5095; op2val:0x3895;
   valaddr_reg:x8; val_offset:2656*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2656*FLEN/8, x10, x1, x4)

inst_1354:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x095 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x095 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5095; op2val:0x3895;
   valaddr_reg:x8; val_offset:2658*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2658*FLEN/8, x10, x1, x4)

inst_1355:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x326 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x326 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5326; op2val:0x3b26;
   valaddr_reg:x8; val_offset:2660*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2660*FLEN/8, x10, x1, x4)

inst_1356:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x326 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x326 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5326; op2val:0x3b26;
   valaddr_reg:x8; val_offset:2662*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2662*FLEN/8, x10, x1, x4)

inst_1357:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x326 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x326 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5326; op2val:0x3b26;
   valaddr_reg:x8; val_offset:2664*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2664*FLEN/8, x10, x1, x4)

inst_1358:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x326 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x326 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5326; op2val:0x3b26;
   valaddr_reg:x8; val_offset:2666*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2666*FLEN/8, x10, x1, x4)

inst_1359:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x326 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x326 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5326; op2val:0x3b26;
   valaddr_reg:x8; val_offset:2668*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2668*FLEN/8, x10, x1, x4)

inst_1360:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x25d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x25d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x525d; op2val:0x3a5d;
   valaddr_reg:x8; val_offset:2670*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2670*FLEN/8, x10, x1, x4)

inst_1361:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x25d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x25d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x525d; op2val:0x3a5d;
   valaddr_reg:x8; val_offset:2672*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2672*FLEN/8, x10, x1, x4)

inst_1362:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x25d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x25d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x525d; op2val:0x3a5d;
   valaddr_reg:x8; val_offset:2674*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2674*FLEN/8, x10, x1, x4)

inst_1363:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x25d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x25d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x525d; op2val:0x3a5d;
   valaddr_reg:x8; val_offset:2676*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2676*FLEN/8, x10, x1, x4)

inst_1364:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x25d and fs2 == 0 and fe2 == 0x0e and fm2 == 0x25d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x525d; op2val:0x3a5d;
   valaddr_reg:x8; val_offset:2678*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2678*FLEN/8, x10, x1, x4)

inst_1365:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x030 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x030 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4430; op2val:0x2c30;
   valaddr_reg:x8; val_offset:2680*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2680*FLEN/8, x10, x1, x4)

inst_1366:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x030 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x030 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4430; op2val:0x2c30;
   valaddr_reg:x8; val_offset:2682*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2682*FLEN/8, x10, x1, x4)

inst_1367:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x030 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x030 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4430; op2val:0x2c30;
   valaddr_reg:x8; val_offset:2684*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2684*FLEN/8, x10, x1, x4)

inst_1368:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x030 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x030 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4430; op2val:0x2c30;
   valaddr_reg:x8; val_offset:2686*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2686*FLEN/8, x10, x1, x4)

inst_1369:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x030 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x030 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4430; op2val:0x2c30;
   valaddr_reg:x8; val_offset:2688*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2688*FLEN/8, x10, x1, x4)

inst_1370:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x3da and fs2 == 0 and fe2 == 0x0c and fm2 == 0x3da and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4bda; op2val:0x33da;
   valaddr_reg:x8; val_offset:2690*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2690*FLEN/8, x10, x1, x4)

inst_1371:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x3da and fs2 == 0 and fe2 == 0x0c and fm2 == 0x3da and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4bda; op2val:0x33da;
   valaddr_reg:x8; val_offset:2692*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2692*FLEN/8, x10, x1, x4)

inst_1372:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x3da and fs2 == 0 and fe2 == 0x0c and fm2 == 0x3da and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4bda; op2val:0x33da;
   valaddr_reg:x8; val_offset:2694*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2694*FLEN/8, x10, x1, x4)

inst_1373:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x3da and fs2 == 0 and fe2 == 0x0c and fm2 == 0x3da and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4bda; op2val:0x33da;
   valaddr_reg:x8; val_offset:2696*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2696*FLEN/8, x10, x1, x4)

inst_1374:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x3da and fs2 == 0 and fe2 == 0x0c and fm2 == 0x3da and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4bda; op2val:0x33da;
   valaddr_reg:x8; val_offset:2698*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2698*FLEN/8, x10, x1, x4)

inst_1375:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x05e and fs2 == 0 and fe2 == 0x0e and fm2 == 0x05e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x505e; op2val:0x385e;
   valaddr_reg:x8; val_offset:2700*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2700*FLEN/8, x10, x1, x4)

inst_1376:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x05e and fs2 == 0 and fe2 == 0x0e and fm2 == 0x05e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x505e; op2val:0x385e;
   valaddr_reg:x8; val_offset:2702*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2702*FLEN/8, x10, x1, x4)

inst_1377:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x05e and fs2 == 0 and fe2 == 0x0e and fm2 == 0x05e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x505e; op2val:0x385e;
   valaddr_reg:x8; val_offset:2704*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2704*FLEN/8, x10, x1, x4)

inst_1378:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x05e and fs2 == 0 and fe2 == 0x0e and fm2 == 0x05e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x505e; op2val:0x385e;
   valaddr_reg:x8; val_offset:2706*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2706*FLEN/8, x10, x1, x4)

inst_1379:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x05e and fs2 == 0 and fe2 == 0x0e and fm2 == 0x05e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x505e; op2val:0x385e;
   valaddr_reg:x8; val_offset:2708*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2708*FLEN/8, x10, x1, x4)

inst_1380:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x157 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x156 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d57; op2val:0x3556;
   valaddr_reg:x8; val_offset:2710*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2710*FLEN/8, x10, x1, x4)

inst_1381:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x157 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x156 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d57; op2val:0x3556;
   valaddr_reg:x8; val_offset:2712*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2712*FLEN/8, x10, x1, x4)

inst_1382:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x157 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x156 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d57; op2val:0x3556;
   valaddr_reg:x8; val_offset:2714*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2714*FLEN/8, x10, x1, x4)

inst_1383:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x157 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x156 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d57; op2val:0x3556;
   valaddr_reg:x8; val_offset:2716*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2716*FLEN/8, x10, x1, x4)

inst_1384:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x157 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x156 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d57; op2val:0x3556;
   valaddr_reg:x8; val_offset:2718*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2718*FLEN/8, x10, x1, x4)

inst_1385:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x198 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x198 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5198; op2val:0x3998;
   valaddr_reg:x8; val_offset:2720*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2720*FLEN/8, x10, x1, x4)

inst_1386:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x198 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x198 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5198; op2val:0x3998;
   valaddr_reg:x8; val_offset:2722*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2722*FLEN/8, x10, x1, x4)

inst_1387:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x198 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x198 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5198; op2val:0x3998;
   valaddr_reg:x8; val_offset:2724*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2724*FLEN/8, x10, x1, x4)

inst_1388:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x198 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x198 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5198; op2val:0x3998;
   valaddr_reg:x8; val_offset:2726*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2726*FLEN/8, x10, x1, x4)

inst_1389:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x198 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x198 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5198; op2val:0x3998;
   valaddr_reg:x8; val_offset:2728*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2728*FLEN/8, x10, x1, x4)

inst_1390:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e2 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e2 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e2; op2val:0x3ae2;
   valaddr_reg:x8; val_offset:2730*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2730*FLEN/8, x10, x1, x4)

inst_1391:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e2 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e2 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e2; op2val:0x3ae2;
   valaddr_reg:x8; val_offset:2732*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2732*FLEN/8, x10, x1, x4)

inst_1392:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e2 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e2 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e2; op2val:0x3ae2;
   valaddr_reg:x8; val_offset:2734*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2734*FLEN/8, x10, x1, x4)

inst_1393:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e2 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e2 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e2; op2val:0x3ae2;
   valaddr_reg:x8; val_offset:2736*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2736*FLEN/8, x10, x1, x4)

inst_1394:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e2 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e2 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e2; op2val:0x3ae2;
   valaddr_reg:x8; val_offset:2738*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2738*FLEN/8, x10, x1, x4)

inst_1395:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x36c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x36c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x536c; op2val:0x3b6c;
   valaddr_reg:x8; val_offset:2740*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2740*FLEN/8, x10, x1, x4)

inst_1396:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x36c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x36c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x536c; op2val:0x3b6c;
   valaddr_reg:x8; val_offset:2742*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2742*FLEN/8, x10, x1, x4)

inst_1397:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x36c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x36c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x536c; op2val:0x3b6c;
   valaddr_reg:x8; val_offset:2744*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2744*FLEN/8, x10, x1, x4)

inst_1398:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x36c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x36c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x536c; op2val:0x3b6c;
   valaddr_reg:x8; val_offset:2746*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2746*FLEN/8, x10, x1, x4)

inst_1399:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x36c and fs2 == 0 and fe2 == 0x0e and fm2 == 0x36c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x536c; op2val:0x3b6c;
   valaddr_reg:x8; val_offset:2748*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2748*FLEN/8, x10, x1, x4)

inst_1400:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1f3 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1f3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51f3; op2val:0x39f3;
   valaddr_reg:x8; val_offset:2750*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2750*FLEN/8, x10, x1, x4)

inst_1401:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1f3 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1f3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51f3; op2val:0x39f3;
   valaddr_reg:x8; val_offset:2752*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2752*FLEN/8, x10, x1, x4)

inst_1402:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1f3 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1f3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51f3; op2val:0x39f3;
   valaddr_reg:x8; val_offset:2754*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2754*FLEN/8, x10, x1, x4)

inst_1403:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1f3 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1f3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51f3; op2val:0x39f3;
   valaddr_reg:x8; val_offset:2756*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2756*FLEN/8, x10, x1, x4)

inst_1404:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1f3 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1f3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51f3; op2val:0x39f3;
   valaddr_reg:x8; val_offset:2758*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2758*FLEN/8, x10, x1, x4)

inst_1405:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x27a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x27a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x527a; op2val:0x3a7a;
   valaddr_reg:x8; val_offset:2760*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2760*FLEN/8, x10, x1, x4)

inst_1406:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x27a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x27a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x527a; op2val:0x3a7a;
   valaddr_reg:x8; val_offset:2762*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2762*FLEN/8, x10, x1, x4)

inst_1407:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x27a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x27a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x527a; op2val:0x3a7a;
   valaddr_reg:x8; val_offset:2764*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2764*FLEN/8, x10, x1, x4)

inst_1408:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x27a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x27a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x527a; op2val:0x3a7a;
   valaddr_reg:x8; val_offset:2766*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2766*FLEN/8, x10, x1, x4)

inst_1409:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x27a and fs2 == 0 and fe2 == 0x0e and fm2 == 0x27a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x527a; op2val:0x3a7a;
   valaddr_reg:x8; val_offset:2768*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2768*FLEN/8, x10, x1, x4)

inst_1410:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e8 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e8; op2val:0x3ae8;
   valaddr_reg:x8; val_offset:2770*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2770*FLEN/8, x10, x1, x4)

inst_1411:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e8 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e8; op2val:0x3ae8;
   valaddr_reg:x8; val_offset:2772*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2772*FLEN/8, x10, x1, x4)

inst_1412:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e8 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e8; op2val:0x3ae8;
   valaddr_reg:x8; val_offset:2774*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2774*FLEN/8, x10, x1, x4)

inst_1413:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e8 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e8; op2val:0x3ae8;
   valaddr_reg:x8; val_offset:2776*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2776*FLEN/8, x10, x1, x4)

inst_1414:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e8 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x2e8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x52e8; op2val:0x3ae8;
   valaddr_reg:x8; val_offset:2778*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2778*FLEN/8, x10, x1, x4)

inst_1415:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x215 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x215 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5215; op2val:0x3a15;
   valaddr_reg:x8; val_offset:2780*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2780*FLEN/8, x10, x1, x4)

inst_1416:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x215 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x215 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5215; op2val:0x3a15;
   valaddr_reg:x8; val_offset:2782*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2782*FLEN/8, x10, x1, x4)

inst_1417:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x215 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x215 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5215; op2val:0x3a15;
   valaddr_reg:x8; val_offset:2784*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2784*FLEN/8, x10, x1, x4)

inst_1418:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x215 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x215 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5215; op2val:0x3a15;
   valaddr_reg:x8; val_offset:2786*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2786*FLEN/8, x10, x1, x4)

inst_1419:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x215 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x215 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5215; op2val:0x3a15;
   valaddr_reg:x8; val_offset:2788*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2788*FLEN/8, x10, x1, x4)

inst_1420:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x3e0 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x3df and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x47e0; op2val:0x2fdf;
   valaddr_reg:x8; val_offset:2790*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2790*FLEN/8, x10, x1, x4)

inst_1421:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x3e0 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x3df and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x47e0; op2val:0x2fdf;
   valaddr_reg:x8; val_offset:2792*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2792*FLEN/8, x10, x1, x4)

inst_1422:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x3e0 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x3df and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x47e0; op2val:0x2fdf;
   valaddr_reg:x8; val_offset:2794*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2794*FLEN/8, x10, x1, x4)

inst_1423:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x3e0 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x3df and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x47e0; op2val:0x2fdf;
   valaddr_reg:x8; val_offset:2796*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2796*FLEN/8, x10, x1, x4)

inst_1424:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x3e0 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x3df and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x47e0; op2val:0x2fdf;
   valaddr_reg:x8; val_offset:2798*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2798*FLEN/8, x10, x1, x4)

inst_1425:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x1e9 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x1e9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x45e9; op2val:0x2de9;
   valaddr_reg:x8; val_offset:2800*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2800*FLEN/8, x10, x1, x4)

inst_1426:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x1e9 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x1e9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x45e9; op2val:0x2de9;
   valaddr_reg:x8; val_offset:2802*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2802*FLEN/8, x10, x1, x4)

inst_1427:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x1e9 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x1e9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x45e9; op2val:0x2de9;
   valaddr_reg:x8; val_offset:2804*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2804*FLEN/8, x10, x1, x4)

inst_1428:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x1e9 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x1e9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x45e9; op2val:0x2de9;
   valaddr_reg:x8; val_offset:2806*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2806*FLEN/8, x10, x1, x4)

inst_1429:
// fs1 == 0 and fe1 == 0x11 and fm1 == 0x1e9 and fs2 == 0 and fe2 == 0x0b and fm2 == 0x1e9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x45e9; op2val:0x2de9;
   valaddr_reg:x8; val_offset:2808*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2808*FLEN/8, x10, x1, x4)

inst_1430:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x191 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x190 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4991; op2val:0x3190;
   valaddr_reg:x8; val_offset:2810*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2810*FLEN/8, x10, x1, x4)

inst_1431:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x191 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x190 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4991; op2val:0x3190;
   valaddr_reg:x8; val_offset:2812*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2812*FLEN/8, x10, x1, x4)

inst_1432:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x191 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x190 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4991; op2val:0x3190;
   valaddr_reg:x8; val_offset:2814*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2814*FLEN/8, x10, x1, x4)

inst_1433:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x191 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x190 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4991; op2val:0x3190;
   valaddr_reg:x8; val_offset:2816*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2816*FLEN/8, x10, x1, x4)

inst_1434:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x191 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x190 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4991; op2val:0x3190;
   valaddr_reg:x8; val_offset:2818*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2818*FLEN/8, x10, x1, x4)

inst_1435:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1a1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51a1; op2val:0x39a1;
   valaddr_reg:x8; val_offset:2820*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2820*FLEN/8, x10, x1, x4)

inst_1436:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1a1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51a1; op2val:0x39a1;
   valaddr_reg:x8; val_offset:2822*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2822*FLEN/8, x10, x1, x4)

inst_1437:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1a1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51a1; op2val:0x39a1;
   valaddr_reg:x8; val_offset:2824*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2824*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_11)

inst_1438:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1a1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51a1; op2val:0x39a1;
   valaddr_reg:x8; val_offset:2826*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2826*FLEN/8, x10, x1, x4)

inst_1439:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1a1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51a1; op2val:0x39a1;
   valaddr_reg:x8; val_offset:2828*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2828*FLEN/8, x10, x1, x4)

inst_1440:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x2e5 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4ee6; op2val:0x36e5;
   valaddr_reg:x8; val_offset:2830*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2830*FLEN/8, x10, x1, x4)

inst_1441:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x2e5 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4ee6; op2val:0x36e5;
   valaddr_reg:x8; val_offset:2832*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2832*FLEN/8, x10, x1, x4)

inst_1442:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x2e5 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4ee6; op2val:0x36e5;
   valaddr_reg:x8; val_offset:2834*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2834*FLEN/8, x10, x1, x4)

inst_1443:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x2e5 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4ee6; op2val:0x36e5;
   valaddr_reg:x8; val_offset:2836*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2836*FLEN/8, x10, x1, x4)

inst_1444:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2e6 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x2e5 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4ee6; op2val:0x36e5;
   valaddr_reg:x8; val_offset:2838*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2838*FLEN/8, x10, x1, x4)

inst_1445:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x10c and fs2 == 0 and fe2 == 0x0d and fm2 == 0x10c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d0c; op2val:0x350c;
   valaddr_reg:x8; val_offset:2840*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2840*FLEN/8, x10, x1, x4)

inst_1446:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x10c and fs2 == 0 and fe2 == 0x0d and fm2 == 0x10c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d0c; op2val:0x350c;
   valaddr_reg:x8; val_offset:2842*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2842*FLEN/8, x10, x1, x4)

inst_1447:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x10c and fs2 == 0 and fe2 == 0x0d and fm2 == 0x10c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d0c; op2val:0x350c;
   valaddr_reg:x8; val_offset:2844*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2844*FLEN/8, x10, x1, x4)

inst_1448:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x10c and fs2 == 0 and fe2 == 0x0d and fm2 == 0x10c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d0c; op2val:0x350c;
   valaddr_reg:x8; val_offset:2846*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2846*FLEN/8, x10, x1, x4)

inst_1449:
// fs1 == 0 and fe1 == 0x13 and fm1 == 0x10c and fs2 == 0 and fe2 == 0x0d and fm2 == 0x10c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4d0c; op2val:0x350c;
   valaddr_reg:x8; val_offset:2848*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2848*FLEN/8, x10, x1, x4)

inst_1450:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x216 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x216 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5216; op2val:0x3a16;
   valaddr_reg:x8; val_offset:2850*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2850*FLEN/8, x10, x1, x4)

inst_1451:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x216 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x216 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5216; op2val:0x3a16;
   valaddr_reg:x8; val_offset:2852*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2852*FLEN/8, x10, x1, x4)

inst_1452:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x216 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x216 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5216; op2val:0x3a16;
   valaddr_reg:x8; val_offset:2854*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2854*FLEN/8, x10, x1, x4)

inst_1453:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x216 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x216 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5216; op2val:0x3a16;
   valaddr_reg:x8; val_offset:2856*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2856*FLEN/8, x10, x1, x4)

inst_1454:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x216 and fs2 == 0 and fe2 == 0x0e and fm2 == 0x216 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x5216; op2val:0x3a16;
   valaddr_reg:x8; val_offset:2858*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2858*FLEN/8, x10, x1, x4)

inst_1455:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x230 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x230 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a30; op2val:0x3230;
   valaddr_reg:x8; val_offset:2860*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2860*FLEN/8, x10, x1, x4)

inst_1456:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x230 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x230 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a30; op2val:0x3230;
   valaddr_reg:x8; val_offset:2862*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2862*FLEN/8, x10, x1, x4)

inst_1457:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x230 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x230 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a30; op2val:0x3230;
   valaddr_reg:x8; val_offset:2864*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2864*FLEN/8, x10, x1, x4)

inst_1458:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x230 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x230 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a30; op2val:0x3230;
   valaddr_reg:x8; val_offset:2866*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2866*FLEN/8, x10, x1, x4)

inst_1459:
// fs1 == 0 and fe1 == 0x12 and fm1 == 0x230 and fs2 == 0 and fe2 == 0x0c and fm2 == 0x230 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x4a30; op2val:0x3230;
   valaddr_reg:x8; val_offset:2868*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2868*FLEN/8, x10, x1, x4)

inst_1460:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1cb and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51cb; op2val:0x39ca;
   valaddr_reg:x8; val_offset:2870*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2870*FLEN/8, x10, x1, x4)

inst_1461:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1cb and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51cb; op2val:0x39ca;
   valaddr_reg:x8; val_offset:2872*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2872*FLEN/8, x10, x1, x4)

inst_1462:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1cb and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51cb; op2val:0x39ca;
   valaddr_reg:x8; val_offset:2874*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2874*FLEN/8, x10, x1, x4)

inst_1463:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1cb and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51cb; op2val:0x39ca;
   valaddr_reg:x8; val_offset:2876*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2876*FLEN/8, x10, x1, x4)

inst_1464:
// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1cb and fs2 == 0 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x51cb; op2val:0x39ca;
   valaddr_reg:x8; val_offset:2878*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2878*FLEN/8, x10, x1, x4)

inst_1465:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x11f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x11f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x391f; op2val:0x4d1f;
   valaddr_reg:x8; val_offset:2880*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2880*FLEN/8, x10, x1, x4)

inst_1466:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x11f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x11f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x391f; op2val:0x4d1f;
   valaddr_reg:x8; val_offset:2882*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2882*FLEN/8, x10, x1, x4)

inst_1467:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x11f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x11f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x391f; op2val:0x4d1f;
   valaddr_reg:x8; val_offset:2884*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2884*FLEN/8, x10, x1, x4)

inst_1468:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x11f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x11f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x391f; op2val:0x4d1f;
   valaddr_reg:x8; val_offset:2886*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2886*FLEN/8, x10, x1, x4)

inst_1469:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x11f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x11f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x391f; op2val:0x4d1f;
   valaddr_reg:x8; val_offset:2888*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2888*FLEN/8, x10, x1, x4)

inst_1470:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2c1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36c1; op2val:0x4ac1;
   valaddr_reg:x8; val_offset:2890*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2890*FLEN/8, x10, x1, x4)

inst_1471:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2c1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36c1; op2val:0x4ac1;
   valaddr_reg:x8; val_offset:2892*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2892*FLEN/8, x10, x1, x4)

inst_1472:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2c1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36c1; op2val:0x4ac1;
   valaddr_reg:x8; val_offset:2894*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2894*FLEN/8, x10, x1, x4)

inst_1473:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2c1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36c1; op2val:0x4ac1;
   valaddr_reg:x8; val_offset:2896*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2896*FLEN/8, x10, x1, x4)

inst_1474:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2c1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36c1; op2val:0x4ac1;
   valaddr_reg:x8; val_offset:2898*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2898*FLEN/8, x10, x1, x4)

inst_1475:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fa and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3fa and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bfa; op2val:0x4ffa;
   valaddr_reg:x8; val_offset:2900*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2900*FLEN/8, x10, x1, x4)

inst_1476:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fa and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3fa and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bfa; op2val:0x4ffa;
   valaddr_reg:x8; val_offset:2902*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2902*FLEN/8, x10, x1, x4)

inst_1477:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fa and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3fa and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bfa; op2val:0x4ffa;
   valaddr_reg:x8; val_offset:2904*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2904*FLEN/8, x10, x1, x4)

inst_1478:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fa and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3fa and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bfa; op2val:0x4ffa;
   valaddr_reg:x8; val_offset:2906*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2906*FLEN/8, x10, x1, x4)

inst_1479:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fa and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3fa and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bfa; op2val:0x4ffa;
   valaddr_reg:x8; val_offset:2908*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2908*FLEN/8, x10, x1, x4)

inst_1480:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3b8 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x3b8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33b8; op2val:0x47b8;
   valaddr_reg:x8; val_offset:2910*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2910*FLEN/8, x10, x1, x4)

inst_1481:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3b8 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x3b8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33b8; op2val:0x47b8;
   valaddr_reg:x8; val_offset:2912*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2912*FLEN/8, x10, x1, x4)

inst_1482:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3b8 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x3b8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33b8; op2val:0x47b8;
   valaddr_reg:x8; val_offset:2914*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2914*FLEN/8, x10, x1, x4)

inst_1483:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3b8 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x3b8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33b8; op2val:0x47b8;
   valaddr_reg:x8; val_offset:2916*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2916*FLEN/8, x10, x1, x4)

inst_1484:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3b8 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x3b8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x33b8; op2val:0x47b8;
   valaddr_reg:x8; val_offset:2918*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2918*FLEN/8, x10, x1, x4)

inst_1485:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x06f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x386f; op2val:0x4c6f;
   valaddr_reg:x8; val_offset:2920*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2920*FLEN/8, x10, x1, x4)

inst_1486:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x06f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x386f; op2val:0x4c6f;
   valaddr_reg:x8; val_offset:2922*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2922*FLEN/8, x10, x1, x4)

inst_1487:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x06f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x386f; op2val:0x4c6f;
   valaddr_reg:x8; val_offset:2924*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2924*FLEN/8, x10, x1, x4)

inst_1488:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x06f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x386f; op2val:0x4c6f;
   valaddr_reg:x8; val_offset:2926*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2926*FLEN/8, x10, x1, x4)

inst_1489:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 0 and fe2 == 0x13 and fm2 == 0x06f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x386f; op2val:0x4c6f;
   valaddr_reg:x8; val_offset:2928*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2928*FLEN/8, x10, x1, x4)

inst_1490:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x260 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x260 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a60; op2val:0x4e60;
   valaddr_reg:x8; val_offset:2930*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2930*FLEN/8, x10, x1, x4)

inst_1491:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x260 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x260 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a60; op2val:0x4e60;
   valaddr_reg:x8; val_offset:2932*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2932*FLEN/8, x10, x1, x4)

inst_1492:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x260 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x260 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a60; op2val:0x4e60;
   valaddr_reg:x8; val_offset:2934*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2934*FLEN/8, x10, x1, x4)

inst_1493:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x260 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x260 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a60; op2val:0x4e60;
   valaddr_reg:x8; val_offset:2936*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2936*FLEN/8, x10, x1, x4)

inst_1494:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x260 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x260 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a60; op2val:0x4e60;
   valaddr_reg:x8; val_offset:2938*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2938*FLEN/8, x10, x1, x4)

inst_1495:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0de and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0de and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38de; op2val:0x4cde;
   valaddr_reg:x8; val_offset:2940*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2940*FLEN/8, x10, x1, x4)

inst_1496:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0de and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0de and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38de; op2val:0x4cde;
   valaddr_reg:x8; val_offset:2942*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2942*FLEN/8, x10, x1, x4)

inst_1497:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0de and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0de and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38de; op2val:0x4cde;
   valaddr_reg:x8; val_offset:2944*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2944*FLEN/8, x10, x1, x4)

inst_1498:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0de and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0de and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38de; op2val:0x4cde;
   valaddr_reg:x8; val_offset:2946*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2946*FLEN/8, x10, x1, x4)

inst_1499:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0de and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0de and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38de; op2val:0x4cde;
   valaddr_reg:x8; val_offset:2948*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2948*FLEN/8, x10, x1, x4)

inst_1500:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc9; op2val:0x4fc9;
   valaddr_reg:x8; val_offset:2950*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2950*FLEN/8, x10, x1, x4)

inst_1501:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc9; op2val:0x4fc9;
   valaddr_reg:x8; val_offset:2952*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2952*FLEN/8, x10, x1, x4)

inst_1502:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc9; op2val:0x4fc9;
   valaddr_reg:x8; val_offset:2954*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2954*FLEN/8, x10, x1, x4)

inst_1503:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc9; op2val:0x4fc9;
   valaddr_reg:x8; val_offset:2956*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2956*FLEN/8, x10, x1, x4)

inst_1504:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc9; op2val:0x4fc9;
   valaddr_reg:x8; val_offset:2958*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2958*FLEN/8, x10, x1, x4)

inst_1505:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b2 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2b1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ab2; op2val:0x4eb1;
   valaddr_reg:x8; val_offset:2960*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2960*FLEN/8, x10, x1, x4)

inst_1506:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b2 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2b1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ab2; op2val:0x4eb1;
   valaddr_reg:x8; val_offset:2962*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2962*FLEN/8, x10, x1, x4)

inst_1507:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b2 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2b1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ab2; op2val:0x4eb1;
   valaddr_reg:x8; val_offset:2964*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2964*FLEN/8, x10, x1, x4)

inst_1508:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b2 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2b1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ab2; op2val:0x4eb1;
   valaddr_reg:x8; val_offset:2966*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2966*FLEN/8, x10, x1, x4)

inst_1509:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b2 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2b1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3ab2; op2val:0x4eb1;
   valaddr_reg:x8; val_offset:2968*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2968*FLEN/8, x10, x1, x4)

inst_1510:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x389 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b89; op2val:0x4f89;
   valaddr_reg:x8; val_offset:2970*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2970*FLEN/8, x10, x1, x4)

inst_1511:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x389 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b89; op2val:0x4f89;
   valaddr_reg:x8; val_offset:2972*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2972*FLEN/8, x10, x1, x4)

inst_1512:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x389 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b89; op2val:0x4f89;
   valaddr_reg:x8; val_offset:2974*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2974*FLEN/8, x10, x1, x4)

inst_1513:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x389 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b89; op2val:0x4f89;
   valaddr_reg:x8; val_offset:2976*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2976*FLEN/8, x10, x1, x4)

inst_1514:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x389 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b89; op2val:0x4f89;
   valaddr_reg:x8; val_offset:2978*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2978*FLEN/8, x10, x1, x4)

inst_1515:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x087 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x086 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3887; op2val:0x4c86;
   valaddr_reg:x8; val_offset:2980*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2980*FLEN/8, x10, x1, x4)

inst_1516:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x087 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x086 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3887; op2val:0x4c86;
   valaddr_reg:x8; val_offset:2982*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2982*FLEN/8, x10, x1, x4)

inst_1517:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x087 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x086 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3887; op2val:0x4c86;
   valaddr_reg:x8; val_offset:2984*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2984*FLEN/8, x10, x1, x4)

inst_1518:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x087 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x086 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3887; op2val:0x4c86;
   valaddr_reg:x8; val_offset:2986*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2986*FLEN/8, x10, x1, x4)

inst_1519:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x087 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x086 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3887; op2val:0x4c86;
   valaddr_reg:x8; val_offset:2988*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2988*FLEN/8, x10, x1, x4)

inst_1520:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x118 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x118 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3518; op2val:0x4918;
   valaddr_reg:x8; val_offset:2990*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 2990*FLEN/8, x10, x1, x4)

inst_1521:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x118 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x118 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3518; op2val:0x4918;
   valaddr_reg:x8; val_offset:2992*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 2992*FLEN/8, x10, x1, x4)

inst_1522:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x118 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x118 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3518; op2val:0x4918;
   valaddr_reg:x8; val_offset:2994*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 2994*FLEN/8, x10, x1, x4)

inst_1523:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x118 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x118 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3518; op2val:0x4918;
   valaddr_reg:x8; val_offset:2996*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 2996*FLEN/8, x10, x1, x4)

inst_1524:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x118 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x118 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3518; op2val:0x4918;
   valaddr_reg:x8; val_offset:2998*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 2998*FLEN/8, x10, x1, x4)

inst_1525:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0df and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0df and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38df; op2val:0x4cdf;
   valaddr_reg:x8; val_offset:3000*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3000*FLEN/8, x10, x1, x4)

inst_1526:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0df and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0df and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38df; op2val:0x4cdf;
   valaddr_reg:x8; val_offset:3002*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3002*FLEN/8, x10, x1, x4)

inst_1527:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0df and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0df and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38df; op2val:0x4cdf;
   valaddr_reg:x8; val_offset:3004*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3004*FLEN/8, x10, x1, x4)

inst_1528:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0df and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0df and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38df; op2val:0x4cdf;
   valaddr_reg:x8; val_offset:3006*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3006*FLEN/8, x10, x1, x4)

inst_1529:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0df and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0df and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x38df; op2val:0x4cdf;
   valaddr_reg:x8; val_offset:3008*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3008*FLEN/8, x10, x1, x4)

inst_1530:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cb and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3ca and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcb; op2val:0x4fca;
   valaddr_reg:x8; val_offset:3010*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3010*FLEN/8, x10, x1, x4)

inst_1531:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cb and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3ca and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcb; op2val:0x4fca;
   valaddr_reg:x8; val_offset:3012*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3012*FLEN/8, x10, x1, x4)

inst_1532:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cb and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3ca and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcb; op2val:0x4fca;
   valaddr_reg:x8; val_offset:3014*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3014*FLEN/8, x10, x1, x4)

inst_1533:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cb and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3ca and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcb; op2val:0x4fca;
   valaddr_reg:x8; val_offset:3016*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3016*FLEN/8, x10, x1, x4)

inst_1534:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3cb and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3ca and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bcb; op2val:0x4fca;
   valaddr_reg:x8; val_offset:3018*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3018*FLEN/8, x10, x1, x4)

inst_1535:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x24d and fs2 == 0 and fe2 == 0x13 and fm2 == 0x24d and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a4d; op2val:0x4e4d;
   valaddr_reg:x8; val_offset:3020*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3020*FLEN/8, x10, x1, x4)

inst_1536:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x24d and fs2 == 0 and fe2 == 0x13 and fm2 == 0x24d and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a4d; op2val:0x4e4d;
   valaddr_reg:x8; val_offset:3022*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3022*FLEN/8, x10, x1, x4)

inst_1537:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x24d and fs2 == 0 and fe2 == 0x13 and fm2 == 0x24d and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a4d; op2val:0x4e4d;
   valaddr_reg:x8; val_offset:3024*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3024*FLEN/8, x10, x1, x4)

inst_1538:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x24d and fs2 == 0 and fe2 == 0x13 and fm2 == 0x24d and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a4d; op2val:0x4e4d;
   valaddr_reg:x8; val_offset:3026*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3026*FLEN/8, x10, x1, x4)

inst_1539:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x24d and fs2 == 0 and fe2 == 0x13 and fm2 == 0x24d and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a4d; op2val:0x4e4d;
   valaddr_reg:x8; val_offset:3028*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3028*FLEN/8, x10, x1, x4)

inst_1540:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x052 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x052 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3852; op2val:0x4c52;
   valaddr_reg:x8; val_offset:3030*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3030*FLEN/8, x10, x1, x4)

inst_1541:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x052 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x052 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3852; op2val:0x4c52;
   valaddr_reg:x8; val_offset:3032*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3032*FLEN/8, x10, x1, x4)

inst_1542:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x052 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x052 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3852; op2val:0x4c52;
   valaddr_reg:x8; val_offset:3034*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3034*FLEN/8, x10, x1, x4)

inst_1543:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x052 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x052 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3852; op2val:0x4c52;
   valaddr_reg:x8; val_offset:3036*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3036*FLEN/8, x10, x1, x4)

inst_1544:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x052 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x052 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3852; op2val:0x4c52;
   valaddr_reg:x8; val_offset:3038*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3038*FLEN/8, x10, x1, x4)

inst_1545:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25a and fs2 == 0 and fe2 == 0x12 and fm2 == 0x25a and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x365a; op2val:0x4a5a;
   valaddr_reg:x8; val_offset:3040*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3040*FLEN/8, x10, x1, x4)

inst_1546:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25a and fs2 == 0 and fe2 == 0x12 and fm2 == 0x25a and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x365a; op2val:0x4a5a;
   valaddr_reg:x8; val_offset:3042*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3042*FLEN/8, x10, x1, x4)

inst_1547:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25a and fs2 == 0 and fe2 == 0x12 and fm2 == 0x25a and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x365a; op2val:0x4a5a;
   valaddr_reg:x8; val_offset:3044*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3044*FLEN/8, x10, x1, x4)

inst_1548:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25a and fs2 == 0 and fe2 == 0x12 and fm2 == 0x25a and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x365a; op2val:0x4a5a;
   valaddr_reg:x8; val_offset:3046*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3046*FLEN/8, x10, x1, x4)

inst_1549:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25a and fs2 == 0 and fe2 == 0x12 and fm2 == 0x25a and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x365a; op2val:0x4a5a;
   valaddr_reg:x8; val_offset:3048*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3048*FLEN/8, x10, x1, x4)

inst_1550:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30a and fs2 == 0 and fe2 == 0x13 and fm2 == 0x309 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b0a; op2val:0x4f09;
   valaddr_reg:x8; val_offset:3050*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3050*FLEN/8, x10, x1, x4)

inst_1551:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30a and fs2 == 0 and fe2 == 0x13 and fm2 == 0x309 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b0a; op2val:0x4f09;
   valaddr_reg:x8; val_offset:3052*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3052*FLEN/8, x10, x1, x4)

inst_1552:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30a and fs2 == 0 and fe2 == 0x13 and fm2 == 0x309 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b0a; op2val:0x4f09;
   valaddr_reg:x8; val_offset:3054*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3054*FLEN/8, x10, x1, x4)

inst_1553:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30a and fs2 == 0 and fe2 == 0x13 and fm2 == 0x309 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b0a; op2val:0x4f09;
   valaddr_reg:x8; val_offset:3056*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3056*FLEN/8, x10, x1, x4)

inst_1554:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30a and fs2 == 0 and fe2 == 0x13 and fm2 == 0x309 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b0a; op2val:0x4f09;
   valaddr_reg:x8; val_offset:3058*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3058*FLEN/8, x10, x1, x4)

inst_1555:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b8 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x0b8 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b8; op2val:0x48b8;
   valaddr_reg:x8; val_offset:3060*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3060*FLEN/8, x10, x1, x4)

inst_1556:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b8 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x0b8 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b8; op2val:0x48b8;
   valaddr_reg:x8; val_offset:3062*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3062*FLEN/8, x10, x1, x4)

inst_1557:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b8 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x0b8 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b8; op2val:0x48b8;
   valaddr_reg:x8; val_offset:3064*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3064*FLEN/8, x10, x1, x4)

inst_1558:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b8 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x0b8 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b8; op2val:0x48b8;
   valaddr_reg:x8; val_offset:3066*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3066*FLEN/8, x10, x1, x4)

inst_1559:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b8 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x0b8 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x34b8; op2val:0x48b8;
   valaddr_reg:x8; val_offset:3068*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3068*FLEN/8, x10, x1, x4)

inst_1560:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x393 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x393 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3393; op2val:0x4793;
   valaddr_reg:x8; val_offset:3070*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3070*FLEN/8, x10, x1, x4)

inst_1561:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x393 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x393 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3393; op2val:0x4793;
   valaddr_reg:x8; val_offset:3072*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3072*FLEN/8, x10, x1, x4)

inst_1562:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x393 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x393 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3393; op2val:0x4793;
   valaddr_reg:x8; val_offset:3074*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3074*FLEN/8, x10, x1, x4)

inst_1563:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x393 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x393 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3393; op2val:0x4793;
   valaddr_reg:x8; val_offset:3076*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3076*FLEN/8, x10, x1, x4)

inst_1564:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x393 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x393 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3393; op2val:0x4793;
   valaddr_reg:x8; val_offset:3078*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3078*FLEN/8, x10, x1, x4)

inst_1565:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x228 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x228 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e28; op2val:0x4228;
   valaddr_reg:x8; val_offset:3080*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3080*FLEN/8, x10, x1, x4)
RVTEST_SIGBASE(x1,signature_x1_12)

inst_1566:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x228 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x228 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e28; op2val:0x4228;
   valaddr_reg:x8; val_offset:3082*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3082*FLEN/8, x10, x1, x4)

inst_1567:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x228 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x228 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e28; op2val:0x4228;
   valaddr_reg:x8; val_offset:3084*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3084*FLEN/8, x10, x1, x4)

inst_1568:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x228 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x228 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e28; op2val:0x4228;
   valaddr_reg:x8; val_offset:3086*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3086*FLEN/8, x10, x1, x4)

inst_1569:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x228 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x228 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e28; op2val:0x4228;
   valaddr_reg:x8; val_offset:3088*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3088*FLEN/8, x10, x1, x4)

inst_1570:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x20f and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x4e0f;
   valaddr_reg:x8; val_offset:3090*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3090*FLEN/8, x10, x1, x4)

inst_1571:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x20f and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x4e0f;
   valaddr_reg:x8; val_offset:3092*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3092*FLEN/8, x10, x1, x4)

inst_1572:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x20f and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x4e0f;
   valaddr_reg:x8; val_offset:3094*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3094*FLEN/8, x10, x1, x4)

inst_1573:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x20f and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x4e0f;
   valaddr_reg:x8; val_offset:3096*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3096*FLEN/8, x10, x1, x4)

inst_1574:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x210 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x20f and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a10; op2val:0x4e0f;
   valaddr_reg:x8; val_offset:3098*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3098*FLEN/8, x10, x1, x4)

inst_1575:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2be and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2be and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32be; op2val:0x46be;
   valaddr_reg:x8; val_offset:3100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3100*FLEN/8, x10, x1, x4)

inst_1576:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2be and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2be and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32be; op2val:0x46be;
   valaddr_reg:x8; val_offset:3102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3102*FLEN/8, x10, x1, x4)

inst_1577:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2be and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2be and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32be; op2val:0x46be;
   valaddr_reg:x8; val_offset:3104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3104*FLEN/8, x10, x1, x4)

inst_1578:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2be and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2be and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32be; op2val:0x46be;
   valaddr_reg:x8; val_offset:3106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3106*FLEN/8, x10, x1, x4)

inst_1579:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2be and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2be and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x32be; op2val:0x46be;
   valaddr_reg:x8; val_offset:3108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3108*FLEN/8, x10, x1, x4)

inst_1580:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x154 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x153 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3954; op2val:0x4d53;
   valaddr_reg:x8; val_offset:3110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3110*FLEN/8, x10, x1, x4)

inst_1581:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x154 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x153 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3954; op2val:0x4d53;
   valaddr_reg:x8; val_offset:3112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3112*FLEN/8, x10, x1, x4)

inst_1582:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x154 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x153 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3954; op2val:0x4d53;
   valaddr_reg:x8; val_offset:3114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3114*FLEN/8, x10, x1, x4)

inst_1583:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x154 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x153 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3954; op2val:0x4d53;
   valaddr_reg:x8; val_offset:3116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3116*FLEN/8, x10, x1, x4)

inst_1584:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x154 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x153 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3954; op2val:0x4d53;
   valaddr_reg:x8; val_offset:3118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3118*FLEN/8, x10, x1, x4)

inst_1585:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x16c and fs2 == 0 and fe2 == 0x12 and fm2 == 0x16c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x356c; op2val:0x496c;
   valaddr_reg:x8; val_offset:3120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3120*FLEN/8, x10, x1, x4)

inst_1586:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x16c and fs2 == 0 and fe2 == 0x12 and fm2 == 0x16c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x356c; op2val:0x496c;
   valaddr_reg:x8; val_offset:3122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3122*FLEN/8, x10, x1, x4)

inst_1587:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x16c and fs2 == 0 and fe2 == 0x12 and fm2 == 0x16c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x356c; op2val:0x496c;
   valaddr_reg:x8; val_offset:3124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3124*FLEN/8, x10, x1, x4)

inst_1588:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x16c and fs2 == 0 and fe2 == 0x12 and fm2 == 0x16c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x356c; op2val:0x496c;
   valaddr_reg:x8; val_offset:3126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3126*FLEN/8, x10, x1, x4)

inst_1589:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x16c and fs2 == 0 and fe2 == 0x12 and fm2 == 0x16c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x356c; op2val:0x496c;
   valaddr_reg:x8; val_offset:3128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3128*FLEN/8, x10, x1, x4)

inst_1590:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2d1 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36d1; op2val:0x4ad1;
   valaddr_reg:x8; val_offset:3130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3130*FLEN/8, x10, x1, x4)

inst_1591:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2d1 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36d1; op2val:0x4ad1;
   valaddr_reg:x8; val_offset:3132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3132*FLEN/8, x10, x1, x4)

inst_1592:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2d1 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36d1; op2val:0x4ad1;
   valaddr_reg:x8; val_offset:3134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3134*FLEN/8, x10, x1, x4)

inst_1593:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2d1 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36d1; op2val:0x4ad1;
   valaddr_reg:x8; val_offset:3136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3136*FLEN/8, x10, x1, x4)

inst_1594:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x2d1 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x36d1; op2val:0x4ad1;
   valaddr_reg:x8; val_offset:3138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3138*FLEN/8, x10, x1, x4)

inst_1595:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc3; op2val:0x4fc3;
   valaddr_reg:x8; val_offset:3140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3140*FLEN/8, x10, x1, x4)

inst_1596:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc3; op2val:0x4fc3;
   valaddr_reg:x8; val_offset:3142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3142*FLEN/8, x10, x1, x4)

inst_1597:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc3; op2val:0x4fc3;
   valaddr_reg:x8; val_offset:3144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3144*FLEN/8, x10, x1, x4)

inst_1598:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc3; op2val:0x4fc3;
   valaddr_reg:x8; val_offset:3146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3146*FLEN/8, x10, x1, x4)

inst_1599:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x3c3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3bc3; op2val:0x4fc3;
   valaddr_reg:x8; val_offset:3148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3148*FLEN/8, x10, x1, x4)

inst_1600:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ae and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2ad and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aae; op2val:0x4ead;
   valaddr_reg:x8; val_offset:3150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3150*FLEN/8, x10, x1, x4)

inst_1601:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ae and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2ad and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aae; op2val:0x4ead;
   valaddr_reg:x8; val_offset:3152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3152*FLEN/8, x10, x1, x4)

inst_1602:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ae and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2ad and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aae; op2val:0x4ead;
   valaddr_reg:x8; val_offset:3154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3154*FLEN/8, x10, x1, x4)

inst_1603:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ae and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2ad and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aae; op2val:0x4ead;
   valaddr_reg:x8; val_offset:3156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3156*FLEN/8, x10, x1, x4)

inst_1604:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ae and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2ad and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3aae; op2val:0x4ead;
   valaddr_reg:x8; val_offset:3158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3158*FLEN/8, x10, x1, x4)

inst_1605:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x394 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x394 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b94; op2val:0x4f94;
   valaddr_reg:x8; val_offset:3160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3160*FLEN/8, x10, x1, x4)

inst_1606:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x394 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x394 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b94; op2val:0x4f94;
   valaddr_reg:x8; val_offset:3162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3162*FLEN/8, x10, x1, x4)

inst_1607:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x394 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x394 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b94; op2val:0x4f94;
   valaddr_reg:x8; val_offset:3164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3164*FLEN/8, x10, x1, x4)

inst_1608:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x394 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x394 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b94; op2val:0x4f94;
   valaddr_reg:x8; val_offset:3166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3166*FLEN/8, x10, x1, x4)

inst_1609:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x394 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x394 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b94; op2val:0x4f94;
   valaddr_reg:x8; val_offset:3168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3168*FLEN/8, x10, x1, x4)

inst_1610:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x017 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x017 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3017; op2val:0x4417;
   valaddr_reg:x8; val_offset:3170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3170*FLEN/8, x10, x1, x4)

inst_1611:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x017 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x017 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3017; op2val:0x4417;
   valaddr_reg:x8; val_offset:3172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3172*FLEN/8, x10, x1, x4)

inst_1612:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x017 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x017 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3017; op2val:0x4417;
   valaddr_reg:x8; val_offset:3174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3174*FLEN/8, x10, x1, x4)

inst_1613:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x017 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x017 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3017; op2val:0x4417;
   valaddr_reg:x8; val_offset:3176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3176*FLEN/8, x10, x1, x4)

inst_1614:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x017 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x017 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3017; op2val:0x4417;
   valaddr_reg:x8; val_offset:3178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3178*FLEN/8, x10, x1, x4)

inst_1615:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x33e and fs2 == 0 and fe2 == 0x0f and fm2 == 0x33e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b3e; op2val:0x3f3e;
   valaddr_reg:x8; val_offset:3180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3180*FLEN/8, x10, x1, x4)

inst_1616:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x33e and fs2 == 0 and fe2 == 0x0f and fm2 == 0x33e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b3e; op2val:0x3f3e;
   valaddr_reg:x8; val_offset:3182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3182*FLEN/8, x10, x1, x4)

inst_1617:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x33e and fs2 == 0 and fe2 == 0x0f and fm2 == 0x33e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b3e; op2val:0x3f3e;
   valaddr_reg:x8; val_offset:3184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3184*FLEN/8, x10, x1, x4)

inst_1618:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x33e and fs2 == 0 and fe2 == 0x0f and fm2 == 0x33e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b3e; op2val:0x3f3e;
   valaddr_reg:x8; val_offset:3186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3186*FLEN/8, x10, x1, x4)

inst_1619:
// fs1 == 0 and fe1 == 0x0a and fm1 == 0x33e and fs2 == 0 and fe2 == 0x0f and fm2 == 0x33e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2b3e; op2val:0x3f3e;
   valaddr_reg:x8; val_offset:3188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3188*FLEN/8, x10, x1, x4)

inst_1620:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x316 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x316 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3316; op2val:0x4716;
   valaddr_reg:x8; val_offset:3190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3190*FLEN/8, x10, x1, x4)

inst_1621:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x316 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x316 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3316; op2val:0x4716;
   valaddr_reg:x8; val_offset:3192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3192*FLEN/8, x10, x1, x4)

inst_1622:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x316 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x316 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3316; op2val:0x4716;
   valaddr_reg:x8; val_offset:3194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3194*FLEN/8, x10, x1, x4)

inst_1623:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x316 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x316 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3316; op2val:0x4716;
   valaddr_reg:x8; val_offset:3196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3196*FLEN/8, x10, x1, x4)

inst_1624:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x316 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x316 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3316; op2val:0x4716;
   valaddr_reg:x8; val_offset:3198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3198*FLEN/8, x10, x1, x4)

inst_1625:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1b6 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x1b6 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2db6; op2val:0x41b6;
   valaddr_reg:x8; val_offset:3200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3200*FLEN/8, x10, x1, x4)

inst_1626:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1b6 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x1b6 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2db6; op2val:0x41b6;
   valaddr_reg:x8; val_offset:3202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3202*FLEN/8, x10, x1, x4)

inst_1627:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1b6 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x1b6 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2db6; op2val:0x41b6;
   valaddr_reg:x8; val_offset:3204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3204*FLEN/8, x10, x1, x4)

inst_1628:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1b6 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x1b6 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2db6; op2val:0x41b6;
   valaddr_reg:x8; val_offset:3206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3206*FLEN/8, x10, x1, x4)

inst_1629:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1b6 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x1b6 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2db6; op2val:0x41b6;
   valaddr_reg:x8; val_offset:3208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3208*FLEN/8, x10, x1, x4)

inst_1630:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1a3 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a3; op2val:0x4da3;
   valaddr_reg:x8; val_offset:3210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3210*FLEN/8, x10, x1, x4)

inst_1631:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1a3 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a3; op2val:0x4da3;
   valaddr_reg:x8; val_offset:3212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3212*FLEN/8, x10, x1, x4)

inst_1632:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1a3 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a3; op2val:0x4da3;
   valaddr_reg:x8; val_offset:3214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3214*FLEN/8, x10, x1, x4)

inst_1633:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1a3 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a3; op2val:0x4da3;
   valaddr_reg:x8; val_offset:3216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3216*FLEN/8, x10, x1, x4)

inst_1634:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1a3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1a3 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39a3; op2val:0x4da3;
   valaddr_reg:x8; val_offset:3218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3218*FLEN/8, x10, x1, x4)

inst_1635:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x150 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d50; op2val:0x4150;
   valaddr_reg:x8; val_offset:3220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3220*FLEN/8, x10, x1, x4)

inst_1636:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x150 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d50; op2val:0x4150;
   valaddr_reg:x8; val_offset:3222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3222*FLEN/8, x10, x1, x4)

inst_1637:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x150 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d50; op2val:0x4150;
   valaddr_reg:x8; val_offset:3224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3224*FLEN/8, x10, x1, x4)

inst_1638:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x150 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d50; op2val:0x4150;
   valaddr_reg:x8; val_offset:3226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3226*FLEN/8, x10, x1, x4)

inst_1639:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x150 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2d50; op2val:0x4150;
   valaddr_reg:x8; val_offset:3228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3228*FLEN/8, x10, x1, x4)

inst_1640:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b9 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b9; op2val:0x4db9;
   valaddr_reg:x8; val_offset:3230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3230*FLEN/8, x10, x1, x4)

inst_1641:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b9 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b9; op2val:0x4db9;
   valaddr_reg:x8; val_offset:3232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3232*FLEN/8, x10, x1, x4)

inst_1642:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b9 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b9; op2val:0x4db9;
   valaddr_reg:x8; val_offset:3234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3234*FLEN/8, x10, x1, x4)

inst_1643:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b9 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b9; op2val:0x4db9;
   valaddr_reg:x8; val_offset:3236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3236*FLEN/8, x10, x1, x4)

inst_1644:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1b9 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b9 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39b9; op2val:0x4db9;
   valaddr_reg:x8; val_offset:3238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3238*FLEN/8, x10, x1, x4)

inst_1645:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31c and fs2 == 0 and fe2 == 0x13 and fm2 == 0x31c and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1c; op2val:0x4f1c;
   valaddr_reg:x8; val_offset:3240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3240*FLEN/8, x10, x1, x4)

inst_1646:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31c and fs2 == 0 and fe2 == 0x13 and fm2 == 0x31c and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1c; op2val:0x4f1c;
   valaddr_reg:x8; val_offset:3242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3242*FLEN/8, x10, x1, x4)

inst_1647:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31c and fs2 == 0 and fe2 == 0x13 and fm2 == 0x31c and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1c; op2val:0x4f1c;
   valaddr_reg:x8; val_offset:3244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3244*FLEN/8, x10, x1, x4)

inst_1648:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31c and fs2 == 0 and fe2 == 0x13 and fm2 == 0x31c and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1c; op2val:0x4f1c;
   valaddr_reg:x8; val_offset:3246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3246*FLEN/8, x10, x1, x4)

inst_1649:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x31c and fs2 == 0 and fe2 == 0x13 and fm2 == 0x31c and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3b1c; op2val:0x4f1c;
   valaddr_reg:x8; val_offset:3248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3248*FLEN/8, x10, x1, x4)

inst_1650:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x168 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x168 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3968; op2val:0x4d68;
   valaddr_reg:x8; val_offset:3250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3250*FLEN/8, x10, x1, x4)

inst_1651:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x168 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x168 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3968; op2val:0x4d68;
   valaddr_reg:x8; val_offset:3252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3252*FLEN/8, x10, x1, x4)

inst_1652:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x168 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x168 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3968; op2val:0x4d68;
   valaddr_reg:x8; val_offset:3254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3254*FLEN/8, x10, x1, x4)

inst_1653:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x168 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x168 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3968; op2val:0x4d68;
   valaddr_reg:x8; val_offset:3256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3256*FLEN/8, x10, x1, x4)

inst_1654:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x168 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x168 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3968; op2val:0x4d68;
   valaddr_reg:x8; val_offset:3258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3258*FLEN/8, x10, x1, x4)

inst_1655:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26e and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26e and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6e; op2val:0x426e;
   valaddr_reg:x8; val_offset:3260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3260*FLEN/8, x10, x1, x4)

inst_1656:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26e and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26e and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6e; op2val:0x426e;
   valaddr_reg:x8; val_offset:3262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3262*FLEN/8, x10, x1, x4)

inst_1657:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26e and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26e and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6e; op2val:0x426e;
   valaddr_reg:x8; val_offset:3264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3264*FLEN/8, x10, x1, x4)

inst_1658:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26e and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26e and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6e; op2val:0x426e;
   valaddr_reg:x8; val_offset:3266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3266*FLEN/8, x10, x1, x4)

inst_1659:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x26e and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26e and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2e6e; op2val:0x426e;
   valaddr_reg:x8; val_offset:3268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3268*FLEN/8, x10, x1, x4)

inst_1660:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x088 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x088 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3488; op2val:0x4888;
   valaddr_reg:x8; val_offset:3270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3270*FLEN/8, x10, x1, x4)

inst_1661:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x088 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x088 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3488; op2val:0x4888;
   valaddr_reg:x8; val_offset:3272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3272*FLEN/8, x10, x1, x4)

inst_1662:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x088 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x088 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3488; op2val:0x4888;
   valaddr_reg:x8; val_offset:3274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3274*FLEN/8, x10, x1, x4)

inst_1663:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x088 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x088 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3488; op2val:0x4888;
   valaddr_reg:x8; val_offset:3276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3276*FLEN/8, x10, x1, x4)

inst_1664:
// fs1 == 0 and fe1 == 0x0d and fm1 == 0x088 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x088 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3488; op2val:0x4888;
   valaddr_reg:x8; val_offset:3278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3278*FLEN/8, x10, x1, x4)

inst_1665:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x218 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x217 and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3218; op2val:0x4617;
   valaddr_reg:x8; val_offset:3280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3280*FLEN/8, x10, x1, x4)

inst_1666:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x218 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x217 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3218; op2val:0x4617;
   valaddr_reg:x8; val_offset:3282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3282*FLEN/8, x10, x1, x4)

inst_1667:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x218 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x217 and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3218; op2val:0x4617;
   valaddr_reg:x8; val_offset:3284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3284*FLEN/8, x10, x1, x4)

inst_1668:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x218 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x217 and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3218; op2val:0x4617;
   valaddr_reg:x8; val_offset:3286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3286*FLEN/8, x10, x1, x4)

inst_1669:
// fs1 == 0 and fe1 == 0x0c and fm1 == 0x218 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x217 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3218; op2val:0x4617;
   valaddr_reg:x8; val_offset:3288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3288*FLEN/8, x10, x1, x4)

inst_1670:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2be and fs2 == 0 and fe2 == 0x10 and fm2 == 0x2bd and  fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ebe; op2val:0x42bd;
   valaddr_reg:x8; val_offset:3290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 0, 0, x8, 3290*FLEN/8, x10, x1, x4)

inst_1671:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2be and fs2 == 0 and fe2 == 0x10 and fm2 == 0x2bd and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ebe; op2val:0x42bd;
   valaddr_reg:x8; val_offset:3292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3292*FLEN/8, x10, x1, x4)

inst_1672:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2be and fs2 == 0 and fe2 == 0x10 and fm2 == 0x2bd and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ebe; op2val:0x42bd;
   valaddr_reg:x8; val_offset:3294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3294*FLEN/8, x10, x1, x4)

inst_1673:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2be and fs2 == 0 and fe2 == 0x10 and fm2 == 0x2bd and  fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ebe; op2val:0x42bd;
   valaddr_reg:x8; val_offset:3296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 96, 0, x8, 3296*FLEN/8, x10, x1, x4)

inst_1674:
// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2be and fs2 == 0 and fe2 == 0x10 and fm2 == 0x2bd and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x2ebe; op2val:0x42bd;
   valaddr_reg:x8; val_offset:3298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3298*FLEN/8, x10, x1, x4)

inst_1675:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a18; op2val:0x7bff;
   valaddr_reg:x8; val_offset:3300*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3300*FLEN/8, x10, x1, x4)

inst_1676:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x218 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x3a18; op2val:0x7bff;
   valaddr_reg:x8; val_offset:3302*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 64, 0, x8, 3302*FLEN/8, x10, x1, x4)

inst_1677:
// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ec and fs2 == 0 and fe2 == 0x1e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x39ec; op2val:0x7bff;
   valaddr_reg:x8; val_offset:3304*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3304*FLEN/8, x10, x1, x4)

inst_1678:
// fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x1c75; op2val:0x7875;
   valaddr_reg:x8; val_offset:3306*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 32, 0, x8, 3306*FLEN/8, x10, x1, x4)

inst_1679:
// fs1 == 0 and fe1 == 0x07 and fm1 == 0x075 and fs2 == 0 and fe2 == 0x1e and fm2 == 0x075 and  fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x0000 and rs2_sgn_prefix == 0x0000  
/* opcode: fdiv.h ; op1:x30; op2:x29; dest:x31; op1val:0x1c75; op2val:0x7875;
   valaddr_reg:x8; val_offset:3308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x4
*/
TEST_FPRR_OP(fdiv.h, x31, x30, x29, dyn, 128, 0, x8, 3308*FLEN/8, x10, x1, x4)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14872,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14602,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14602,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14602,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14602,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14602,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(13821,32,FLEN)
NAN_BOXED(31743,32,FLEN)
test_dataset_1:
NAN_BOXED(13821,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(13821,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(13821,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(13821,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(15333,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(15333,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(15333,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(15333,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(15333,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14828,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14828,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14828,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14828,32,FLEN)
NAN_BOXED(31743,32,FLEN)
NAN_BOXED(14828,32,FLEN)
NAN_BOXED(0,32,FLEN)
test_dataset_2:
NAN_BOXED(7285,16,FLEN)
NAN_BOXED(30837,16,FLEN)
NAN_BOXED(7285,16,FLEN)
NAN_BOXED(30837,16,FLEN)
NAN_BOXED(7285,16,FLEN)
NAN_BOXED(30837,16,FLEN)
NAN_BOXED(7285,16,FLEN)
NAN_BOXED(30837,16,FLEN)
NAN_BOXED(0,16,FLEN)
NAN_BOXED(30837,16,FLEN)
NAN_BOXED(12603,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12603,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12603,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12603,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12603,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13766,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13766,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13766,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13766,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13766,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13783,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13783,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13783,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13783,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13783,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14241,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14241,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14241,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14241,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14241,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13633,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13633,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13633,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13633,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13633,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13244,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13244,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13244,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13244,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13244,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14743,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14743,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14743,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14743,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14743,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12365,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12365,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12365,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12365,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12365,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13439,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13439,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13439,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13439,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13439,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13458,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13458,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13458,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13458,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13458,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14551,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14551,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14551,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14551,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14551,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14449,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14449,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14449,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14449,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14449,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12224,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12224,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12224,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12224,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(12224,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(15081,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(15081,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(15081,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(15081,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(15081,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(10347,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(10347,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(10347,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(10347,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(10347,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13817,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13817,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13817,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13817,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13817,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14306,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14306,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14306,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14306,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14306,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14641,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14641,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14641,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14641,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14641,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13990,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13990,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13990,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13990,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13990,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(13590,16,FLEN)
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NAN_BOXED(19816,16,FLEN)
NAN_BOXED(14696,16,FLEN)
NAN_BOXED(19816,16,FLEN)
NAN_BOXED(14696,16,FLEN)
NAN_BOXED(19816,16,FLEN)
NAN_BOXED(14696,16,FLEN)
NAN_BOXED(19816,16,FLEN)
NAN_BOXED(11886,16,FLEN)
NAN_BOXED(17006,16,FLEN)
NAN_BOXED(11886,16,FLEN)
NAN_BOXED(17006,16,FLEN)
NAN_BOXED(11886,16,FLEN)
NAN_BOXED(17006,16,FLEN)
NAN_BOXED(11886,16,FLEN)
NAN_BOXED(17006,16,FLEN)
NAN_BOXED(11886,16,FLEN)
NAN_BOXED(17006,16,FLEN)
NAN_BOXED(13448,16,FLEN)
NAN_BOXED(18568,16,FLEN)
NAN_BOXED(13448,16,FLEN)
NAN_BOXED(18568,16,FLEN)
NAN_BOXED(13448,16,FLEN)
NAN_BOXED(18568,16,FLEN)
NAN_BOXED(13448,16,FLEN)
NAN_BOXED(18568,16,FLEN)
NAN_BOXED(13448,16,FLEN)
NAN_BOXED(18568,16,FLEN)
NAN_BOXED(12824,16,FLEN)
NAN_BOXED(17943,16,FLEN)
NAN_BOXED(12824,16,FLEN)
NAN_BOXED(17943,16,FLEN)
NAN_BOXED(12824,16,FLEN)
NAN_BOXED(17943,16,FLEN)
NAN_BOXED(12824,16,FLEN)
NAN_BOXED(17943,16,FLEN)
NAN_BOXED(12824,16,FLEN)
NAN_BOXED(17943,16,FLEN)
NAN_BOXED(11966,16,FLEN)
NAN_BOXED(17085,16,FLEN)
NAN_BOXED(11966,16,FLEN)
NAN_BOXED(17085,16,FLEN)
NAN_BOXED(11966,16,FLEN)
NAN_BOXED(17085,16,FLEN)
NAN_BOXED(11966,16,FLEN)
NAN_BOXED(17085,16,FLEN)
NAN_BOXED(11966,16,FLEN)
NAN_BOXED(17085,16,FLEN)
NAN_BOXED(14872,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14872,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(14828,16,FLEN)
NAN_BOXED(31743,16,FLEN)
NAN_BOXED(7285,16,FLEN)
NAN_BOXED(30837,16,FLEN)
NAN_BOXED(7285,16,FLEN)
NAN_BOXED(30837,16,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x5_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x5_1:
    .fill 28*((SIGALIGN)/4),4,0xdeadbeef


signature_x2_0:
    .fill 32*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_12:
    .fill 228*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
