
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:17:59 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_13824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fffe0; valaddr_reg:x3; val_offset:41472*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41472*0 + 3*0*FLEN/8, x4, x1, x2)

inst_13825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffff0; valaddr_reg:x3; val_offset:41475*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41475*0 + 3*1*FLEN/8, x4, x1, x2)

inst_13826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffff8; valaddr_reg:x3; val_offset:41478*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41478*0 + 3*2*FLEN/8, x4, x1, x2)

inst_13827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffffc; valaddr_reg:x3; val_offset:41481*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41481*0 + 3*3*FLEN/8, x4, x1, x2)

inst_13828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffffe; valaddr_reg:x3; val_offset:41484*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41484*0 + 3*4*FLEN/8, x4, x1, x2)

inst_13829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fffff; valaddr_reg:x3; val_offset:41487*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41487*0 + 3*5*FLEN/8, x4, x1, x2)

inst_13830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f000001; valaddr_reg:x3; val_offset:41490*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41490*0 + 3*6*FLEN/8, x4, x1, x2)

inst_13831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f000003; valaddr_reg:x3; val_offset:41493*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41493*0 + 3*7*FLEN/8, x4, x1, x2)

inst_13832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f000007; valaddr_reg:x3; val_offset:41496*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41496*0 + 3*8*FLEN/8, x4, x1, x2)

inst_13833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f199999; valaddr_reg:x3; val_offset:41499*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41499*0 + 3*9*FLEN/8, x4, x1, x2)

inst_13834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f249249; valaddr_reg:x3; val_offset:41502*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41502*0 + 3*10*FLEN/8, x4, x1, x2)

inst_13835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f333333; valaddr_reg:x3; val_offset:41505*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41505*0 + 3*11*FLEN/8, x4, x1, x2)

inst_13836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:41508*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41508*0 + 3*12*FLEN/8, x4, x1, x2)

inst_13837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:41511*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41511*0 + 3*13*FLEN/8, x4, x1, x2)

inst_13838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f444444; valaddr_reg:x3; val_offset:41514*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41514*0 + 3*14*FLEN/8, x4, x1, x2)

inst_13839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:41517*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41517*0 + 3*15*FLEN/8, x4, x1, x2)

inst_13840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:41520*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41520*0 + 3*16*FLEN/8, x4, x1, x2)

inst_13841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f666666; valaddr_reg:x3; val_offset:41523*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41523*0 + 3*17*FLEN/8, x4, x1, x2)

inst_13842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:41526*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41526*0 + 3*18*FLEN/8, x4, x1, x2)

inst_13843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:41529*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41529*0 + 3*19*FLEN/8, x4, x1, x2)

inst_13844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:41532*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41532*0 + 3*20*FLEN/8, x4, x1, x2)

inst_13845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:41535*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41535*0 + 3*21*FLEN/8, x4, x1, x2)

inst_13846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:41538*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41538*0 + 3*22*FLEN/8, x4, x1, x2)

inst_13847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:41541*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41541*0 + 3*23*FLEN/8, x4, x1, x2)

inst_13848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:41544*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41544*0 + 3*24*FLEN/8, x4, x1, x2)

inst_13849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:41547*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41547*0 + 3*25*FLEN/8, x4, x1, x2)

inst_13850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:41550*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41550*0 + 3*26*FLEN/8, x4, x1, x2)

inst_13851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:41553*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41553*0 + 3*27*FLEN/8, x4, x1, x2)

inst_13852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:41556*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41556*0 + 3*28*FLEN/8, x4, x1, x2)

inst_13853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:41559*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41559*0 + 3*29*FLEN/8, x4, x1, x2)

inst_13854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:41562*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41562*0 + 3*30*FLEN/8, x4, x1, x2)

inst_13855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:41565*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41565*0 + 3*31*FLEN/8, x4, x1, x2)

inst_13856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:41568*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41568*0 + 3*32*FLEN/8, x4, x1, x2)

inst_13857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:41571*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41571*0 + 3*33*FLEN/8, x4, x1, x2)

inst_13858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:41574*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41574*0 + 3*34*FLEN/8, x4, x1, x2)

inst_13859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:41577*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41577*0 + 3*35*FLEN/8, x4, x1, x2)

inst_13860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:41580*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41580*0 + 3*36*FLEN/8, x4, x1, x2)

inst_13861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:41583*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41583*0 + 3*37*FLEN/8, x4, x1, x2)

inst_13862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9800000; valaddr_reg:x3; val_offset:41586*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41586*0 + 3*38*FLEN/8, x4, x1, x2)

inst_13863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9800001; valaddr_reg:x3; val_offset:41589*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41589*0 + 3*39*FLEN/8, x4, x1, x2)

inst_13864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9800003; valaddr_reg:x3; val_offset:41592*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41592*0 + 3*40*FLEN/8, x4, x1, x2)

inst_13865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9800007; valaddr_reg:x3; val_offset:41595*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41595*0 + 3*41*FLEN/8, x4, x1, x2)

inst_13866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x980000f; valaddr_reg:x3; val_offset:41598*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41598*0 + 3*42*FLEN/8, x4, x1, x2)

inst_13867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x980001f; valaddr_reg:x3; val_offset:41601*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41601*0 + 3*43*FLEN/8, x4, x1, x2)

inst_13868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x980003f; valaddr_reg:x3; val_offset:41604*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41604*0 + 3*44*FLEN/8, x4, x1, x2)

inst_13869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x980007f; valaddr_reg:x3; val_offset:41607*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41607*0 + 3*45*FLEN/8, x4, x1, x2)

inst_13870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x98000ff; valaddr_reg:x3; val_offset:41610*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41610*0 + 3*46*FLEN/8, x4, x1, x2)

inst_13871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x98001ff; valaddr_reg:x3; val_offset:41613*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41613*0 + 3*47*FLEN/8, x4, x1, x2)

inst_13872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x98003ff; valaddr_reg:x3; val_offset:41616*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41616*0 + 3*48*FLEN/8, x4, x1, x2)

inst_13873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x98007ff; valaddr_reg:x3; val_offset:41619*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41619*0 + 3*49*FLEN/8, x4, x1, x2)

inst_13874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9800fff; valaddr_reg:x3; val_offset:41622*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41622*0 + 3*50*FLEN/8, x4, x1, x2)

inst_13875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9801fff; valaddr_reg:x3; val_offset:41625*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41625*0 + 3*51*FLEN/8, x4, x1, x2)

inst_13876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9803fff; valaddr_reg:x3; val_offset:41628*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41628*0 + 3*52*FLEN/8, x4, x1, x2)

inst_13877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9807fff; valaddr_reg:x3; val_offset:41631*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41631*0 + 3*53*FLEN/8, x4, x1, x2)

inst_13878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x980ffff; valaddr_reg:x3; val_offset:41634*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41634*0 + 3*54*FLEN/8, x4, x1, x2)

inst_13879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x981ffff; valaddr_reg:x3; val_offset:41637*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41637*0 + 3*55*FLEN/8, x4, x1, x2)

inst_13880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x983ffff; valaddr_reg:x3; val_offset:41640*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41640*0 + 3*56*FLEN/8, x4, x1, x2)

inst_13881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x987ffff; valaddr_reg:x3; val_offset:41643*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41643*0 + 3*57*FLEN/8, x4, x1, x2)

inst_13882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x98fffff; valaddr_reg:x3; val_offset:41646*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41646*0 + 3*58*FLEN/8, x4, x1, x2)

inst_13883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x99fffff; valaddr_reg:x3; val_offset:41649*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41649*0 + 3*59*FLEN/8, x4, x1, x2)

inst_13884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9bfffff; valaddr_reg:x3; val_offset:41652*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41652*0 + 3*60*FLEN/8, x4, x1, x2)

inst_13885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9c00000; valaddr_reg:x3; val_offset:41655*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41655*0 + 3*61*FLEN/8, x4, x1, x2)

inst_13886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9e00000; valaddr_reg:x3; val_offset:41658*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41658*0 + 3*62*FLEN/8, x4, x1, x2)

inst_13887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9f00000; valaddr_reg:x3; val_offset:41661*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41661*0 + 3*63*FLEN/8, x4, x1, x2)

inst_13888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9f80000; valaddr_reg:x3; val_offset:41664*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41664*0 + 3*64*FLEN/8, x4, x1, x2)

inst_13889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fc0000; valaddr_reg:x3; val_offset:41667*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41667*0 + 3*65*FLEN/8, x4, x1, x2)

inst_13890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fe0000; valaddr_reg:x3; val_offset:41670*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41670*0 + 3*66*FLEN/8, x4, x1, x2)

inst_13891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ff0000; valaddr_reg:x3; val_offset:41673*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41673*0 + 3*67*FLEN/8, x4, x1, x2)

inst_13892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ff8000; valaddr_reg:x3; val_offset:41676*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41676*0 + 3*68*FLEN/8, x4, x1, x2)

inst_13893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffc000; valaddr_reg:x3; val_offset:41679*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41679*0 + 3*69*FLEN/8, x4, x1, x2)

inst_13894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffe000; valaddr_reg:x3; val_offset:41682*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41682*0 + 3*70*FLEN/8, x4, x1, x2)

inst_13895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fff000; valaddr_reg:x3; val_offset:41685*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41685*0 + 3*71*FLEN/8, x4, x1, x2)

inst_13896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fff800; valaddr_reg:x3; val_offset:41688*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41688*0 + 3*72*FLEN/8, x4, x1, x2)

inst_13897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fffc00; valaddr_reg:x3; val_offset:41691*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41691*0 + 3*73*FLEN/8, x4, x1, x2)

inst_13898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fffe00; valaddr_reg:x3; val_offset:41694*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41694*0 + 3*74*FLEN/8, x4, x1, x2)

inst_13899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffff00; valaddr_reg:x3; val_offset:41697*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41697*0 + 3*75*FLEN/8, x4, x1, x2)

inst_13900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffff80; valaddr_reg:x3; val_offset:41700*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41700*0 + 3*76*FLEN/8, x4, x1, x2)

inst_13901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffffc0; valaddr_reg:x3; val_offset:41703*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41703*0 + 3*77*FLEN/8, x4, x1, x2)

inst_13902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffffe0; valaddr_reg:x3; val_offset:41706*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41706*0 + 3*78*FLEN/8, x4, x1, x2)

inst_13903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fffff0; valaddr_reg:x3; val_offset:41709*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41709*0 + 3*79*FLEN/8, x4, x1, x2)

inst_13904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fffff8; valaddr_reg:x3; val_offset:41712*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41712*0 + 3*80*FLEN/8, x4, x1, x2)

inst_13905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fffffc; valaddr_reg:x3; val_offset:41715*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41715*0 + 3*81*FLEN/8, x4, x1, x2)

inst_13906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9fffffe; valaddr_reg:x3; val_offset:41718*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41718*0 + 3*82*FLEN/8, x4, x1, x2)

inst_13907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0;
op3val:0x9ffffff; valaddr_reg:x3; val_offset:41721*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41721*0 + 3*83*FLEN/8, x4, x1, x2)

inst_13908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800000; valaddr_reg:x3; val_offset:41724*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41724*0 + 3*84*FLEN/8, x4, x1, x2)

inst_13909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800001; valaddr_reg:x3; val_offset:41727*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41727*0 + 3*85*FLEN/8, x4, x1, x2)

inst_13910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800003; valaddr_reg:x3; val_offset:41730*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41730*0 + 3*86*FLEN/8, x4, x1, x2)

inst_13911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800007; valaddr_reg:x3; val_offset:41733*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41733*0 + 3*87*FLEN/8, x4, x1, x2)

inst_13912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180000f; valaddr_reg:x3; val_offset:41736*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41736*0 + 3*88*FLEN/8, x4, x1, x2)

inst_13913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180001f; valaddr_reg:x3; val_offset:41739*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41739*0 + 3*89*FLEN/8, x4, x1, x2)

inst_13914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180003f; valaddr_reg:x3; val_offset:41742*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41742*0 + 3*90*FLEN/8, x4, x1, x2)

inst_13915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180007f; valaddr_reg:x3; val_offset:41745*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41745*0 + 3*91*FLEN/8, x4, x1, x2)

inst_13916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618000ff; valaddr_reg:x3; val_offset:41748*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41748*0 + 3*92*FLEN/8, x4, x1, x2)

inst_13917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618001ff; valaddr_reg:x3; val_offset:41751*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41751*0 + 3*93*FLEN/8, x4, x1, x2)

inst_13918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618003ff; valaddr_reg:x3; val_offset:41754*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41754*0 + 3*94*FLEN/8, x4, x1, x2)

inst_13919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618007ff; valaddr_reg:x3; val_offset:41757*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41757*0 + 3*95*FLEN/8, x4, x1, x2)

inst_13920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800fff; valaddr_reg:x3; val_offset:41760*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41760*0 + 3*96*FLEN/8, x4, x1, x2)

inst_13921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61801fff; valaddr_reg:x3; val_offset:41763*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41763*0 + 3*97*FLEN/8, x4, x1, x2)

inst_13922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61803fff; valaddr_reg:x3; val_offset:41766*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41766*0 + 3*98*FLEN/8, x4, x1, x2)

inst_13923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61807fff; valaddr_reg:x3; val_offset:41769*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41769*0 + 3*99*FLEN/8, x4, x1, x2)

inst_13924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180ffff; valaddr_reg:x3; val_offset:41772*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41772*0 + 3*100*FLEN/8, x4, x1, x2)

inst_13925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6181ffff; valaddr_reg:x3; val_offset:41775*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41775*0 + 3*101*FLEN/8, x4, x1, x2)

inst_13926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6183ffff; valaddr_reg:x3; val_offset:41778*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41778*0 + 3*102*FLEN/8, x4, x1, x2)

inst_13927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6187ffff; valaddr_reg:x3; val_offset:41781*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41781*0 + 3*103*FLEN/8, x4, x1, x2)

inst_13928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618fffff; valaddr_reg:x3; val_offset:41784*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41784*0 + 3*104*FLEN/8, x4, x1, x2)

inst_13929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x619fffff; valaddr_reg:x3; val_offset:41787*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41787*0 + 3*105*FLEN/8, x4, x1, x2)

inst_13930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61bfffff; valaddr_reg:x3; val_offset:41790*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41790*0 + 3*106*FLEN/8, x4, x1, x2)

inst_13931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61c00000; valaddr_reg:x3; val_offset:41793*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41793*0 + 3*107*FLEN/8, x4, x1, x2)

inst_13932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61e00000; valaddr_reg:x3; val_offset:41796*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41796*0 + 3*108*FLEN/8, x4, x1, x2)

inst_13933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61f00000; valaddr_reg:x3; val_offset:41799*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41799*0 + 3*109*FLEN/8, x4, x1, x2)

inst_13934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61f80000; valaddr_reg:x3; val_offset:41802*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41802*0 + 3*110*FLEN/8, x4, x1, x2)

inst_13935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fc0000; valaddr_reg:x3; val_offset:41805*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41805*0 + 3*111*FLEN/8, x4, x1, x2)

inst_13936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fe0000; valaddr_reg:x3; val_offset:41808*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41808*0 + 3*112*FLEN/8, x4, x1, x2)

inst_13937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ff0000; valaddr_reg:x3; val_offset:41811*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41811*0 + 3*113*FLEN/8, x4, x1, x2)

inst_13938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ff8000; valaddr_reg:x3; val_offset:41814*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41814*0 + 3*114*FLEN/8, x4, x1, x2)

inst_13939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffc000; valaddr_reg:x3; val_offset:41817*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41817*0 + 3*115*FLEN/8, x4, x1, x2)

inst_13940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffe000; valaddr_reg:x3; val_offset:41820*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41820*0 + 3*116*FLEN/8, x4, x1, x2)

inst_13941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fff000; valaddr_reg:x3; val_offset:41823*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41823*0 + 3*117*FLEN/8, x4, x1, x2)

inst_13942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fff800; valaddr_reg:x3; val_offset:41826*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41826*0 + 3*118*FLEN/8, x4, x1, x2)

inst_13943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffc00; valaddr_reg:x3; val_offset:41829*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41829*0 + 3*119*FLEN/8, x4, x1, x2)

inst_13944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffe00; valaddr_reg:x3; val_offset:41832*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41832*0 + 3*120*FLEN/8, x4, x1, x2)

inst_13945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffff00; valaddr_reg:x3; val_offset:41835*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41835*0 + 3*121*FLEN/8, x4, x1, x2)

inst_13946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffff80; valaddr_reg:x3; val_offset:41838*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41838*0 + 3*122*FLEN/8, x4, x1, x2)

inst_13947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffffc0; valaddr_reg:x3; val_offset:41841*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41841*0 + 3*123*FLEN/8, x4, x1, x2)

inst_13948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffffe0; valaddr_reg:x3; val_offset:41844*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41844*0 + 3*124*FLEN/8, x4, x1, x2)

inst_13949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffff0; valaddr_reg:x3; val_offset:41847*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41847*0 + 3*125*FLEN/8, x4, x1, x2)

inst_13950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffff8; valaddr_reg:x3; val_offset:41850*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41850*0 + 3*126*FLEN/8, x4, x1, x2)

inst_13951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffffc; valaddr_reg:x3; val_offset:41853*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41853*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_13952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffffe; valaddr_reg:x3; val_offset:41856*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41856*0 + 3*128*FLEN/8, x4, x1, x2)

inst_13953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffffff; valaddr_reg:x3; val_offset:41859*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41859*0 + 3*129*FLEN/8, x4, x1, x2)

inst_13954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f000001; valaddr_reg:x3; val_offset:41862*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41862*0 + 3*130*FLEN/8, x4, x1, x2)

inst_13955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f000003; valaddr_reg:x3; val_offset:41865*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41865*0 + 3*131*FLEN/8, x4, x1, x2)

inst_13956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f000007; valaddr_reg:x3; val_offset:41868*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41868*0 + 3*132*FLEN/8, x4, x1, x2)

inst_13957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f199999; valaddr_reg:x3; val_offset:41871*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41871*0 + 3*133*FLEN/8, x4, x1, x2)

inst_13958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f249249; valaddr_reg:x3; val_offset:41874*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41874*0 + 3*134*FLEN/8, x4, x1, x2)

inst_13959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f333333; valaddr_reg:x3; val_offset:41877*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41877*0 + 3*135*FLEN/8, x4, x1, x2)

inst_13960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:41880*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41880*0 + 3*136*FLEN/8, x4, x1, x2)

inst_13961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:41883*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41883*0 + 3*137*FLEN/8, x4, x1, x2)

inst_13962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f444444; valaddr_reg:x3; val_offset:41886*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41886*0 + 3*138*FLEN/8, x4, x1, x2)

inst_13963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:41889*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41889*0 + 3*139*FLEN/8, x4, x1, x2)

inst_13964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:41892*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41892*0 + 3*140*FLEN/8, x4, x1, x2)

inst_13965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f666666; valaddr_reg:x3; val_offset:41895*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41895*0 + 3*141*FLEN/8, x4, x1, x2)

inst_13966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:41898*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41898*0 + 3*142*FLEN/8, x4, x1, x2)

inst_13967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:41901*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41901*0 + 3*143*FLEN/8, x4, x1, x2)

inst_13968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:41904*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41904*0 + 3*144*FLEN/8, x4, x1, x2)

inst_13969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:41907*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41907*0 + 3*145*FLEN/8, x4, x1, x2)

inst_13970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:41910*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41910*0 + 3*146*FLEN/8, x4, x1, x2)

inst_13971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:41913*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41913*0 + 3*147*FLEN/8, x4, x1, x2)

inst_13972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:41916*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41916*0 + 3*148*FLEN/8, x4, x1, x2)

inst_13973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:41919*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41919*0 + 3*149*FLEN/8, x4, x1, x2)

inst_13974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:41922*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41922*0 + 3*150*FLEN/8, x4, x1, x2)

inst_13975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:41925*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41925*0 + 3*151*FLEN/8, x4, x1, x2)

inst_13976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:41928*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41928*0 + 3*152*FLEN/8, x4, x1, x2)

inst_13977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41931*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41931*0 + 3*153*FLEN/8, x4, x1, x2)

inst_13978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:41934*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41934*0 + 3*154*FLEN/8, x4, x1, x2)

inst_13979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:41937*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41937*0 + 3*155*FLEN/8, x4, x1, x2)

inst_13980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:41940*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41940*0 + 3*156*FLEN/8, x4, x1, x2)

inst_13981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:41943*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41943*0 + 3*157*FLEN/8, x4, x1, x2)

inst_13982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:41946*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41946*0 + 3*158*FLEN/8, x4, x1, x2)

inst_13983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:41949*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41949*0 + 3*159*FLEN/8, x4, x1, x2)

inst_13984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:41952*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41952*0 + 3*160*FLEN/8, x4, x1, x2)

inst_13985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:41955*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41955*0 + 3*161*FLEN/8, x4, x1, x2)

inst_13986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb800000; valaddr_reg:x3; val_offset:41958*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41958*0 + 3*162*FLEN/8, x4, x1, x2)

inst_13987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb800001; valaddr_reg:x3; val_offset:41961*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41961*0 + 3*163*FLEN/8, x4, x1, x2)

inst_13988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb800003; valaddr_reg:x3; val_offset:41964*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41964*0 + 3*164*FLEN/8, x4, x1, x2)

inst_13989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb800007; valaddr_reg:x3; val_offset:41967*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41967*0 + 3*165*FLEN/8, x4, x1, x2)

inst_13990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb80000f; valaddr_reg:x3; val_offset:41970*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41970*0 + 3*166*FLEN/8, x4, x1, x2)

inst_13991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb80001f; valaddr_reg:x3; val_offset:41973*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41973*0 + 3*167*FLEN/8, x4, x1, x2)

inst_13992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb80003f; valaddr_reg:x3; val_offset:41976*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41976*0 + 3*168*FLEN/8, x4, x1, x2)

inst_13993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb80007f; valaddr_reg:x3; val_offset:41979*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41979*0 + 3*169*FLEN/8, x4, x1, x2)

inst_13994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb8000ff; valaddr_reg:x3; val_offset:41982*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41982*0 + 3*170*FLEN/8, x4, x1, x2)

inst_13995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb8001ff; valaddr_reg:x3; val_offset:41985*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41985*0 + 3*171*FLEN/8, x4, x1, x2)

inst_13996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb8003ff; valaddr_reg:x3; val_offset:41988*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41988*0 + 3*172*FLEN/8, x4, x1, x2)

inst_13997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb8007ff; valaddr_reg:x3; val_offset:41991*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41991*0 + 3*173*FLEN/8, x4, x1, x2)

inst_13998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb800fff; valaddr_reg:x3; val_offset:41994*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41994*0 + 3*174*FLEN/8, x4, x1, x2)

inst_13999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb801fff; valaddr_reg:x3; val_offset:41997*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41997*0 + 3*175*FLEN/8, x4, x1, x2)

inst_14000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb803fff; valaddr_reg:x3; val_offset:42000*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42000*0 + 3*176*FLEN/8, x4, x1, x2)

inst_14001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb807fff; valaddr_reg:x3; val_offset:42003*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42003*0 + 3*177*FLEN/8, x4, x1, x2)

inst_14002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb80ffff; valaddr_reg:x3; val_offset:42006*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42006*0 + 3*178*FLEN/8, x4, x1, x2)

inst_14003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb81ffff; valaddr_reg:x3; val_offset:42009*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42009*0 + 3*179*FLEN/8, x4, x1, x2)

inst_14004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb83ffff; valaddr_reg:x3; val_offset:42012*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42012*0 + 3*180*FLEN/8, x4, x1, x2)

inst_14005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb87ffff; valaddr_reg:x3; val_offset:42015*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42015*0 + 3*181*FLEN/8, x4, x1, x2)

inst_14006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb8fffff; valaddr_reg:x3; val_offset:42018*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42018*0 + 3*182*FLEN/8, x4, x1, x2)

inst_14007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xb9fffff; valaddr_reg:x3; val_offset:42021*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42021*0 + 3*183*FLEN/8, x4, x1, x2)

inst_14008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbbfffff; valaddr_reg:x3; val_offset:42024*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42024*0 + 3*184*FLEN/8, x4, x1, x2)

inst_14009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbc00000; valaddr_reg:x3; val_offset:42027*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42027*0 + 3*185*FLEN/8, x4, x1, x2)

inst_14010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbe00000; valaddr_reg:x3; val_offset:42030*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42030*0 + 3*186*FLEN/8, x4, x1, x2)

inst_14011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbf00000; valaddr_reg:x3; val_offset:42033*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42033*0 + 3*187*FLEN/8, x4, x1, x2)

inst_14012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbf80000; valaddr_reg:x3; val_offset:42036*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42036*0 + 3*188*FLEN/8, x4, x1, x2)

inst_14013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfc0000; valaddr_reg:x3; val_offset:42039*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42039*0 + 3*189*FLEN/8, x4, x1, x2)

inst_14014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfe0000; valaddr_reg:x3; val_offset:42042*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42042*0 + 3*190*FLEN/8, x4, x1, x2)

inst_14015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbff0000; valaddr_reg:x3; val_offset:42045*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42045*0 + 3*191*FLEN/8, x4, x1, x2)

inst_14016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbff8000; valaddr_reg:x3; val_offset:42048*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42048*0 + 3*192*FLEN/8, x4, x1, x2)

inst_14017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffc000; valaddr_reg:x3; val_offset:42051*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42051*0 + 3*193*FLEN/8, x4, x1, x2)

inst_14018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffe000; valaddr_reg:x3; val_offset:42054*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42054*0 + 3*194*FLEN/8, x4, x1, x2)

inst_14019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfff000; valaddr_reg:x3; val_offset:42057*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42057*0 + 3*195*FLEN/8, x4, x1, x2)

inst_14020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfff800; valaddr_reg:x3; val_offset:42060*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42060*0 + 3*196*FLEN/8, x4, x1, x2)

inst_14021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfffc00; valaddr_reg:x3; val_offset:42063*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42063*0 + 3*197*FLEN/8, x4, x1, x2)

inst_14022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfffe00; valaddr_reg:x3; val_offset:42066*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42066*0 + 3*198*FLEN/8, x4, x1, x2)

inst_14023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffff00; valaddr_reg:x3; val_offset:42069*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42069*0 + 3*199*FLEN/8, x4, x1, x2)

inst_14024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffff80; valaddr_reg:x3; val_offset:42072*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42072*0 + 3*200*FLEN/8, x4, x1, x2)

inst_14025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffffc0; valaddr_reg:x3; val_offset:42075*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42075*0 + 3*201*FLEN/8, x4, x1, x2)

inst_14026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffffe0; valaddr_reg:x3; val_offset:42078*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42078*0 + 3*202*FLEN/8, x4, x1, x2)

inst_14027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfffff0; valaddr_reg:x3; val_offset:42081*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42081*0 + 3*203*FLEN/8, x4, x1, x2)

inst_14028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfffff8; valaddr_reg:x3; val_offset:42084*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42084*0 + 3*204*FLEN/8, x4, x1, x2)

inst_14029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfffffc; valaddr_reg:x3; val_offset:42087*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42087*0 + 3*205*FLEN/8, x4, x1, x2)

inst_14030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbfffffe; valaddr_reg:x3; val_offset:42090*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42090*0 + 3*206*FLEN/8, x4, x1, x2)

inst_14031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0;
op3val:0xbffffff; valaddr_reg:x3; val_offset:42093*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42093*0 + 3*207*FLEN/8, x4, x1, x2)

inst_14032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d000000; valaddr_reg:x3; val_offset:42096*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42096*0 + 3*208*FLEN/8, x4, x1, x2)

inst_14033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d000001; valaddr_reg:x3; val_offset:42099*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42099*0 + 3*209*FLEN/8, x4, x1, x2)

inst_14034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d000003; valaddr_reg:x3; val_offset:42102*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42102*0 + 3*210*FLEN/8, x4, x1, x2)

inst_14035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d000007; valaddr_reg:x3; val_offset:42105*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42105*0 + 3*211*FLEN/8, x4, x1, x2)

inst_14036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d00000f; valaddr_reg:x3; val_offset:42108*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42108*0 + 3*212*FLEN/8, x4, x1, x2)

inst_14037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d00001f; valaddr_reg:x3; val_offset:42111*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42111*0 + 3*213*FLEN/8, x4, x1, x2)

inst_14038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d00003f; valaddr_reg:x3; val_offset:42114*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42114*0 + 3*214*FLEN/8, x4, x1, x2)

inst_14039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d00007f; valaddr_reg:x3; val_offset:42117*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42117*0 + 3*215*FLEN/8, x4, x1, x2)

inst_14040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d0000ff; valaddr_reg:x3; val_offset:42120*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42120*0 + 3*216*FLEN/8, x4, x1, x2)

inst_14041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d0001ff; valaddr_reg:x3; val_offset:42123*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42123*0 + 3*217*FLEN/8, x4, x1, x2)

inst_14042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d0003ff; valaddr_reg:x3; val_offset:42126*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42126*0 + 3*218*FLEN/8, x4, x1, x2)

inst_14043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d0007ff; valaddr_reg:x3; val_offset:42129*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42129*0 + 3*219*FLEN/8, x4, x1, x2)

inst_14044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d000fff; valaddr_reg:x3; val_offset:42132*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42132*0 + 3*220*FLEN/8, x4, x1, x2)

inst_14045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d001fff; valaddr_reg:x3; val_offset:42135*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42135*0 + 3*221*FLEN/8, x4, x1, x2)

inst_14046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d003fff; valaddr_reg:x3; val_offset:42138*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42138*0 + 3*222*FLEN/8, x4, x1, x2)

inst_14047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d007fff; valaddr_reg:x3; val_offset:42141*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42141*0 + 3*223*FLEN/8, x4, x1, x2)

inst_14048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d00ffff; valaddr_reg:x3; val_offset:42144*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42144*0 + 3*224*FLEN/8, x4, x1, x2)

inst_14049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d01ffff; valaddr_reg:x3; val_offset:42147*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42147*0 + 3*225*FLEN/8, x4, x1, x2)

inst_14050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d03ffff; valaddr_reg:x3; val_offset:42150*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42150*0 + 3*226*FLEN/8, x4, x1, x2)

inst_14051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d07ffff; valaddr_reg:x3; val_offset:42153*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42153*0 + 3*227*FLEN/8, x4, x1, x2)

inst_14052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d0fffff; valaddr_reg:x3; val_offset:42156*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42156*0 + 3*228*FLEN/8, x4, x1, x2)

inst_14053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d1fffff; valaddr_reg:x3; val_offset:42159*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42159*0 + 3*229*FLEN/8, x4, x1, x2)

inst_14054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d3fffff; valaddr_reg:x3; val_offset:42162*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42162*0 + 3*230*FLEN/8, x4, x1, x2)

inst_14055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d400000; valaddr_reg:x3; val_offset:42165*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42165*0 + 3*231*FLEN/8, x4, x1, x2)

inst_14056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d600000; valaddr_reg:x3; val_offset:42168*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42168*0 + 3*232*FLEN/8, x4, x1, x2)

inst_14057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d700000; valaddr_reg:x3; val_offset:42171*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42171*0 + 3*233*FLEN/8, x4, x1, x2)

inst_14058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d780000; valaddr_reg:x3; val_offset:42174*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42174*0 + 3*234*FLEN/8, x4, x1, x2)

inst_14059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7c0000; valaddr_reg:x3; val_offset:42177*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42177*0 + 3*235*FLEN/8, x4, x1, x2)

inst_14060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7e0000; valaddr_reg:x3; val_offset:42180*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42180*0 + 3*236*FLEN/8, x4, x1, x2)

inst_14061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7f0000; valaddr_reg:x3; val_offset:42183*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42183*0 + 3*237*FLEN/8, x4, x1, x2)

inst_14062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7f8000; valaddr_reg:x3; val_offset:42186*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42186*0 + 3*238*FLEN/8, x4, x1, x2)

inst_14063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fc000; valaddr_reg:x3; val_offset:42189*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42189*0 + 3*239*FLEN/8, x4, x1, x2)

inst_14064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fe000; valaddr_reg:x3; val_offset:42192*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42192*0 + 3*240*FLEN/8, x4, x1, x2)

inst_14065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ff000; valaddr_reg:x3; val_offset:42195*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42195*0 + 3*241*FLEN/8, x4, x1, x2)

inst_14066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ff800; valaddr_reg:x3; val_offset:42198*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42198*0 + 3*242*FLEN/8, x4, x1, x2)

inst_14067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ffc00; valaddr_reg:x3; val_offset:42201*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42201*0 + 3*243*FLEN/8, x4, x1, x2)

inst_14068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ffe00; valaddr_reg:x3; val_offset:42204*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42204*0 + 3*244*FLEN/8, x4, x1, x2)

inst_14069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fff00; valaddr_reg:x3; val_offset:42207*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42207*0 + 3*245*FLEN/8, x4, x1, x2)

inst_14070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fff80; valaddr_reg:x3; val_offset:42210*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42210*0 + 3*246*FLEN/8, x4, x1, x2)

inst_14071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fffc0; valaddr_reg:x3; val_offset:42213*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42213*0 + 3*247*FLEN/8, x4, x1, x2)

inst_14072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fffe0; valaddr_reg:x3; val_offset:42216*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42216*0 + 3*248*FLEN/8, x4, x1, x2)

inst_14073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ffff0; valaddr_reg:x3; val_offset:42219*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42219*0 + 3*249*FLEN/8, x4, x1, x2)

inst_14074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ffff8; valaddr_reg:x3; val_offset:42222*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42222*0 + 3*250*FLEN/8, x4, x1, x2)

inst_14075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ffffc; valaddr_reg:x3; val_offset:42225*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42225*0 + 3*251*FLEN/8, x4, x1, x2)

inst_14076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7ffffe; valaddr_reg:x3; val_offset:42228*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42228*0 + 3*252*FLEN/8, x4, x1, x2)

inst_14077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7d7fffff; valaddr_reg:x3; val_offset:42231*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42231*0 + 3*253*FLEN/8, x4, x1, x2)

inst_14078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f000001; valaddr_reg:x3; val_offset:42234*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42234*0 + 3*254*FLEN/8, x4, x1, x2)

inst_14079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f000003; valaddr_reg:x3; val_offset:42237*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42237*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_14080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f000007; valaddr_reg:x3; val_offset:42240*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42240*0 + 3*256*FLEN/8, x4, x1, x2)

inst_14081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f199999; valaddr_reg:x3; val_offset:42243*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42243*0 + 3*257*FLEN/8, x4, x1, x2)

inst_14082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f249249; valaddr_reg:x3; val_offset:42246*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42246*0 + 3*258*FLEN/8, x4, x1, x2)

inst_14083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f333333; valaddr_reg:x3; val_offset:42249*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42249*0 + 3*259*FLEN/8, x4, x1, x2)

inst_14084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:42252*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42252*0 + 3*260*FLEN/8, x4, x1, x2)

inst_14085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:42255*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42255*0 + 3*261*FLEN/8, x4, x1, x2)

inst_14086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f444444; valaddr_reg:x3; val_offset:42258*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42258*0 + 3*262*FLEN/8, x4, x1, x2)

inst_14087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:42261*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42261*0 + 3*263*FLEN/8, x4, x1, x2)

inst_14088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:42264*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42264*0 + 3*264*FLEN/8, x4, x1, x2)

inst_14089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f666666; valaddr_reg:x3; val_offset:42267*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42267*0 + 3*265*FLEN/8, x4, x1, x2)

inst_14090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:42270*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42270*0 + 3*266*FLEN/8, x4, x1, x2)

inst_14091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:42273*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42273*0 + 3*267*FLEN/8, x4, x1, x2)

inst_14092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:42276*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42276*0 + 3*268*FLEN/8, x4, x1, x2)

inst_14093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:42279*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42279*0 + 3*269*FLEN/8, x4, x1, x2)

inst_14094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a000000; valaddr_reg:x3; val_offset:42282*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42282*0 + 3*270*FLEN/8, x4, x1, x2)

inst_14095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a000001; valaddr_reg:x3; val_offset:42285*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42285*0 + 3*271*FLEN/8, x4, x1, x2)

inst_14096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a000003; valaddr_reg:x3; val_offset:42288*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42288*0 + 3*272*FLEN/8, x4, x1, x2)

inst_14097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a000007; valaddr_reg:x3; val_offset:42291*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42291*0 + 3*273*FLEN/8, x4, x1, x2)

inst_14098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a00000f; valaddr_reg:x3; val_offset:42294*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42294*0 + 3*274*FLEN/8, x4, x1, x2)

inst_14099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a00001f; valaddr_reg:x3; val_offset:42297*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42297*0 + 3*275*FLEN/8, x4, x1, x2)

inst_14100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a00003f; valaddr_reg:x3; val_offset:42300*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42300*0 + 3*276*FLEN/8, x4, x1, x2)

inst_14101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a00007f; valaddr_reg:x3; val_offset:42303*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42303*0 + 3*277*FLEN/8, x4, x1, x2)

inst_14102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a0000ff; valaddr_reg:x3; val_offset:42306*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42306*0 + 3*278*FLEN/8, x4, x1, x2)

inst_14103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a0001ff; valaddr_reg:x3; val_offset:42309*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42309*0 + 3*279*FLEN/8, x4, x1, x2)

inst_14104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a0003ff; valaddr_reg:x3; val_offset:42312*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42312*0 + 3*280*FLEN/8, x4, x1, x2)

inst_14105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a0007ff; valaddr_reg:x3; val_offset:42315*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42315*0 + 3*281*FLEN/8, x4, x1, x2)

inst_14106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a000fff; valaddr_reg:x3; val_offset:42318*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42318*0 + 3*282*FLEN/8, x4, x1, x2)

inst_14107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a001fff; valaddr_reg:x3; val_offset:42321*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42321*0 + 3*283*FLEN/8, x4, x1, x2)

inst_14108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a003fff; valaddr_reg:x3; val_offset:42324*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42324*0 + 3*284*FLEN/8, x4, x1, x2)

inst_14109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a007fff; valaddr_reg:x3; val_offset:42327*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42327*0 + 3*285*FLEN/8, x4, x1, x2)

inst_14110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a00ffff; valaddr_reg:x3; val_offset:42330*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42330*0 + 3*286*FLEN/8, x4, x1, x2)

inst_14111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a01ffff; valaddr_reg:x3; val_offset:42333*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42333*0 + 3*287*FLEN/8, x4, x1, x2)

inst_14112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a03ffff; valaddr_reg:x3; val_offset:42336*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42336*0 + 3*288*FLEN/8, x4, x1, x2)

inst_14113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a07ffff; valaddr_reg:x3; val_offset:42339*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42339*0 + 3*289*FLEN/8, x4, x1, x2)

inst_14114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a0fffff; valaddr_reg:x3; val_offset:42342*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42342*0 + 3*290*FLEN/8, x4, x1, x2)

inst_14115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a1fffff; valaddr_reg:x3; val_offset:42345*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42345*0 + 3*291*FLEN/8, x4, x1, x2)

inst_14116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a3fffff; valaddr_reg:x3; val_offset:42348*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42348*0 + 3*292*FLEN/8, x4, x1, x2)

inst_14117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a400000; valaddr_reg:x3; val_offset:42351*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42351*0 + 3*293*FLEN/8, x4, x1, x2)

inst_14118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a600000; valaddr_reg:x3; val_offset:42354*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42354*0 + 3*294*FLEN/8, x4, x1, x2)

inst_14119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a700000; valaddr_reg:x3; val_offset:42357*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42357*0 + 3*295*FLEN/8, x4, x1, x2)

inst_14120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a780000; valaddr_reg:x3; val_offset:42360*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42360*0 + 3*296*FLEN/8, x4, x1, x2)

inst_14121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7c0000; valaddr_reg:x3; val_offset:42363*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42363*0 + 3*297*FLEN/8, x4, x1, x2)

inst_14122:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7e0000; valaddr_reg:x3; val_offset:42366*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42366*0 + 3*298*FLEN/8, x4, x1, x2)

inst_14123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7f0000; valaddr_reg:x3; val_offset:42369*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42369*0 + 3*299*FLEN/8, x4, x1, x2)

inst_14124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7f8000; valaddr_reg:x3; val_offset:42372*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42372*0 + 3*300*FLEN/8, x4, x1, x2)

inst_14125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fc000; valaddr_reg:x3; val_offset:42375*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42375*0 + 3*301*FLEN/8, x4, x1, x2)

inst_14126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fe000; valaddr_reg:x3; val_offset:42378*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42378*0 + 3*302*FLEN/8, x4, x1, x2)

inst_14127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ff000; valaddr_reg:x3; val_offset:42381*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42381*0 + 3*303*FLEN/8, x4, x1, x2)

inst_14128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ff800; valaddr_reg:x3; val_offset:42384*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42384*0 + 3*304*FLEN/8, x4, x1, x2)

inst_14129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ffc00; valaddr_reg:x3; val_offset:42387*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42387*0 + 3*305*FLEN/8, x4, x1, x2)

inst_14130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ffe00; valaddr_reg:x3; val_offset:42390*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42390*0 + 3*306*FLEN/8, x4, x1, x2)

inst_14131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fff00; valaddr_reg:x3; val_offset:42393*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42393*0 + 3*307*FLEN/8, x4, x1, x2)

inst_14132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fff80; valaddr_reg:x3; val_offset:42396*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42396*0 + 3*308*FLEN/8, x4, x1, x2)

inst_14133:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fffc0; valaddr_reg:x3; val_offset:42399*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42399*0 + 3*309*FLEN/8, x4, x1, x2)

inst_14134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fffe0; valaddr_reg:x3; val_offset:42402*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42402*0 + 3*310*FLEN/8, x4, x1, x2)

inst_14135:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ffff0; valaddr_reg:x3; val_offset:42405*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42405*0 + 3*311*FLEN/8, x4, x1, x2)

inst_14136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ffff8; valaddr_reg:x3; val_offset:42408*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42408*0 + 3*312*FLEN/8, x4, x1, x2)

inst_14137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ffffc; valaddr_reg:x3; val_offset:42411*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42411*0 + 3*313*FLEN/8, x4, x1, x2)

inst_14138:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7ffffe; valaddr_reg:x3; val_offset:42414*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42414*0 + 3*314*FLEN/8, x4, x1, x2)

inst_14139:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x2a7fffff; valaddr_reg:x3; val_offset:42417*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42417*0 + 3*315*FLEN/8, x4, x1, x2)

inst_14140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3f800001; valaddr_reg:x3; val_offset:42420*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42420*0 + 3*316*FLEN/8, x4, x1, x2)

inst_14141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3f800003; valaddr_reg:x3; val_offset:42423*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42423*0 + 3*317*FLEN/8, x4, x1, x2)

inst_14142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3f800007; valaddr_reg:x3; val_offset:42426*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42426*0 + 3*318*FLEN/8, x4, x1, x2)

inst_14143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3f999999; valaddr_reg:x3; val_offset:42429*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42429*0 + 3*319*FLEN/8, x4, x1, x2)

inst_14144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:42432*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42432*0 + 3*320*FLEN/8, x4, x1, x2)

inst_14145:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:42435*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42435*0 + 3*321*FLEN/8, x4, x1, x2)

inst_14146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:42438*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42438*0 + 3*322*FLEN/8, x4, x1, x2)

inst_14147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:42441*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42441*0 + 3*323*FLEN/8, x4, x1, x2)

inst_14148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:42444*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42444*0 + 3*324*FLEN/8, x4, x1, x2)

inst_14149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:42447*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42447*0 + 3*325*FLEN/8, x4, x1, x2)

inst_14150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:42450*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42450*0 + 3*326*FLEN/8, x4, x1, x2)

inst_14151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:42453*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42453*0 + 3*327*FLEN/8, x4, x1, x2)

inst_14152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:42456*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42456*0 + 3*328*FLEN/8, x4, x1, x2)

inst_14153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:42459*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42459*0 + 3*329*FLEN/8, x4, x1, x2)

inst_14154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:42462*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42462*0 + 3*330*FLEN/8, x4, x1, x2)

inst_14155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:42465*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42465*0 + 3*331*FLEN/8, x4, x1, x2)

inst_14156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:42468*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42468*0 + 3*332*FLEN/8, x4, x1, x2)

inst_14157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:42471*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42471*0 + 3*333*FLEN/8, x4, x1, x2)

inst_14158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:42474*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42474*0 + 3*334*FLEN/8, x4, x1, x2)

inst_14159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:42477*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42477*0 + 3*335*FLEN/8, x4, x1, x2)

inst_14160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:42480*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42480*0 + 3*336*FLEN/8, x4, x1, x2)

inst_14161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:42483*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42483*0 + 3*337*FLEN/8, x4, x1, x2)

inst_14162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:42486*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42486*0 + 3*338*FLEN/8, x4, x1, x2)

inst_14163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:42489*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42489*0 + 3*339*FLEN/8, x4, x1, x2)

inst_14164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:42492*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42492*0 + 3*340*FLEN/8, x4, x1, x2)

inst_14165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:42495*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42495*0 + 3*341*FLEN/8, x4, x1, x2)

inst_14166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:42498*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42498*0 + 3*342*FLEN/8, x4, x1, x2)

inst_14167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:42501*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42501*0 + 3*343*FLEN/8, x4, x1, x2)

inst_14168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:42504*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42504*0 + 3*344*FLEN/8, x4, x1, x2)

inst_14169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:42507*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42507*0 + 3*345*FLEN/8, x4, x1, x2)

inst_14170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:42510*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42510*0 + 3*346*FLEN/8, x4, x1, x2)

inst_14171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:42513*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42513*0 + 3*347*FLEN/8, x4, x1, x2)

inst_14172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3000000; valaddr_reg:x3; val_offset:42516*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42516*0 + 3*348*FLEN/8, x4, x1, x2)

inst_14173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3000001; valaddr_reg:x3; val_offset:42519*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42519*0 + 3*349*FLEN/8, x4, x1, x2)

inst_14174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3000003; valaddr_reg:x3; val_offset:42522*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42522*0 + 3*350*FLEN/8, x4, x1, x2)

inst_14175:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3000007; valaddr_reg:x3; val_offset:42525*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42525*0 + 3*351*FLEN/8, x4, x1, x2)

inst_14176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x300000f; valaddr_reg:x3; val_offset:42528*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42528*0 + 3*352*FLEN/8, x4, x1, x2)

inst_14177:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x300001f; valaddr_reg:x3; val_offset:42531*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42531*0 + 3*353*FLEN/8, x4, x1, x2)

inst_14178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x300003f; valaddr_reg:x3; val_offset:42534*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42534*0 + 3*354*FLEN/8, x4, x1, x2)

inst_14179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x300007f; valaddr_reg:x3; val_offset:42537*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42537*0 + 3*355*FLEN/8, x4, x1, x2)

inst_14180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x30000ff; valaddr_reg:x3; val_offset:42540*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42540*0 + 3*356*FLEN/8, x4, x1, x2)

inst_14181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x30001ff; valaddr_reg:x3; val_offset:42543*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42543*0 + 3*357*FLEN/8, x4, x1, x2)

inst_14182:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x30003ff; valaddr_reg:x3; val_offset:42546*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42546*0 + 3*358*FLEN/8, x4, x1, x2)

inst_14183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x30007ff; valaddr_reg:x3; val_offset:42549*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42549*0 + 3*359*FLEN/8, x4, x1, x2)

inst_14184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3000fff; valaddr_reg:x3; val_offset:42552*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42552*0 + 3*360*FLEN/8, x4, x1, x2)

inst_14185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3001fff; valaddr_reg:x3; val_offset:42555*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42555*0 + 3*361*FLEN/8, x4, x1, x2)

inst_14186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3003fff; valaddr_reg:x3; val_offset:42558*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42558*0 + 3*362*FLEN/8, x4, x1, x2)

inst_14187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3007fff; valaddr_reg:x3; val_offset:42561*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42561*0 + 3*363*FLEN/8, x4, x1, x2)

inst_14188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x300ffff; valaddr_reg:x3; val_offset:42564*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42564*0 + 3*364*FLEN/8, x4, x1, x2)

inst_14189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x301ffff; valaddr_reg:x3; val_offset:42567*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42567*0 + 3*365*FLEN/8, x4, x1, x2)

inst_14190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x303ffff; valaddr_reg:x3; val_offset:42570*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42570*0 + 3*366*FLEN/8, x4, x1, x2)

inst_14191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x307ffff; valaddr_reg:x3; val_offset:42573*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42573*0 + 3*367*FLEN/8, x4, x1, x2)

inst_14192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x30fffff; valaddr_reg:x3; val_offset:42576*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42576*0 + 3*368*FLEN/8, x4, x1, x2)

inst_14193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x31fffff; valaddr_reg:x3; val_offset:42579*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42579*0 + 3*369*FLEN/8, x4, x1, x2)

inst_14194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x33fffff; valaddr_reg:x3; val_offset:42582*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42582*0 + 3*370*FLEN/8, x4, x1, x2)

inst_14195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3400000; valaddr_reg:x3; val_offset:42585*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42585*0 + 3*371*FLEN/8, x4, x1, x2)

inst_14196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3600000; valaddr_reg:x3; val_offset:42588*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42588*0 + 3*372*FLEN/8, x4, x1, x2)

inst_14197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3700000; valaddr_reg:x3; val_offset:42591*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42591*0 + 3*373*FLEN/8, x4, x1, x2)

inst_14198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x3780000; valaddr_reg:x3; val_offset:42594*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42594*0 + 3*374*FLEN/8, x4, x1, x2)

inst_14199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37c0000; valaddr_reg:x3; val_offset:42597*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42597*0 + 3*375*FLEN/8, x4, x1, x2)

inst_14200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37e0000; valaddr_reg:x3; val_offset:42600*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42600*0 + 3*376*FLEN/8, x4, x1, x2)

inst_14201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37f0000; valaddr_reg:x3; val_offset:42603*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42603*0 + 3*377*FLEN/8, x4, x1, x2)

inst_14202:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37f8000; valaddr_reg:x3; val_offset:42606*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42606*0 + 3*378*FLEN/8, x4, x1, x2)

inst_14203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fc000; valaddr_reg:x3; val_offset:42609*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42609*0 + 3*379*FLEN/8, x4, x1, x2)

inst_14204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fe000; valaddr_reg:x3; val_offset:42612*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42612*0 + 3*380*FLEN/8, x4, x1, x2)

inst_14205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ff000; valaddr_reg:x3; val_offset:42615*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42615*0 + 3*381*FLEN/8, x4, x1, x2)

inst_14206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ff800; valaddr_reg:x3; val_offset:42618*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42618*0 + 3*382*FLEN/8, x4, x1, x2)

inst_14207:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ffc00; valaddr_reg:x3; val_offset:42621*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42621*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_14208:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ffe00; valaddr_reg:x3; val_offset:42624*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42624*0 + 3*384*FLEN/8, x4, x1, x2)

inst_14209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fff00; valaddr_reg:x3; val_offset:42627*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42627*0 + 3*385*FLEN/8, x4, x1, x2)

inst_14210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fff80; valaddr_reg:x3; val_offset:42630*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42630*0 + 3*386*FLEN/8, x4, x1, x2)

inst_14211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fffc0; valaddr_reg:x3; val_offset:42633*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42633*0 + 3*387*FLEN/8, x4, x1, x2)

inst_14212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fffe0; valaddr_reg:x3; val_offset:42636*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42636*0 + 3*388*FLEN/8, x4, x1, x2)

inst_14213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ffff0; valaddr_reg:x3; val_offset:42639*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42639*0 + 3*389*FLEN/8, x4, x1, x2)

inst_14214:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ffff8; valaddr_reg:x3; val_offset:42642*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42642*0 + 3*390*FLEN/8, x4, x1, x2)

inst_14215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ffffc; valaddr_reg:x3; val_offset:42645*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42645*0 + 3*391*FLEN/8, x4, x1, x2)

inst_14216:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37ffffe; valaddr_reg:x3; val_offset:42648*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42648*0 + 3*392*FLEN/8, x4, x1, x2)

inst_14217:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0;
op3val:0x37fffff; valaddr_reg:x3; val_offset:42651*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42651*0 + 3*393*FLEN/8, x4, x1, x2)

inst_14218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:42654*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42654*0 + 3*394*FLEN/8, x4, x1, x2)

inst_14219:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:42657*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42657*0 + 3*395*FLEN/8, x4, x1, x2)

inst_14220:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:42660*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42660*0 + 3*396*FLEN/8, x4, x1, x2)

inst_14221:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:42663*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42663*0 + 3*397*FLEN/8, x4, x1, x2)

inst_14222:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:42666*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42666*0 + 3*398*FLEN/8, x4, x1, x2)

inst_14223:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:42669*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42669*0 + 3*399*FLEN/8, x4, x1, x2)

inst_14224:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:42672*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42672*0 + 3*400*FLEN/8, x4, x1, x2)

inst_14225:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:42675*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42675*0 + 3*401*FLEN/8, x4, x1, x2)

inst_14226:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:42678*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42678*0 + 3*402*FLEN/8, x4, x1, x2)

inst_14227:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:42681*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42681*0 + 3*403*FLEN/8, x4, x1, x2)

inst_14228:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:42684*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42684*0 + 3*404*FLEN/8, x4, x1, x2)

inst_14229:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:42687*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42687*0 + 3*405*FLEN/8, x4, x1, x2)

inst_14230:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:42690*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42690*0 + 3*406*FLEN/8, x4, x1, x2)

inst_14231:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:42693*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42693*0 + 3*407*FLEN/8, x4, x1, x2)

inst_14232:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:42696*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42696*0 + 3*408*FLEN/8, x4, x1, x2)

inst_14233:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:42699*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42699*0 + 3*409*FLEN/8, x4, x1, x2)

inst_14234:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800000; valaddr_reg:x3; val_offset:42702*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42702*0 + 3*410*FLEN/8, x4, x1, x2)

inst_14235:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800001; valaddr_reg:x3; val_offset:42705*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42705*0 + 3*411*FLEN/8, x4, x1, x2)

inst_14236:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800003; valaddr_reg:x3; val_offset:42708*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42708*0 + 3*412*FLEN/8, x4, x1, x2)

inst_14237:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800007; valaddr_reg:x3; val_offset:42711*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42711*0 + 3*413*FLEN/8, x4, x1, x2)

inst_14238:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d80000f; valaddr_reg:x3; val_offset:42714*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42714*0 + 3*414*FLEN/8, x4, x1, x2)

inst_14239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d80001f; valaddr_reg:x3; val_offset:42717*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42717*0 + 3*415*FLEN/8, x4, x1, x2)

inst_14240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d80003f; valaddr_reg:x3; val_offset:42720*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42720*0 + 3*416*FLEN/8, x4, x1, x2)

inst_14241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d80007f; valaddr_reg:x3; val_offset:42723*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42723*0 + 3*417*FLEN/8, x4, x1, x2)

inst_14242:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d8000ff; valaddr_reg:x3; val_offset:42726*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42726*0 + 3*418*FLEN/8, x4, x1, x2)

inst_14243:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d8001ff; valaddr_reg:x3; val_offset:42729*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42729*0 + 3*419*FLEN/8, x4, x1, x2)

inst_14244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d8003ff; valaddr_reg:x3; val_offset:42732*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42732*0 + 3*420*FLEN/8, x4, x1, x2)

inst_14245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d8007ff; valaddr_reg:x3; val_offset:42735*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42735*0 + 3*421*FLEN/8, x4, x1, x2)

inst_14246:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800fff; valaddr_reg:x3; val_offset:42738*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42738*0 + 3*422*FLEN/8, x4, x1, x2)

inst_14247:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d801fff; valaddr_reg:x3; val_offset:42741*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42741*0 + 3*423*FLEN/8, x4, x1, x2)

inst_14248:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d803fff; valaddr_reg:x3; val_offset:42744*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42744*0 + 3*424*FLEN/8, x4, x1, x2)

inst_14249:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d807fff; valaddr_reg:x3; val_offset:42747*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42747*0 + 3*425*FLEN/8, x4, x1, x2)

inst_14250:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d80ffff; valaddr_reg:x3; val_offset:42750*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42750*0 + 3*426*FLEN/8, x4, x1, x2)

inst_14251:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d81ffff; valaddr_reg:x3; val_offset:42753*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42753*0 + 3*427*FLEN/8, x4, x1, x2)

inst_14252:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d83ffff; valaddr_reg:x3; val_offset:42756*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42756*0 + 3*428*FLEN/8, x4, x1, x2)

inst_14253:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d87ffff; valaddr_reg:x3; val_offset:42759*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42759*0 + 3*429*FLEN/8, x4, x1, x2)

inst_14254:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d8fffff; valaddr_reg:x3; val_offset:42762*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42762*0 + 3*430*FLEN/8, x4, x1, x2)

inst_14255:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d9fffff; valaddr_reg:x3; val_offset:42765*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42765*0 + 3*431*FLEN/8, x4, x1, x2)

inst_14256:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dbfffff; valaddr_reg:x3; val_offset:42768*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42768*0 + 3*432*FLEN/8, x4, x1, x2)

inst_14257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dc00000; valaddr_reg:x3; val_offset:42771*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42771*0 + 3*433*FLEN/8, x4, x1, x2)

inst_14258:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8de00000; valaddr_reg:x3; val_offset:42774*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42774*0 + 3*434*FLEN/8, x4, x1, x2)

inst_14259:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8df00000; valaddr_reg:x3; val_offset:42777*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42777*0 + 3*435*FLEN/8, x4, x1, x2)

inst_14260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8df80000; valaddr_reg:x3; val_offset:42780*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42780*0 + 3*436*FLEN/8, x4, x1, x2)

inst_14261:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfc0000; valaddr_reg:x3; val_offset:42783*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42783*0 + 3*437*FLEN/8, x4, x1, x2)

inst_14262:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfe0000; valaddr_reg:x3; val_offset:42786*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42786*0 + 3*438*FLEN/8, x4, x1, x2)

inst_14263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dff0000; valaddr_reg:x3; val_offset:42789*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42789*0 + 3*439*FLEN/8, x4, x1, x2)

inst_14264:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dff8000; valaddr_reg:x3; val_offset:42792*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42792*0 + 3*440*FLEN/8, x4, x1, x2)

inst_14265:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffc000; valaddr_reg:x3; val_offset:42795*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42795*0 + 3*441*FLEN/8, x4, x1, x2)

inst_14266:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffe000; valaddr_reg:x3; val_offset:42798*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42798*0 + 3*442*FLEN/8, x4, x1, x2)

inst_14267:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfff000; valaddr_reg:x3; val_offset:42801*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42801*0 + 3*443*FLEN/8, x4, x1, x2)

inst_14268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfff800; valaddr_reg:x3; val_offset:42804*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42804*0 + 3*444*FLEN/8, x4, x1, x2)

inst_14269:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfffc00; valaddr_reg:x3; val_offset:42807*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42807*0 + 3*445*FLEN/8, x4, x1, x2)

inst_14270:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfffe00; valaddr_reg:x3; val_offset:42810*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42810*0 + 3*446*FLEN/8, x4, x1, x2)

inst_14271:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffff00; valaddr_reg:x3; val_offset:42813*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42813*0 + 3*447*FLEN/8, x4, x1, x2)

inst_14272:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffff80; valaddr_reg:x3; val_offset:42816*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42816*0 + 3*448*FLEN/8, x4, x1, x2)

inst_14273:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffffc0; valaddr_reg:x3; val_offset:42819*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42819*0 + 3*449*FLEN/8, x4, x1, x2)

inst_14274:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffffe0; valaddr_reg:x3; val_offset:42822*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42822*0 + 3*450*FLEN/8, x4, x1, x2)

inst_14275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfffff0; valaddr_reg:x3; val_offset:42825*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42825*0 + 3*451*FLEN/8, x4, x1, x2)

inst_14276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfffff8; valaddr_reg:x3; val_offset:42828*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42828*0 + 3*452*FLEN/8, x4, x1, x2)

inst_14277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfffffc; valaddr_reg:x3; val_offset:42831*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42831*0 + 3*453*FLEN/8, x4, x1, x2)

inst_14278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfffffe; valaddr_reg:x3; val_offset:42834*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42834*0 + 3*454*FLEN/8, x4, x1, x2)

inst_14279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffffff; valaddr_reg:x3; val_offset:42837*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42837*0 + 3*455*FLEN/8, x4, x1, x2)

inst_14280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65000000; valaddr_reg:x3; val_offset:42840*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42840*0 + 3*456*FLEN/8, x4, x1, x2)

inst_14281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65000001; valaddr_reg:x3; val_offset:42843*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42843*0 + 3*457*FLEN/8, x4, x1, x2)

inst_14282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65000003; valaddr_reg:x3; val_offset:42846*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42846*0 + 3*458*FLEN/8, x4, x1, x2)

inst_14283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65000007; valaddr_reg:x3; val_offset:42849*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42849*0 + 3*459*FLEN/8, x4, x1, x2)

inst_14284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6500000f; valaddr_reg:x3; val_offset:42852*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42852*0 + 3*460*FLEN/8, x4, x1, x2)

inst_14285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6500001f; valaddr_reg:x3; val_offset:42855*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42855*0 + 3*461*FLEN/8, x4, x1, x2)

inst_14286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6500003f; valaddr_reg:x3; val_offset:42858*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42858*0 + 3*462*FLEN/8, x4, x1, x2)

inst_14287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6500007f; valaddr_reg:x3; val_offset:42861*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42861*0 + 3*463*FLEN/8, x4, x1, x2)

inst_14288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x650000ff; valaddr_reg:x3; val_offset:42864*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42864*0 + 3*464*FLEN/8, x4, x1, x2)

inst_14289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x650001ff; valaddr_reg:x3; val_offset:42867*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42867*0 + 3*465*FLEN/8, x4, x1, x2)

inst_14290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x650003ff; valaddr_reg:x3; val_offset:42870*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42870*0 + 3*466*FLEN/8, x4, x1, x2)

inst_14291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x650007ff; valaddr_reg:x3; val_offset:42873*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42873*0 + 3*467*FLEN/8, x4, x1, x2)

inst_14292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65000fff; valaddr_reg:x3; val_offset:42876*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42876*0 + 3*468*FLEN/8, x4, x1, x2)

inst_14293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65001fff; valaddr_reg:x3; val_offset:42879*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42879*0 + 3*469*FLEN/8, x4, x1, x2)

inst_14294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65003fff; valaddr_reg:x3; val_offset:42882*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42882*0 + 3*470*FLEN/8, x4, x1, x2)

inst_14295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65007fff; valaddr_reg:x3; val_offset:42885*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42885*0 + 3*471*FLEN/8, x4, x1, x2)

inst_14296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6500ffff; valaddr_reg:x3; val_offset:42888*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42888*0 + 3*472*FLEN/8, x4, x1, x2)

inst_14297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6501ffff; valaddr_reg:x3; val_offset:42891*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42891*0 + 3*473*FLEN/8, x4, x1, x2)

inst_14298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6503ffff; valaddr_reg:x3; val_offset:42894*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42894*0 + 3*474*FLEN/8, x4, x1, x2)

inst_14299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x6507ffff; valaddr_reg:x3; val_offset:42897*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42897*0 + 3*475*FLEN/8, x4, x1, x2)

inst_14300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x650fffff; valaddr_reg:x3; val_offset:42900*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42900*0 + 3*476*FLEN/8, x4, x1, x2)

inst_14301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x651fffff; valaddr_reg:x3; val_offset:42903*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42903*0 + 3*477*FLEN/8, x4, x1, x2)

inst_14302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x653fffff; valaddr_reg:x3; val_offset:42906*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42906*0 + 3*478*FLEN/8, x4, x1, x2)

inst_14303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65400000; valaddr_reg:x3; val_offset:42909*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42909*0 + 3*479*FLEN/8, x4, x1, x2)

inst_14304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65600000; valaddr_reg:x3; val_offset:42912*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42912*0 + 3*480*FLEN/8, x4, x1, x2)

inst_14305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65700000; valaddr_reg:x3; val_offset:42915*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42915*0 + 3*481*FLEN/8, x4, x1, x2)

inst_14306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x65780000; valaddr_reg:x3; val_offset:42918*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42918*0 + 3*482*FLEN/8, x4, x1, x2)

inst_14307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657c0000; valaddr_reg:x3; val_offset:42921*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42921*0 + 3*483*FLEN/8, x4, x1, x2)

inst_14308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657e0000; valaddr_reg:x3; val_offset:42924*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42924*0 + 3*484*FLEN/8, x4, x1, x2)

inst_14309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657f0000; valaddr_reg:x3; val_offset:42927*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42927*0 + 3*485*FLEN/8, x4, x1, x2)

inst_14310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657f8000; valaddr_reg:x3; val_offset:42930*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42930*0 + 3*486*FLEN/8, x4, x1, x2)

inst_14311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fc000; valaddr_reg:x3; val_offset:42933*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42933*0 + 3*487*FLEN/8, x4, x1, x2)

inst_14312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fe000; valaddr_reg:x3; val_offset:42936*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42936*0 + 3*488*FLEN/8, x4, x1, x2)

inst_14313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ff000; valaddr_reg:x3; val_offset:42939*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42939*0 + 3*489*FLEN/8, x4, x1, x2)

inst_14314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ff800; valaddr_reg:x3; val_offset:42942*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42942*0 + 3*490*FLEN/8, x4, x1, x2)

inst_14315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ffc00; valaddr_reg:x3; val_offset:42945*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42945*0 + 3*491*FLEN/8, x4, x1, x2)

inst_14316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ffe00; valaddr_reg:x3; val_offset:42948*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42948*0 + 3*492*FLEN/8, x4, x1, x2)

inst_14317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fff00; valaddr_reg:x3; val_offset:42951*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42951*0 + 3*493*FLEN/8, x4, x1, x2)

inst_14318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fff80; valaddr_reg:x3; val_offset:42954*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42954*0 + 3*494*FLEN/8, x4, x1, x2)

inst_14319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fffc0; valaddr_reg:x3; val_offset:42957*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42957*0 + 3*495*FLEN/8, x4, x1, x2)

inst_14320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fffe0; valaddr_reg:x3; val_offset:42960*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42960*0 + 3*496*FLEN/8, x4, x1, x2)

inst_14321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ffff0; valaddr_reg:x3; val_offset:42963*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42963*0 + 3*497*FLEN/8, x4, x1, x2)

inst_14322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ffff8; valaddr_reg:x3; val_offset:42966*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42966*0 + 3*498*FLEN/8, x4, x1, x2)

inst_14323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ffffc; valaddr_reg:x3; val_offset:42969*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42969*0 + 3*499*FLEN/8, x4, x1, x2)

inst_14324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657ffffe; valaddr_reg:x3; val_offset:42972*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42972*0 + 3*500*FLEN/8, x4, x1, x2)

inst_14325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x657fffff; valaddr_reg:x3; val_offset:42975*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42975*0 + 3*501*FLEN/8, x4, x1, x2)

inst_14326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f000001; valaddr_reg:x3; val_offset:42978*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42978*0 + 3*502*FLEN/8, x4, x1, x2)

inst_14327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f000003; valaddr_reg:x3; val_offset:42981*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42981*0 + 3*503*FLEN/8, x4, x1, x2)

inst_14328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f000007; valaddr_reg:x3; val_offset:42984*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42984*0 + 3*504*FLEN/8, x4, x1, x2)

inst_14329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f199999; valaddr_reg:x3; val_offset:42987*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42987*0 + 3*505*FLEN/8, x4, x1, x2)

inst_14330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f249249; valaddr_reg:x3; val_offset:42990*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42990*0 + 3*506*FLEN/8, x4, x1, x2)

inst_14331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f333333; valaddr_reg:x3; val_offset:42993*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42993*0 + 3*507*FLEN/8, x4, x1, x2)

inst_14332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:42996*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42996*0 + 3*508*FLEN/8, x4, x1, x2)

inst_14333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:42999*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42999*0 + 3*509*FLEN/8, x4, x1, x2)

inst_14334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f444444; valaddr_reg:x3; val_offset:43002*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43002*0 + 3*510*FLEN/8, x4, x1, x2)

inst_14335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:43005*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43005*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_14336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:43008*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43008*0 + 3*512*FLEN/8, x4, x1, x2)

inst_14337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f666666; valaddr_reg:x3; val_offset:43011*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43011*0 + 3*513*FLEN/8, x4, x1, x2)

inst_14338:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:43014*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43014*0 + 3*514*FLEN/8, x4, x1, x2)

inst_14339:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:43017*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43017*0 + 3*515*FLEN/8, x4, x1, x2)

inst_14340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:43020*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43020*0 + 3*516*FLEN/8, x4, x1, x2)

inst_14341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:43023*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43023*0 + 3*517*FLEN/8, x4, x1, x2)

inst_14342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbf800001; valaddr_reg:x3; val_offset:43026*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43026*0 + 3*518*FLEN/8, x4, x1, x2)

inst_14343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbf800003; valaddr_reg:x3; val_offset:43029*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43029*0 + 3*519*FLEN/8, x4, x1, x2)

inst_14344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbf800007; valaddr_reg:x3; val_offset:43032*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43032*0 + 3*520*FLEN/8, x4, x1, x2)

inst_14345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbf999999; valaddr_reg:x3; val_offset:43035*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43035*0 + 3*521*FLEN/8, x4, x1, x2)

inst_14346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:43038*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43038*0 + 3*522*FLEN/8, x4, x1, x2)

inst_14347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:43041*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43041*0 + 3*523*FLEN/8, x4, x1, x2)

inst_14348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43044*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43044*0 + 3*524*FLEN/8, x4, x1, x2)

inst_14349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43047*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43047*0 + 3*525*FLEN/8, x4, x1, x2)

inst_14350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:43050*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43050*0 + 3*526*FLEN/8, x4, x1, x2)

inst_14351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43053*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43053*0 + 3*527*FLEN/8, x4, x1, x2)

inst_14352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43056*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43056*0 + 3*528*FLEN/8, x4, x1, x2)

inst_14353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:43059*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43059*0 + 3*529*FLEN/8, x4, x1, x2)

inst_14354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43062*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43062*0 + 3*530*FLEN/8, x4, x1, x2)

inst_14355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:43065*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43065*0 + 3*531*FLEN/8, x4, x1, x2)

inst_14356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:43068*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43068*0 + 3*532*FLEN/8, x4, x1, x2)

inst_14357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:43071*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43071*0 + 3*533*FLEN/8, x4, x1, x2)

inst_14358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5800000; valaddr_reg:x3; val_offset:43074*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43074*0 + 3*534*FLEN/8, x4, x1, x2)

inst_14359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5800001; valaddr_reg:x3; val_offset:43077*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43077*0 + 3*535*FLEN/8, x4, x1, x2)

inst_14360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5800003; valaddr_reg:x3; val_offset:43080*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43080*0 + 3*536*FLEN/8, x4, x1, x2)

inst_14361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5800007; valaddr_reg:x3; val_offset:43083*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43083*0 + 3*537*FLEN/8, x4, x1, x2)

inst_14362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc580000f; valaddr_reg:x3; val_offset:43086*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43086*0 + 3*538*FLEN/8, x4, x1, x2)

inst_14363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc580001f; valaddr_reg:x3; val_offset:43089*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43089*0 + 3*539*FLEN/8, x4, x1, x2)

inst_14364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc580003f; valaddr_reg:x3; val_offset:43092*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43092*0 + 3*540*FLEN/8, x4, x1, x2)

inst_14365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc580007f; valaddr_reg:x3; val_offset:43095*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43095*0 + 3*541*FLEN/8, x4, x1, x2)

inst_14366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc58000ff; valaddr_reg:x3; val_offset:43098*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43098*0 + 3*542*FLEN/8, x4, x1, x2)

inst_14367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc58001ff; valaddr_reg:x3; val_offset:43101*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43101*0 + 3*543*FLEN/8, x4, x1, x2)

inst_14368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc58003ff; valaddr_reg:x3; val_offset:43104*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43104*0 + 3*544*FLEN/8, x4, x1, x2)

inst_14369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc58007ff; valaddr_reg:x3; val_offset:43107*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43107*0 + 3*545*FLEN/8, x4, x1, x2)

inst_14370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5800fff; valaddr_reg:x3; val_offset:43110*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43110*0 + 3*546*FLEN/8, x4, x1, x2)

inst_14371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5801fff; valaddr_reg:x3; val_offset:43113*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43113*0 + 3*547*FLEN/8, x4, x1, x2)

inst_14372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5803fff; valaddr_reg:x3; val_offset:43116*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43116*0 + 3*548*FLEN/8, x4, x1, x2)

inst_14373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5807fff; valaddr_reg:x3; val_offset:43119*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43119*0 + 3*549*FLEN/8, x4, x1, x2)

inst_14374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc580ffff; valaddr_reg:x3; val_offset:43122*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43122*0 + 3*550*FLEN/8, x4, x1, x2)

inst_14375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc581ffff; valaddr_reg:x3; val_offset:43125*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43125*0 + 3*551*FLEN/8, x4, x1, x2)

inst_14376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc583ffff; valaddr_reg:x3; val_offset:43128*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43128*0 + 3*552*FLEN/8, x4, x1, x2)

inst_14377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc587ffff; valaddr_reg:x3; val_offset:43131*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43131*0 + 3*553*FLEN/8, x4, x1, x2)

inst_14378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc58fffff; valaddr_reg:x3; val_offset:43134*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43134*0 + 3*554*FLEN/8, x4, x1, x2)

inst_14379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc59fffff; valaddr_reg:x3; val_offset:43137*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43137*0 + 3*555*FLEN/8, x4, x1, x2)

inst_14380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5bfffff; valaddr_reg:x3; val_offset:43140*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43140*0 + 3*556*FLEN/8, x4, x1, x2)

inst_14381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5c00000; valaddr_reg:x3; val_offset:43143*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43143*0 + 3*557*FLEN/8, x4, x1, x2)

inst_14382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5e00000; valaddr_reg:x3; val_offset:43146*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43146*0 + 3*558*FLEN/8, x4, x1, x2)

inst_14383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5f00000; valaddr_reg:x3; val_offset:43149*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43149*0 + 3*559*FLEN/8, x4, x1, x2)

inst_14384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5f80000; valaddr_reg:x3; val_offset:43152*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43152*0 + 3*560*FLEN/8, x4, x1, x2)

inst_14385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fc0000; valaddr_reg:x3; val_offset:43155*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43155*0 + 3*561*FLEN/8, x4, x1, x2)

inst_14386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fe0000; valaddr_reg:x3; val_offset:43158*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43158*0 + 3*562*FLEN/8, x4, x1, x2)

inst_14387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ff0000; valaddr_reg:x3; val_offset:43161*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43161*0 + 3*563*FLEN/8, x4, x1, x2)

inst_14388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ff8000; valaddr_reg:x3; val_offset:43164*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43164*0 + 3*564*FLEN/8, x4, x1, x2)

inst_14389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffc000; valaddr_reg:x3; val_offset:43167*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43167*0 + 3*565*FLEN/8, x4, x1, x2)

inst_14390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffe000; valaddr_reg:x3; val_offset:43170*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43170*0 + 3*566*FLEN/8, x4, x1, x2)

inst_14391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fff000; valaddr_reg:x3; val_offset:43173*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43173*0 + 3*567*FLEN/8, x4, x1, x2)

inst_14392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fff800; valaddr_reg:x3; val_offset:43176*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43176*0 + 3*568*FLEN/8, x4, x1, x2)

inst_14393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fffc00; valaddr_reg:x3; val_offset:43179*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43179*0 + 3*569*FLEN/8, x4, x1, x2)

inst_14394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fffe00; valaddr_reg:x3; val_offset:43182*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43182*0 + 3*570*FLEN/8, x4, x1, x2)

inst_14395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffff00; valaddr_reg:x3; val_offset:43185*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43185*0 + 3*571*FLEN/8, x4, x1, x2)

inst_14396:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffff80; valaddr_reg:x3; val_offset:43188*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43188*0 + 3*572*FLEN/8, x4, x1, x2)

inst_14397:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffffc0; valaddr_reg:x3; val_offset:43191*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43191*0 + 3*573*FLEN/8, x4, x1, x2)

inst_14398:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffffe0; valaddr_reg:x3; val_offset:43194*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43194*0 + 3*574*FLEN/8, x4, x1, x2)

inst_14399:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fffff0; valaddr_reg:x3; val_offset:43197*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43197*0 + 3*575*FLEN/8, x4, x1, x2)

inst_14400:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fffff8; valaddr_reg:x3; val_offset:43200*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43200*0 + 3*576*FLEN/8, x4, x1, x2)

inst_14401:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fffffc; valaddr_reg:x3; val_offset:43203*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43203*0 + 3*577*FLEN/8, x4, x1, x2)

inst_14402:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5fffffe; valaddr_reg:x3; val_offset:43206*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43206*0 + 3*578*FLEN/8, x4, x1, x2)

inst_14403:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6;
op3val:0xc5ffffff; valaddr_reg:x3; val_offset:43209*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43209*0 + 3*579*FLEN/8, x4, x1, x2)

inst_14404:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbf800001; valaddr_reg:x3; val_offset:43212*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43212*0 + 3*580*FLEN/8, x4, x1, x2)

inst_14405:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbf800003; valaddr_reg:x3; val_offset:43215*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43215*0 + 3*581*FLEN/8, x4, x1, x2)

inst_14406:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbf800007; valaddr_reg:x3; val_offset:43218*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43218*0 + 3*582*FLEN/8, x4, x1, x2)

inst_14407:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbf999999; valaddr_reg:x3; val_offset:43221*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43221*0 + 3*583*FLEN/8, x4, x1, x2)

inst_14408:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:43224*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43224*0 + 3*584*FLEN/8, x4, x1, x2)

inst_14409:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:43227*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43227*0 + 3*585*FLEN/8, x4, x1, x2)

inst_14410:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43230*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43230*0 + 3*586*FLEN/8, x4, x1, x2)

inst_14411:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43233*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43233*0 + 3*587*FLEN/8, x4, x1, x2)

inst_14412:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:43236*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43236*0 + 3*588*FLEN/8, x4, x1, x2)

inst_14413:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43239*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43239*0 + 3*589*FLEN/8, x4, x1, x2)

inst_14414:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43242*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43242*0 + 3*590*FLEN/8, x4, x1, x2)

inst_14415:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:43245*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43245*0 + 3*591*FLEN/8, x4, x1, x2)

inst_14416:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43248*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43248*0 + 3*592*FLEN/8, x4, x1, x2)

inst_14417:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:43251*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43251*0 + 3*593*FLEN/8, x4, x1, x2)

inst_14418:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:43254*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43254*0 + 3*594*FLEN/8, x4, x1, x2)

inst_14419:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:43257*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43257*0 + 3*595*FLEN/8, x4, x1, x2)

inst_14420:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce000000; valaddr_reg:x3; val_offset:43260*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43260*0 + 3*596*FLEN/8, x4, x1, x2)

inst_14421:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce000001; valaddr_reg:x3; val_offset:43263*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43263*0 + 3*597*FLEN/8, x4, x1, x2)

inst_14422:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce000003; valaddr_reg:x3; val_offset:43266*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43266*0 + 3*598*FLEN/8, x4, x1, x2)

inst_14423:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce000007; valaddr_reg:x3; val_offset:43269*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43269*0 + 3*599*FLEN/8, x4, x1, x2)

inst_14424:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce00000f; valaddr_reg:x3; val_offset:43272*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43272*0 + 3*600*FLEN/8, x4, x1, x2)

inst_14425:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce00001f; valaddr_reg:x3; val_offset:43275*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43275*0 + 3*601*FLEN/8, x4, x1, x2)

inst_14426:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce00003f; valaddr_reg:x3; val_offset:43278*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43278*0 + 3*602*FLEN/8, x4, x1, x2)

inst_14427:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce00007f; valaddr_reg:x3; val_offset:43281*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43281*0 + 3*603*FLEN/8, x4, x1, x2)

inst_14428:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce0000ff; valaddr_reg:x3; val_offset:43284*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43284*0 + 3*604*FLEN/8, x4, x1, x2)

inst_14429:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce0001ff; valaddr_reg:x3; val_offset:43287*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43287*0 + 3*605*FLEN/8, x4, x1, x2)

inst_14430:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce0003ff; valaddr_reg:x3; val_offset:43290*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43290*0 + 3*606*FLEN/8, x4, x1, x2)

inst_14431:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce0007ff; valaddr_reg:x3; val_offset:43293*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43293*0 + 3*607*FLEN/8, x4, x1, x2)

inst_14432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce000fff; valaddr_reg:x3; val_offset:43296*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43296*0 + 3*608*FLEN/8, x4, x1, x2)

inst_14433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce001fff; valaddr_reg:x3; val_offset:43299*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43299*0 + 3*609*FLEN/8, x4, x1, x2)

inst_14434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce003fff; valaddr_reg:x3; val_offset:43302*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43302*0 + 3*610*FLEN/8, x4, x1, x2)

inst_14435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce007fff; valaddr_reg:x3; val_offset:43305*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43305*0 + 3*611*FLEN/8, x4, x1, x2)

inst_14436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce00ffff; valaddr_reg:x3; val_offset:43308*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43308*0 + 3*612*FLEN/8, x4, x1, x2)

inst_14437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce01ffff; valaddr_reg:x3; val_offset:43311*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43311*0 + 3*613*FLEN/8, x4, x1, x2)

inst_14438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce03ffff; valaddr_reg:x3; val_offset:43314*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43314*0 + 3*614*FLEN/8, x4, x1, x2)

inst_14439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce07ffff; valaddr_reg:x3; val_offset:43317*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43317*0 + 3*615*FLEN/8, x4, x1, x2)

inst_14440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce0fffff; valaddr_reg:x3; val_offset:43320*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43320*0 + 3*616*FLEN/8, x4, x1, x2)

inst_14441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce1fffff; valaddr_reg:x3; val_offset:43323*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43323*0 + 3*617*FLEN/8, x4, x1, x2)

inst_14442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce3fffff; valaddr_reg:x3; val_offset:43326*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43326*0 + 3*618*FLEN/8, x4, x1, x2)

inst_14443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce400000; valaddr_reg:x3; val_offset:43329*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43329*0 + 3*619*FLEN/8, x4, x1, x2)

inst_14444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce600000; valaddr_reg:x3; val_offset:43332*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43332*0 + 3*620*FLEN/8, x4, x1, x2)

inst_14445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce700000; valaddr_reg:x3; val_offset:43335*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43335*0 + 3*621*FLEN/8, x4, x1, x2)

inst_14446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce780000; valaddr_reg:x3; val_offset:43338*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43338*0 + 3*622*FLEN/8, x4, x1, x2)

inst_14447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7c0000; valaddr_reg:x3; val_offset:43341*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43341*0 + 3*623*FLEN/8, x4, x1, x2)

inst_14448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7e0000; valaddr_reg:x3; val_offset:43344*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43344*0 + 3*624*FLEN/8, x4, x1, x2)

inst_14449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7f0000; valaddr_reg:x3; val_offset:43347*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43347*0 + 3*625*FLEN/8, x4, x1, x2)

inst_14450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7f8000; valaddr_reg:x3; val_offset:43350*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43350*0 + 3*626*FLEN/8, x4, x1, x2)

inst_14451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fc000; valaddr_reg:x3; val_offset:43353*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43353*0 + 3*627*FLEN/8, x4, x1, x2)

inst_14452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fe000; valaddr_reg:x3; val_offset:43356*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43356*0 + 3*628*FLEN/8, x4, x1, x2)

inst_14453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ff000; valaddr_reg:x3; val_offset:43359*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43359*0 + 3*629*FLEN/8, x4, x1, x2)

inst_14454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ff800; valaddr_reg:x3; val_offset:43362*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43362*0 + 3*630*FLEN/8, x4, x1, x2)

inst_14455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ffc00; valaddr_reg:x3; val_offset:43365*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43365*0 + 3*631*FLEN/8, x4, x1, x2)

inst_14456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ffe00; valaddr_reg:x3; val_offset:43368*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43368*0 + 3*632*FLEN/8, x4, x1, x2)

inst_14457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fff00; valaddr_reg:x3; val_offset:43371*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43371*0 + 3*633*FLEN/8, x4, x1, x2)

inst_14458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fff80; valaddr_reg:x3; val_offset:43374*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43374*0 + 3*634*FLEN/8, x4, x1, x2)

inst_14459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fffc0; valaddr_reg:x3; val_offset:43377*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43377*0 + 3*635*FLEN/8, x4, x1, x2)

inst_14460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fffe0; valaddr_reg:x3; val_offset:43380*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43380*0 + 3*636*FLEN/8, x4, x1, x2)

inst_14461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ffff0; valaddr_reg:x3; val_offset:43383*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43383*0 + 3*637*FLEN/8, x4, x1, x2)

inst_14462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ffff8; valaddr_reg:x3; val_offset:43386*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43386*0 + 3*638*FLEN/8, x4, x1, x2)

inst_14463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ffffc; valaddr_reg:x3; val_offset:43389*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43389*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_14464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7ffffe; valaddr_reg:x3; val_offset:43392*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43392*0 + 3*640*FLEN/8, x4, x1, x2)

inst_14465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4;
op3val:0xce7fffff; valaddr_reg:x3; val_offset:43395*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43395*0 + 3*641*FLEN/8, x4, x1, x2)

inst_14466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e800000; valaddr_reg:x3; val_offset:43398*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43398*0 + 3*642*FLEN/8, x4, x1, x2)

inst_14467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e800001; valaddr_reg:x3; val_offset:43401*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43401*0 + 3*643*FLEN/8, x4, x1, x2)

inst_14468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e800003; valaddr_reg:x3; val_offset:43404*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43404*0 + 3*644*FLEN/8, x4, x1, x2)

inst_14469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e800007; valaddr_reg:x3; val_offset:43407*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43407*0 + 3*645*FLEN/8, x4, x1, x2)

inst_14470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e80000f; valaddr_reg:x3; val_offset:43410*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43410*0 + 3*646*FLEN/8, x4, x1, x2)

inst_14471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e80001f; valaddr_reg:x3; val_offset:43413*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43413*0 + 3*647*FLEN/8, x4, x1, x2)

inst_14472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e80003f; valaddr_reg:x3; val_offset:43416*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43416*0 + 3*648*FLEN/8, x4, x1, x2)

inst_14473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e80007f; valaddr_reg:x3; val_offset:43419*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43419*0 + 3*649*FLEN/8, x4, x1, x2)

inst_14474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e8000ff; valaddr_reg:x3; val_offset:43422*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43422*0 + 3*650*FLEN/8, x4, x1, x2)

inst_14475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e8001ff; valaddr_reg:x3; val_offset:43425*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43425*0 + 3*651*FLEN/8, x4, x1, x2)

inst_14476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e8003ff; valaddr_reg:x3; val_offset:43428*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43428*0 + 3*652*FLEN/8, x4, x1, x2)

inst_14477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e8007ff; valaddr_reg:x3; val_offset:43431*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43431*0 + 3*653*FLEN/8, x4, x1, x2)

inst_14478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e800fff; valaddr_reg:x3; val_offset:43434*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43434*0 + 3*654*FLEN/8, x4, x1, x2)

inst_14479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e801fff; valaddr_reg:x3; val_offset:43437*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43437*0 + 3*655*FLEN/8, x4, x1, x2)

inst_14480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e803fff; valaddr_reg:x3; val_offset:43440*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43440*0 + 3*656*FLEN/8, x4, x1, x2)

inst_14481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e807fff; valaddr_reg:x3; val_offset:43443*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43443*0 + 3*657*FLEN/8, x4, x1, x2)

inst_14482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e80ffff; valaddr_reg:x3; val_offset:43446*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43446*0 + 3*658*FLEN/8, x4, x1, x2)

inst_14483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e81ffff; valaddr_reg:x3; val_offset:43449*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43449*0 + 3*659*FLEN/8, x4, x1, x2)

inst_14484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e83ffff; valaddr_reg:x3; val_offset:43452*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43452*0 + 3*660*FLEN/8, x4, x1, x2)

inst_14485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e87ffff; valaddr_reg:x3; val_offset:43455*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43455*0 + 3*661*FLEN/8, x4, x1, x2)

inst_14486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e8fffff; valaddr_reg:x3; val_offset:43458*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43458*0 + 3*662*FLEN/8, x4, x1, x2)

inst_14487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2e9fffff; valaddr_reg:x3; val_offset:43461*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43461*0 + 3*663*FLEN/8, x4, x1, x2)

inst_14488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2ebfffff; valaddr_reg:x3; val_offset:43464*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43464*0 + 3*664*FLEN/8, x4, x1, x2)

inst_14489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2ec00000; valaddr_reg:x3; val_offset:43467*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43467*0 + 3*665*FLEN/8, x4, x1, x2)

inst_14490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2ee00000; valaddr_reg:x3; val_offset:43470*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43470*0 + 3*666*FLEN/8, x4, x1, x2)

inst_14491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2ef00000; valaddr_reg:x3; val_offset:43473*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43473*0 + 3*667*FLEN/8, x4, x1, x2)

inst_14492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2ef80000; valaddr_reg:x3; val_offset:43476*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43476*0 + 3*668*FLEN/8, x4, x1, x2)

inst_14493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efc0000; valaddr_reg:x3; val_offset:43479*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43479*0 + 3*669*FLEN/8, x4, x1, x2)

inst_14494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efe0000; valaddr_reg:x3; val_offset:43482*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43482*0 + 3*670*FLEN/8, x4, x1, x2)

inst_14495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2eff0000; valaddr_reg:x3; val_offset:43485*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43485*0 + 3*671*FLEN/8, x4, x1, x2)

inst_14496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2eff8000; valaddr_reg:x3; val_offset:43488*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43488*0 + 3*672*FLEN/8, x4, x1, x2)

inst_14497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effc000; valaddr_reg:x3; val_offset:43491*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43491*0 + 3*673*FLEN/8, x4, x1, x2)

inst_14498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effe000; valaddr_reg:x3; val_offset:43494*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43494*0 + 3*674*FLEN/8, x4, x1, x2)

inst_14499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efff000; valaddr_reg:x3; val_offset:43497*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43497*0 + 3*675*FLEN/8, x4, x1, x2)

inst_14500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efff800; valaddr_reg:x3; val_offset:43500*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43500*0 + 3*676*FLEN/8, x4, x1, x2)

inst_14501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efffc00; valaddr_reg:x3; val_offset:43503*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43503*0 + 3*677*FLEN/8, x4, x1, x2)

inst_14502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efffe00; valaddr_reg:x3; val_offset:43506*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43506*0 + 3*678*FLEN/8, x4, x1, x2)

inst_14503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effff00; valaddr_reg:x3; val_offset:43509*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43509*0 + 3*679*FLEN/8, x4, x1, x2)

inst_14504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effff80; valaddr_reg:x3; val_offset:43512*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43512*0 + 3*680*FLEN/8, x4, x1, x2)

inst_14505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effffc0; valaddr_reg:x3; val_offset:43515*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43515*0 + 3*681*FLEN/8, x4, x1, x2)

inst_14506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effffe0; valaddr_reg:x3; val_offset:43518*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43518*0 + 3*682*FLEN/8, x4, x1, x2)

inst_14507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efffff0; valaddr_reg:x3; val_offset:43521*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43521*0 + 3*683*FLEN/8, x4, x1, x2)

inst_14508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efffff8; valaddr_reg:x3; val_offset:43524*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43524*0 + 3*684*FLEN/8, x4, x1, x2)

inst_14509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efffffc; valaddr_reg:x3; val_offset:43527*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43527*0 + 3*685*FLEN/8, x4, x1, x2)

inst_14510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2efffffe; valaddr_reg:x3; val_offset:43530*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43530*0 + 3*686*FLEN/8, x4, x1, x2)

inst_14511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x2effffff; valaddr_reg:x3; val_offset:43533*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43533*0 + 3*687*FLEN/8, x4, x1, x2)

inst_14512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3f800001; valaddr_reg:x3; val_offset:43536*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43536*0 + 3*688*FLEN/8, x4, x1, x2)

inst_14513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3f800003; valaddr_reg:x3; val_offset:43539*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43539*0 + 3*689*FLEN/8, x4, x1, x2)

inst_14514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3f800007; valaddr_reg:x3; val_offset:43542*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43542*0 + 3*690*FLEN/8, x4, x1, x2)

inst_14515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3f999999; valaddr_reg:x3; val_offset:43545*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43545*0 + 3*691*FLEN/8, x4, x1, x2)

inst_14516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:43548*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43548*0 + 3*692*FLEN/8, x4, x1, x2)

inst_14517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:43551*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43551*0 + 3*693*FLEN/8, x4, x1, x2)

inst_14518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:43554*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43554*0 + 3*694*FLEN/8, x4, x1, x2)

inst_14519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:43557*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43557*0 + 3*695*FLEN/8, x4, x1, x2)

inst_14520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:43560*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43560*0 + 3*696*FLEN/8, x4, x1, x2)

inst_14521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:43563*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43563*0 + 3*697*FLEN/8, x4, x1, x2)

inst_14522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:43566*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43566*0 + 3*698*FLEN/8, x4, x1, x2)

inst_14523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:43569*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43569*0 + 3*699*FLEN/8, x4, x1, x2)

inst_14524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:43572*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43572*0 + 3*700*FLEN/8, x4, x1, x2)

inst_14525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:43575*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43575*0 + 3*701*FLEN/8, x4, x1, x2)

inst_14526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:43578*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43578*0 + 3*702*FLEN/8, x4, x1, x2)

inst_14527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:43581*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43581*0 + 3*703*FLEN/8, x4, x1, x2)

inst_14528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77000000; valaddr_reg:x3; val_offset:43584*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43584*0 + 3*704*FLEN/8, x4, x1, x2)

inst_14529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77000001; valaddr_reg:x3; val_offset:43587*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43587*0 + 3*705*FLEN/8, x4, x1, x2)

inst_14530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77000003; valaddr_reg:x3; val_offset:43590*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43590*0 + 3*706*FLEN/8, x4, x1, x2)

inst_14531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77000007; valaddr_reg:x3; val_offset:43593*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43593*0 + 3*707*FLEN/8, x4, x1, x2)

inst_14532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7700000f; valaddr_reg:x3; val_offset:43596*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43596*0 + 3*708*FLEN/8, x4, x1, x2)

inst_14533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7700001f; valaddr_reg:x3; val_offset:43599*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43599*0 + 3*709*FLEN/8, x4, x1, x2)

inst_14534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7700003f; valaddr_reg:x3; val_offset:43602*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43602*0 + 3*710*FLEN/8, x4, x1, x2)

inst_14535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7700007f; valaddr_reg:x3; val_offset:43605*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43605*0 + 3*711*FLEN/8, x4, x1, x2)

inst_14536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x770000ff; valaddr_reg:x3; val_offset:43608*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43608*0 + 3*712*FLEN/8, x4, x1, x2)

inst_14537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x770001ff; valaddr_reg:x3; val_offset:43611*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43611*0 + 3*713*FLEN/8, x4, x1, x2)

inst_14538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x770003ff; valaddr_reg:x3; val_offset:43614*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43614*0 + 3*714*FLEN/8, x4, x1, x2)

inst_14539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x770007ff; valaddr_reg:x3; val_offset:43617*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43617*0 + 3*715*FLEN/8, x4, x1, x2)

inst_14540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77000fff; valaddr_reg:x3; val_offset:43620*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43620*0 + 3*716*FLEN/8, x4, x1, x2)

inst_14541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77001fff; valaddr_reg:x3; val_offset:43623*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43623*0 + 3*717*FLEN/8, x4, x1, x2)

inst_14542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77003fff; valaddr_reg:x3; val_offset:43626*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43626*0 + 3*718*FLEN/8, x4, x1, x2)

inst_14543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77007fff; valaddr_reg:x3; val_offset:43629*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43629*0 + 3*719*FLEN/8, x4, x1, x2)

inst_14544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7700ffff; valaddr_reg:x3; val_offset:43632*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43632*0 + 3*720*FLEN/8, x4, x1, x2)

inst_14545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7701ffff; valaddr_reg:x3; val_offset:43635*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43635*0 + 3*721*FLEN/8, x4, x1, x2)

inst_14546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7703ffff; valaddr_reg:x3; val_offset:43638*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43638*0 + 3*722*FLEN/8, x4, x1, x2)

inst_14547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7707ffff; valaddr_reg:x3; val_offset:43641*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43641*0 + 3*723*FLEN/8, x4, x1, x2)

inst_14548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x770fffff; valaddr_reg:x3; val_offset:43644*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43644*0 + 3*724*FLEN/8, x4, x1, x2)

inst_14549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x771fffff; valaddr_reg:x3; val_offset:43647*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43647*0 + 3*725*FLEN/8, x4, x1, x2)

inst_14550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x773fffff; valaddr_reg:x3; val_offset:43650*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43650*0 + 3*726*FLEN/8, x4, x1, x2)

inst_14551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77400000; valaddr_reg:x3; val_offset:43653*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43653*0 + 3*727*FLEN/8, x4, x1, x2)

inst_14552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77600000; valaddr_reg:x3; val_offset:43656*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43656*0 + 3*728*FLEN/8, x4, x1, x2)

inst_14553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77700000; valaddr_reg:x3; val_offset:43659*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43659*0 + 3*729*FLEN/8, x4, x1, x2)

inst_14554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x77780000; valaddr_reg:x3; val_offset:43662*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43662*0 + 3*730*FLEN/8, x4, x1, x2)

inst_14555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777c0000; valaddr_reg:x3; val_offset:43665*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43665*0 + 3*731*FLEN/8, x4, x1, x2)

inst_14556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777e0000; valaddr_reg:x3; val_offset:43668*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43668*0 + 3*732*FLEN/8, x4, x1, x2)

inst_14557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777f0000; valaddr_reg:x3; val_offset:43671*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43671*0 + 3*733*FLEN/8, x4, x1, x2)

inst_14558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777f8000; valaddr_reg:x3; val_offset:43674*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43674*0 + 3*734*FLEN/8, x4, x1, x2)

inst_14559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fc000; valaddr_reg:x3; val_offset:43677*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43677*0 + 3*735*FLEN/8, x4, x1, x2)

inst_14560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fe000; valaddr_reg:x3; val_offset:43680*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43680*0 + 3*736*FLEN/8, x4, x1, x2)

inst_14561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ff000; valaddr_reg:x3; val_offset:43683*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43683*0 + 3*737*FLEN/8, x4, x1, x2)

inst_14562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ff800; valaddr_reg:x3; val_offset:43686*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43686*0 + 3*738*FLEN/8, x4, x1, x2)

inst_14563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ffc00; valaddr_reg:x3; val_offset:43689*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43689*0 + 3*739*FLEN/8, x4, x1, x2)

inst_14564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ffe00; valaddr_reg:x3; val_offset:43692*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43692*0 + 3*740*FLEN/8, x4, x1, x2)

inst_14565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fff00; valaddr_reg:x3; val_offset:43695*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43695*0 + 3*741*FLEN/8, x4, x1, x2)

inst_14566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fff80; valaddr_reg:x3; val_offset:43698*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43698*0 + 3*742*FLEN/8, x4, x1, x2)

inst_14567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fffc0; valaddr_reg:x3; val_offset:43701*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43701*0 + 3*743*FLEN/8, x4, x1, x2)

inst_14568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fffe0; valaddr_reg:x3; val_offset:43704*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43704*0 + 3*744*FLEN/8, x4, x1, x2)

inst_14569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ffff0; valaddr_reg:x3; val_offset:43707*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43707*0 + 3*745*FLEN/8, x4, x1, x2)

inst_14570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ffff8; valaddr_reg:x3; val_offset:43710*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43710*0 + 3*746*FLEN/8, x4, x1, x2)

inst_14571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ffffc; valaddr_reg:x3; val_offset:43713*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43713*0 + 3*747*FLEN/8, x4, x1, x2)

inst_14572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777ffffe; valaddr_reg:x3; val_offset:43716*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43716*0 + 3*748*FLEN/8, x4, x1, x2)

inst_14573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x777fffff; valaddr_reg:x3; val_offset:43719*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43719*0 + 3*749*FLEN/8, x4, x1, x2)

inst_14574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f000001; valaddr_reg:x3; val_offset:43722*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43722*0 + 3*750*FLEN/8, x4, x1, x2)

inst_14575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f000003; valaddr_reg:x3; val_offset:43725*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43725*0 + 3*751*FLEN/8, x4, x1, x2)

inst_14576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f000007; valaddr_reg:x3; val_offset:43728*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43728*0 + 3*752*FLEN/8, x4, x1, x2)

inst_14577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f199999; valaddr_reg:x3; val_offset:43731*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43731*0 + 3*753*FLEN/8, x4, x1, x2)

inst_14578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f249249; valaddr_reg:x3; val_offset:43734*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43734*0 + 3*754*FLEN/8, x4, x1, x2)

inst_14579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f333333; valaddr_reg:x3; val_offset:43737*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43737*0 + 3*755*FLEN/8, x4, x1, x2)

inst_14580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:43740*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43740*0 + 3*756*FLEN/8, x4, x1, x2)

inst_14581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:43743*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43743*0 + 3*757*FLEN/8, x4, x1, x2)

inst_14582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f444444; valaddr_reg:x3; val_offset:43746*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43746*0 + 3*758*FLEN/8, x4, x1, x2)

inst_14583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:43749*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43749*0 + 3*759*FLEN/8, x4, x1, x2)

inst_14584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:43752*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43752*0 + 3*760*FLEN/8, x4, x1, x2)

inst_14585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f666666; valaddr_reg:x3; val_offset:43755*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43755*0 + 3*761*FLEN/8, x4, x1, x2)

inst_14586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:43758*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43758*0 + 3*762*FLEN/8, x4, x1, x2)

inst_14587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:43761*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43761*0 + 3*763*FLEN/8, x4, x1, x2)

inst_14588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:43764*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43764*0 + 3*764*FLEN/8, x4, x1, x2)

inst_14589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:43767*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43767*0 + 3*765*FLEN/8, x4, x1, x2)

inst_14590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:43770*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43770*0 + 3*766*FLEN/8, x4, x1, x2)

inst_14591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:43773*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43773*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x637fffe0,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x637ffff0,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x637ffff8,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x637ffffc,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x637ffffe,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x637fffff,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7e84a6a2,32,FLEN)
NAN_BOXED(0x40770637,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9800000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9800001,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9800003,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9800007,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x980000f,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x980001f,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x980003f,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x980007f,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x98000ff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x98001ff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x98003ff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x98007ff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9800fff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9801fff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9803fff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9807fff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x980ffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x981ffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x983ffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x987ffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x98fffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x99fffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9bfffff,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9c00000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9e00000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9f00000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9f80000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fc0000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fe0000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ff0000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ff8000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffc000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffe000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fff000,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fff800,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffc00,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffe00,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffff00,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffff80,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffffc0,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffffe0,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffff0,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffff8,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffffc,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffffe,32,FLEN)
NAN_BOXED(0x7e851ed8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9ffffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61800000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61800001,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61800003,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61800007,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6180000f,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6180001f,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6180003f,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6180007f,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x618000ff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x618001ff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x618003ff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x618007ff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61800fff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61801fff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61803fff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61807fff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6180ffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6181ffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6183ffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x6187ffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x618fffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x619fffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61bfffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61c00000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61e00000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61f00000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61f80000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fc0000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fe0000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ff0000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ff8000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffc000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffe000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fff000,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fff800,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fffc00,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fffe00,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffff00,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffff80,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffffc0,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffffe0,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fffff0,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fffff8,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fffffc,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61fffffe,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x61ffffff,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7e875c74,32,FLEN)
NAN_BOXED(0x4072140b,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb800000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb800001,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb800003,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb800007,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb80000f,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb80001f,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb80003f,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb80007f,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8000ff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8001ff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8003ff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8007ff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb800fff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb801fff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb803fff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb807fff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb80ffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb81ffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb83ffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb87ffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8fffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb9fffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbfffff,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbc00000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbe00000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbf00000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbf80000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfc0000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfe0000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbff0000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbff8000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffc000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffe000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfff000,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfff800,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffc00,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffe00,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffff00,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffff80,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffffc0,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffffe0,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffff0,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffff8,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffffc,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffffe,32,FLEN)
NAN_BOXED(0x7e87db19,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d000000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d000001,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d000003,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d000007,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d00000f,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d00001f,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d00003f,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d00007f,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d0000ff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d0001ff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d0003ff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d0007ff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d000fff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d001fff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d003fff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d007fff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d00ffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d01ffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d03ffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d07ffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d0fffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d1fffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d3fffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d400000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d600000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d700000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d780000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7c0000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7e0000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7f0000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7f8000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fc000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fe000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ff000,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ff800,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ffc00,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ffe00,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fff00,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fff80,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fffc0,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fffe0,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ffff0,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ffff8,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ffffc,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7ffffe,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7d7fffff,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
NAN_BOXED(0x4070abcc,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e882711,32,FLEN)
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NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d800000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d800001,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d800003,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d800007,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d80000f,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d80001f,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d80003f,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d80007f,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d8000ff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d8001ff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d8003ff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d8007ff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d800fff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d801fff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d803fff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d807fff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d80ffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d81ffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d83ffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d87ffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d8fffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d9fffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dbfffff,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dc00000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8de00000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8df00000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8df80000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfc0000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfe0000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dff0000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dff8000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffc000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffe000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfff000,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfff800,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfffc00,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfffe00,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffff00,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffff80,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffffc0,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffffe0,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfffff0,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfffff8,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfffffc,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dfffffe,32,FLEN)
NAN_BOXED(0x7e8adedc,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8dffffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65000000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65000001,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65000003,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65000007,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6500000f,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6500001f,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6500003f,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6500007f,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x650000ff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x650001ff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x650003ff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x650007ff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65000fff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65001fff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65003fff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65007fff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6500ffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6501ffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6503ffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x6507ffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x650fffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x651fffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x653fffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65400000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65600000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65700000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x65780000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657c0000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657e0000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657f0000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657f8000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fc000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fe000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ff000,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ff800,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ffc00,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ffe00,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fff00,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fff80,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fffc0,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fffe0,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ffff0,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ffff8,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ffffc,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657ffffe,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x657fffff,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7e8c77d8,32,FLEN)
NAN_BOXED(0x406946ee,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5800000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5800001,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5800003,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5800007,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc580000f,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc580001f,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc580003f,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc580007f,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc58000ff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc58001ff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc58003ff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc58007ff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5800fff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5801fff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5803fff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5807fff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc580ffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc581ffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc583ffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc587ffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc58fffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc59fffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5bfffff,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5c00000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5e00000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5f00000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5f80000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fc0000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fe0000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ff0000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ff8000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffc000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffe000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fff000,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fff800,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fffc00,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fffe00,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffff00,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffff80,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffffc0,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffffe0,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fffff0,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fffff8,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fffffc,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5fffffe,32,FLEN)
NAN_BOXED(0x7e8ce320,32,FLEN)
NAN_BOXED(0x80744aa6,32,FLEN)
NAN_BOXED(0xc5ffffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce000000,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce000001,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce000003,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce000007,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce00000f,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce00001f,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce00003f,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce00007f,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce0000ff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce0001ff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce0003ff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce0007ff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce000fff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce001fff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce003fff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce007fff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce00ffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce01ffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce03ffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce07ffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce0fffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce1fffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce3fffff,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce400000,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce600000,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce700000,32,FLEN)
NAN_BOXED(0x7e8d015f,32,FLEN)
NAN_BOXED(0x807431b4,32,FLEN)
NAN_BOXED(0xce780000,32,FLEN)
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NAN_BOXED(0x807431b4,32,FLEN)
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NAN_BOXED(0x807431b4,32,FLEN)
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NAN_BOXED(0x807431b4,32,FLEN)
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NAN_BOXED(0x807431b4,32,FLEN)
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NAN_BOXED(0x72ad42,32,FLEN)
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NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2e83ffff,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2e87ffff,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2e8fffff,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2e9fffff,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2ebfffff,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2ec00000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2ee00000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2ef00000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2ef80000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efc0000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efe0000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2eff0000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2eff8000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effc000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effe000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efff000,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efff800,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efffc00,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efffe00,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effff00,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effff80,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effffc0,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effffe0,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efffff0,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efffff8,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efffffc,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2efffffe,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x2effffff,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7e8edf00,32,FLEN)
NAN_BOXED(0x72ad42,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77000000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77000001,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77000003,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77000007,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7700000f,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7700001f,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7700003f,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7700007f,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x770000ff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x770001ff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x770003ff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x770007ff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77000fff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77001fff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77003fff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77007fff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7700ffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7701ffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7703ffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7707ffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x770fffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x771fffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x773fffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77400000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77600000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77700000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x77780000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777c0000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777e0000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777f0000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777f8000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fc000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fe000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ff000,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ff800,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ffc00,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ffe00,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fff00,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fff80,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fffc0,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fffe0,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ffff0,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ffff8,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ffffc,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777ffffe,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x777fffff,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7e8f067e,32,FLEN)
NAN_BOXED(0x40651b2f,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7e90382a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e90382a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
