
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:17:59 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b6 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b6)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==f18, rs2==f3, rs3==f28, rd==f3,fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f18; op2:f3; op3:f28; dest:f3; op1val:0xb3a879f; op2val:0xbf439313;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f3, f18, f3, f28, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs2 == rs3 == rd, rs1==f7, rs2==f7, rs3==f7, rd==f7,fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f7; op2:f7; op3:f7; dest:f7; op1val:0xb3a879f; op2val:0xb3a879f;
op3val:0xb3a879f; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f7, f7, f7, f7, dyn, 32, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs1 == rs2 == rd != rs3, rs1==f13, rs2==f13, rs3==f29, rd==f13,fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f13; op2:f13; op3:f29; dest:f13; op1val:0xb3a879f; op2val:0xb3a879f;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f13, f13, f13, f29, dyn, 64, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==f17, rs2==f11, rs3==f23, rd==f2,fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f17; op2:f11; op3:f23; dest:f2; op1val:0xb3a879f; op2val:0xbf439313;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f2, f17, f11, f23, dyn, 96, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rs2 == rs3 != rd, rs1==f27, rs2==f27, rs3==f27, rd==f11,fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f27; op2:f27; op3:f27; dest:f11; op1val:0xb3a879f; op2val:0xb3a879f;
op3val:0xb3a879f; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f11, f27, f27, f27, dyn, 128, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==f14, rs2==f0, rs3==f19, rd==f14,fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f14; op2:f0; op3:f19; dest:f14; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f14, f14, f0, f19, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rd == rs2 == rs3 != rs1, rs1==f26, rs2==f17, rs3==f17, rd==f17,fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f26; op2:f17; op3:f17; dest:f17; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xbdceee6f; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f17, f26, f17, f17, dyn, 32, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==f25, rs2==f25, rs3==f16, rd==f23,fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f25; op2:f25; op3:f16; dest:f23; op1val:0xc9940ba; op2val:0xc9940ba;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f23, f25, f25, f16, dyn, 64, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==f24, rs2==f26, rs3==f26, rd==f27,fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f24; op2:f26; op3:f26; dest:f27; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xbdceee6f; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f27, f24, f26, f26, dyn, 96, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rd == rs3 != rs2, rs1==f22, rs2==f28, rs3==f22, rd==f22,fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f22; op2:f28; op3:f22; dest:f22; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xc9940ba; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f22, f22, f28, f22, dyn, 128, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==f6, rs2==f18, rs3==f6, rd==f10,fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f6; op2:f18; op3:f6; dest:f10; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xcd307a2; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f10, f6, f18, f6, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==f11, rs2==f2, rs3==f15, rd==f15,fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f11; op2:f2; op3:f15; dest:f15; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xc317180; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f15, f11, f2, f15, dyn, 32, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==f29, rs2==f8, rs3==f14, rd==f16,fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f29; op2:f8; op3:f14; dest:f16; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xc317180; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f16, f29, f8, f14, dyn, 64, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==f10, rs2==f16, rs3==f12, rd==f8,fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f10; op2:f16; op3:f12; dest:f8; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xc317180; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f8, f10, f16, f12, dyn, 96, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==f1, rs2==f31, rs3==f13, rd==f21,fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f1; op2:f31; op3:f13; dest:f21; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xc317180; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f21, f1, f31, f13, dyn, 128, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==f0, rs2==f24, rs3==f30, rd==f20,fs1 == 0 and fe1 == 0x19 and fm1 == 0x659ef1 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x31755f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1f2c2c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f0; op2:f24; op3:f30; dest:f20; op1val:0xce59ef1; op2val:0xc031755f;
op3val:0xd9f2c2c; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f20, f0, f24, f30, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==f2, rs2==f29, rs3==f24, rd==f6,fs1 == 0 and fe1 == 0x19 and fm1 == 0x659ef1 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x31755f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1f2c2c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f2; op2:f29; op3:f24; dest:f6; op1val:0xce59ef1; op2val:0xc031755f;
op3val:0xd9f2c2c; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f6, f2, f29, f24, dyn, 32, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==f5, rs2==f20, rs3==f31, rd==f29,fs1 == 0 and fe1 == 0x19 and fm1 == 0x659ef1 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x31755f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1f2c2c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f5; op2:f20; op3:f31; dest:f29; op1val:0xce59ef1; op2val:0xc031755f;
op3val:0xd9f2c2c; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f29, f5, f20, f31, dyn, 64, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==f31, rs2==f12, rs3==f4, rd==f25,fs1 == 0 and fe1 == 0x19 and fm1 == 0x659ef1 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x31755f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1f2c2c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f31; op2:f12; op3:f4; dest:f25; op1val:0xce59ef1; op2val:0xc031755f;
op3val:0xd9f2c2c; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f25, f31, f12, f4, dyn, 96, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==f12, rs2==f10, rs3==f3, rd==f9,fs1 == 0 and fe1 == 0x19 and fm1 == 0x659ef1 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x31755f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1f2c2c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f12; op2:f10; op3:f3; dest:f9; op1val:0xce59ef1; op2val:0xc031755f;
op3val:0xd9f2c2c; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f9, f12, f10, f3, dyn, 128, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==f28, rs2==f22, rs3==f18, rd==f31,fs1 == 0 and fe1 == 0x19 and fm1 == 0x65b5be and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1fa549 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0f4031 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f28; op2:f22; op3:f18; dest:f31; op1val:0xce5b5be; op2val:0xc01fa549;
op3val:0xd8f4031; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f28, f22, f18, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)

inst_21:
// rs1==f23, rs2==f5, rs3==f21, rd==f1,fs1 == 0 and fe1 == 0x19 and fm1 == 0x65b5be and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1fa549 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0f4031 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f23; op2:f5; op3:f21; dest:f1; op1val:0xce5b5be; op2val:0xc01fa549;
op3val:0xd8f4031; valaddr_reg:x3; val_offset:63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f1, f23, f5, f21, dyn, 32, 0, x3, 63*FLEN/8, x4, x1, x2)

inst_22:
// rs1==f30, rs2==f9, rs3==f0, rd==f24,fs1 == 0 and fe1 == 0x19 and fm1 == 0x65b5be and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1fa549 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0f4031 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f9; op3:f0; dest:f24; op1val:0xce5b5be; op2val:0xc01fa549;
op3val:0xd8f4031; valaddr_reg:x3; val_offset:66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f24, f30, f9, f0, dyn, 64, 0, x3, 66*FLEN/8, x4, x1, x2)

inst_23:
// rs1==f16, rs2==f30, rs3==f20, rd==f5,fs1 == 0 and fe1 == 0x19 and fm1 == 0x65b5be and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1fa549 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0f4031 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f16; op2:f30; op3:f20; dest:f5; op1val:0xce5b5be; op2val:0xc01fa549;
op3val:0xd8f4031; valaddr_reg:x3; val_offset:69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f5, f16, f30, f20, dyn, 96, 0, x3, 69*FLEN/8, x4, x1, x2)

inst_24:
// rs1==f21, rs2==f15, rs3==f11, rd==f4,fs1 == 0 and fe1 == 0x19 and fm1 == 0x65b5be and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1fa549 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0f4031 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f21; op2:f15; op3:f11; dest:f4; op1val:0xce5b5be; op2val:0xc01fa549;
op3val:0xd8f4031; valaddr_reg:x3; val_offset:72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f4, f21, f15, f11, dyn, 128, 0, x3, 72*FLEN/8, x4, x1, x2)

inst_25:
// rs1==f15, rs2==f4, rs3==f2, rd==f0,fs1 == 0 and fe1 == 0x19 and fm1 == 0x76a4cf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1630b2 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x10b37c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f15; op2:f4; op3:f2; dest:f0; op1val:0xcf6a4cf; op2val:0xc01630b2;
op3val:0xd90b37c; valaddr_reg:x3; val_offset:75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f0, f15, f4, f2, dyn, 0, 0, x3, 75*FLEN/8, x4, x1, x2)

inst_26:
// rs1==f4, rs2==f1, rs3==f25, rd==f30,fs1 == 0 and fe1 == 0x19 and fm1 == 0x76a4cf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1630b2 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x10b37c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f4; op2:f1; op3:f25; dest:f30; op1val:0xcf6a4cf; op2val:0xc01630b2;
op3val:0xd90b37c; valaddr_reg:x3; val_offset:78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f30, f4, f1, f25, dyn, 32, 0, x3, 78*FLEN/8, x4, x1, x2)

inst_27:
// rs1==f3, rs2==f19, rs3==f1, rd==f12,fs1 == 0 and fe1 == 0x19 and fm1 == 0x76a4cf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1630b2 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x10b37c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f3; op2:f19; op3:f1; dest:f12; op1val:0xcf6a4cf; op2val:0xc01630b2;
op3val:0xd90b37c; valaddr_reg:x3; val_offset:81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f12, f3, f19, f1, dyn, 64, 0, x3, 81*FLEN/8, x4, x1, x2)

inst_28:
// rs1==f20, rs2==f6, rs3==f9, rd==f18,fs1 == 0 and fe1 == 0x19 and fm1 == 0x76a4cf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1630b2 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x10b37c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f20; op2:f6; op3:f9; dest:f18; op1val:0xcf6a4cf; op2val:0xc01630b2;
op3val:0xd90b37c; valaddr_reg:x3; val_offset:84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f18, f20, f6, f9, dyn, 96, 0, x3, 84*FLEN/8, x4, x1, x2)

inst_29:
// rs1==f9, rs2==f14, rs3==f8, rd==f19,fs1 == 0 and fe1 == 0x19 and fm1 == 0x76a4cf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1630b2 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x10b37c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f9; op2:f14; op3:f8; dest:f19; op1val:0xcf6a4cf; op2val:0xc01630b2;
op3val:0xd90b37c; valaddr_reg:x3; val_offset:87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f19, f9, f14, f8, dyn, 128, 0, x3, 87*FLEN/8, x4, x1, x2)

inst_30:
// rs1==f19, rs2==f21, rs3==f10, rd==f28,fs1 == 0 and fe1 == 0x1a and fm1 == 0x0bc2a2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x69eca6 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f6ab0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f19; op2:f21; op3:f10; dest:f28; op1val:0xd0bc2a2; op2val:0xbf69eca6;
op3val:0xcff6ab0; valaddr_reg:x3; val_offset:90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f28, f19, f21, f10, dyn, 0, 0, x3, 90*FLEN/8, x4, x1, x2)

inst_31:
// rs1==f8, rs2==f23, rs3==f5, rd==f26,fs1 == 0 and fe1 == 0x1a and fm1 == 0x0bc2a2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x69eca6 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f6ab0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f8; op2:f23; op3:f5; dest:f26; op1val:0xd0bc2a2; op2val:0xbf69eca6;
op3val:0xcff6ab0; valaddr_reg:x3; val_offset:93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f26, f8, f23, f5, dyn, 32, 0, x3, 93*FLEN/8, x4, x1, x2)

inst_32:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x0bc2a2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x69eca6 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f6ab0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd0bc2a2; op2val:0xbf69eca6;
op3val:0xcff6ab0; valaddr_reg:x3; val_offset:96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 96*FLEN/8, x4, x1, x2)

inst_33:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x0bc2a2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x69eca6 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f6ab0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd0bc2a2; op2val:0xbf69eca6;
op3val:0xcff6ab0; valaddr_reg:x3; val_offset:99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 99*FLEN/8, x4, x1, x2)

inst_34:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x0bc2a2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x69eca6 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f6ab0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd0bc2a2; op2val:0xbf69eca6;
op3val:0xcff6ab0; valaddr_reg:x3; val_offset:102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 102*FLEN/8, x4, x1, x2)

inst_35:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x105d0a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1a5d46 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x2e1923 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd105d0a; op2val:0xbf1a5d46;
op3val:0xcae1923; valaddr_reg:x3; val_offset:105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105*FLEN/8, x4, x1, x2)

inst_36:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x105d0a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1a5d46 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x2e1923 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd105d0a; op2val:0xbf1a5d46;
op3val:0xcae1923; valaddr_reg:x3; val_offset:108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 108*FLEN/8, x4, x1, x2)

inst_37:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x105d0a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1a5d46 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x2e1923 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd105d0a; op2val:0xbf1a5d46;
op3val:0xcae1923; valaddr_reg:x3; val_offset:111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 111*FLEN/8, x4, x1, x2)

inst_38:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x105d0a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1a5d46 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x2e1923 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd105d0a; op2val:0xbf1a5d46;
op3val:0xcae1923; valaddr_reg:x3; val_offset:114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 114*FLEN/8, x4, x1, x2)

inst_39:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x105d0a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1a5d46 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x2e1923 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd105d0a; op2val:0xbf1a5d46;
op3val:0xcae1923; valaddr_reg:x3; val_offset:117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 117*FLEN/8, x4, x1, x2)

inst_40:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x15bc2b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x132098 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x2c1c3a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd15bc2b; op2val:0xbf932098;
op3val:0xd2c1c3a; valaddr_reg:x3; val_offset:120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 120*FLEN/8, x4, x1, x2)

inst_41:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x15bc2b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x132098 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x2c1c3a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd15bc2b; op2val:0xbf932098;
op3val:0xd2c1c3a; valaddr_reg:x3; val_offset:123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 123*FLEN/8, x4, x1, x2)

inst_42:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x15bc2b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x132098 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x2c1c3a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd15bc2b; op2val:0xbf932098;
op3val:0xd2c1c3a; valaddr_reg:x3; val_offset:126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 126*FLEN/8, x4, x1, x2)

inst_43:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x15bc2b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x132098 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x2c1c3a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd15bc2b; op2val:0xbf932098;
op3val:0xd2c1c3a; valaddr_reg:x3; val_offset:129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 129*FLEN/8, x4, x1, x2)

inst_44:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x15bc2b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x132098 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x2c1c3a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd15bc2b; op2val:0xbf932098;
op3val:0xd2c1c3a; valaddr_reg:x3; val_offset:132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 132*FLEN/8, x4, x1, x2)

inst_45:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x16ddde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2f5df8 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x4eb218 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd16ddde; op2val:0xbf2f5df8;
op3val:0xcceb218; valaddr_reg:x3; val_offset:135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 135*FLEN/8, x4, x1, x2)

inst_46:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x16ddde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2f5df8 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x4eb218 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd16ddde; op2val:0xbf2f5df8;
op3val:0xcceb218; valaddr_reg:x3; val_offset:138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 138*FLEN/8, x4, x1, x2)

inst_47:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x16ddde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2f5df8 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x4eb218 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd16ddde; op2val:0xbf2f5df8;
op3val:0xcceb218; valaddr_reg:x3; val_offset:141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 141*FLEN/8, x4, x1, x2)

inst_48:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x16ddde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2f5df8 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x4eb218 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd16ddde; op2val:0xbf2f5df8;
op3val:0xcceb218; valaddr_reg:x3; val_offset:144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 144*FLEN/8, x4, x1, x2)

inst_49:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x16ddde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2f5df8 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x4eb218 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd16ddde; op2val:0xbf2f5df8;
op3val:0xcceb218; valaddr_reg:x3; val_offset:147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 147*FLEN/8, x4, x1, x2)

inst_50:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x1f04c3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7194f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x161005 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd1f04c3; op2val:0xbff194f8;
op3val:0xd961005; valaddr_reg:x3; val_offset:150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 150*FLEN/8, x4, x1, x2)

inst_51:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x1f04c3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7194f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x161005 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd1f04c3; op2val:0xbff194f8;
op3val:0xd961005; valaddr_reg:x3; val_offset:153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 153*FLEN/8, x4, x1, x2)

inst_52:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x1f04c3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7194f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x161005 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd1f04c3; op2val:0xbff194f8;
op3val:0xd961005; valaddr_reg:x3; val_offset:156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 156*FLEN/8, x4, x1, x2)

inst_53:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x1f04c3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7194f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x161005 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd1f04c3; op2val:0xbff194f8;
op3val:0xd961005; valaddr_reg:x3; val_offset:159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 159*FLEN/8, x4, x1, x2)

inst_54:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x1f04c3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7194f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x161005 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd1f04c3; op2val:0xbff194f8;
op3val:0xd961005; valaddr_reg:x3; val_offset:162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 162*FLEN/8, x4, x1, x2)

inst_55:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x22883f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x548346 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x06ec2d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd22883f; op2val:0xbfd48346;
op3val:0xd86ec2d; valaddr_reg:x3; val_offset:165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 165*FLEN/8, x4, x1, x2)

inst_56:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x22883f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x548346 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x06ec2d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd22883f; op2val:0xbfd48346;
op3val:0xd86ec2d; valaddr_reg:x3; val_offset:168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 168*FLEN/8, x4, x1, x2)

inst_57:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x22883f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x548346 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x06ec2d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd22883f; op2val:0xbfd48346;
op3val:0xd86ec2d; valaddr_reg:x3; val_offset:171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 171*FLEN/8, x4, x1, x2)

inst_58:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x22883f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x548346 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x06ec2d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd22883f; op2val:0xbfd48346;
op3val:0xd86ec2d; valaddr_reg:x3; val_offset:174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 174*FLEN/8, x4, x1, x2)

inst_59:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x22883f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x548346 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x06ec2d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd22883f; op2val:0xbfd48346;
op3val:0xd86ec2d; valaddr_reg:x3; val_offset:177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 177*FLEN/8, x4, x1, x2)

inst_60:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2593bd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7a8a3f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x220bb1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2593bd; op2val:0xbffa8a3f;
op3val:0xda20bb1; valaddr_reg:x3; val_offset:180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 180*FLEN/8, x4, x1, x2)

inst_61:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2593bd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7a8a3f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x220bb1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2593bd; op2val:0xbffa8a3f;
op3val:0xda20bb1; valaddr_reg:x3; val_offset:183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 183*FLEN/8, x4, x1, x2)

inst_62:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2593bd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7a8a3f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x220bb1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2593bd; op2val:0xbffa8a3f;
op3val:0xda20bb1; valaddr_reg:x3; val_offset:186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 186*FLEN/8, x4, x1, x2)

inst_63:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2593bd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7a8a3f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x220bb1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2593bd; op2val:0xbffa8a3f;
op3val:0xda20bb1; valaddr_reg:x3; val_offset:189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 189*FLEN/8, x4, x1, x2)

inst_64:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2593bd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7a8a3f and fs3 == 0 and fe3 == 0x1b and fm3 == 0x220bb1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2593bd; op2val:0xbffa8a3f;
op3val:0xda20bb1; valaddr_reg:x3; val_offset:192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 192*FLEN/8, x4, x1, x2)

inst_65:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2a9dd4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x08764c and fs3 == 0 and fe3 == 0x1a and fm3 == 0x35e561 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2a9dd4; op2val:0xbf88764c;
op3val:0xd35e561; valaddr_reg:x3; val_offset:195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 195*FLEN/8, x4, x1, x2)

inst_66:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2a9dd4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x08764c and fs3 == 0 and fe3 == 0x1a and fm3 == 0x35e561 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2a9dd4; op2val:0xbf88764c;
op3val:0xd35e561; valaddr_reg:x3; val_offset:198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 198*FLEN/8, x4, x1, x2)

inst_67:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2a9dd4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x08764c and fs3 == 0 and fe3 == 0x1a and fm3 == 0x35e561 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2a9dd4; op2val:0xbf88764c;
op3val:0xd35e561; valaddr_reg:x3; val_offset:201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 201*FLEN/8, x4, x1, x2)

inst_68:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2a9dd4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x08764c and fs3 == 0 and fe3 == 0x1a and fm3 == 0x35e561 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2a9dd4; op2val:0xbf88764c;
op3val:0xd35e561; valaddr_reg:x3; val_offset:204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 204*FLEN/8, x4, x1, x2)

inst_69:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x2a9dd4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x08764c and fs3 == 0 and fe3 == 0x1a and fm3 == 0x35e561 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd2a9dd4; op2val:0xbf88764c;
op3val:0xd35e561; valaddr_reg:x3; val_offset:207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 207*FLEN/8, x4, x1, x2)

inst_70:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x383b17 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4f8193 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x155507 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd383b17; op2val:0xbfcf8193;
op3val:0xd955507; valaddr_reg:x3; val_offset:210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 210*FLEN/8, x4, x1, x2)

inst_71:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x383b17 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4f8193 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x155507 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd383b17; op2val:0xbfcf8193;
op3val:0xd955507; valaddr_reg:x3; val_offset:213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 213*FLEN/8, x4, x1, x2)

inst_72:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x383b17 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4f8193 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x155507 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd383b17; op2val:0xbfcf8193;
op3val:0xd955507; valaddr_reg:x3; val_offset:216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 216*FLEN/8, x4, x1, x2)

inst_73:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x383b17 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4f8193 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x155507 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd383b17; op2val:0xbfcf8193;
op3val:0xd955507; valaddr_reg:x3; val_offset:219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 219*FLEN/8, x4, x1, x2)

inst_74:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x383b17 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4f8193 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x155507 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd383b17; op2val:0xbfcf8193;
op3val:0xd955507; valaddr_reg:x3; val_offset:222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 222*FLEN/8, x4, x1, x2)

inst_75:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x3c9c8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0b8632 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x4d97bc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd3c9c8a; op2val:0xbe8b8632;
op3val:0xc4d97bc; valaddr_reg:x3; val_offset:225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 225*FLEN/8, x4, x1, x2)

inst_76:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x3c9c8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0b8632 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x4d97bc and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd3c9c8a; op2val:0xbe8b8632;
op3val:0xc4d97bc; valaddr_reg:x3; val_offset:228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 228*FLEN/8, x4, x1, x2)

inst_77:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x3c9c8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0b8632 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x4d97bc and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd3c9c8a; op2val:0xbe8b8632;
op3val:0xc4d97bc; valaddr_reg:x3; val_offset:231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 231*FLEN/8, x4, x1, x2)

inst_78:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x3c9c8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0b8632 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x4d97bc and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd3c9c8a; op2val:0xbe8b8632;
op3val:0xc4d97bc; valaddr_reg:x3; val_offset:234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 234*FLEN/8, x4, x1, x2)

inst_79:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x3c9c8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0b8632 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x4d97bc and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd3c9c8a; op2val:0xbe8b8632;
op3val:0xc4d97bc; valaddr_reg:x3; val_offset:237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 237*FLEN/8, x4, x1, x2)

inst_80:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x44a3df and fs2 == 1 and fe2 == 0x7f and fm2 == 0x002e60 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x44eb1d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd44a3df; op2val:0xbf802e60;
op3val:0xd44eb1d; valaddr_reg:x3; val_offset:240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 240*FLEN/8, x4, x1, x2)

inst_81:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x44a3df and fs2 == 1 and fe2 == 0x7f and fm2 == 0x002e60 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x44eb1d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd44a3df; op2val:0xbf802e60;
op3val:0xd44eb1d; valaddr_reg:x3; val_offset:243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 243*FLEN/8, x4, x1, x2)

inst_82:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x44a3df and fs2 == 1 and fe2 == 0x7f and fm2 == 0x002e60 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x44eb1d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd44a3df; op2val:0xbf802e60;
op3val:0xd44eb1d; valaddr_reg:x3; val_offset:246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 246*FLEN/8, x4, x1, x2)

inst_83:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x44a3df and fs2 == 1 and fe2 == 0x7f and fm2 == 0x002e60 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x44eb1d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd44a3df; op2val:0xbf802e60;
op3val:0xd44eb1d; valaddr_reg:x3; val_offset:249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 249*FLEN/8, x4, x1, x2)

inst_84:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x44a3df and fs2 == 1 and fe2 == 0x7f and fm2 == 0x002e60 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x44eb1d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd44a3df; op2val:0xbf802e60;
op3val:0xd44eb1d; valaddr_reg:x3; val_offset:252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 252*FLEN/8, x4, x1, x2)

inst_85:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x595706 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b90f4 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x47fdf3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd595706; op2val:0xbeeb90f4;
op3val:0xcc7fdf3; valaddr_reg:x3; val_offset:255*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 255*FLEN/8, x4, x1, x2)

inst_86:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x595706 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b90f4 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x47fdf3 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd595706; op2val:0xbeeb90f4;
op3val:0xcc7fdf3; valaddr_reg:x3; val_offset:258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 258*FLEN/8, x4, x1, x2)

inst_87:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x595706 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b90f4 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x47fdf3 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd595706; op2val:0xbeeb90f4;
op3val:0xcc7fdf3; valaddr_reg:x3; val_offset:261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 261*FLEN/8, x4, x1, x2)

inst_88:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x595706 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b90f4 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x47fdf3 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd595706; op2val:0xbeeb90f4;
op3val:0xcc7fdf3; valaddr_reg:x3; val_offset:264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 264*FLEN/8, x4, x1, x2)

inst_89:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x595706 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b90f4 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x47fdf3 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd595706; op2val:0xbeeb90f4;
op3val:0xcc7fdf3; valaddr_reg:x3; val_offset:267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 267*FLEN/8, x4, x1, x2)

inst_90:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x5ae194 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a09be and fs3 == 0 and fe3 == 0x18 and fm3 == 0x6c0bdd and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd5ae194; op2val:0xbe8a09be;
op3val:0xc6c0bdd; valaddr_reg:x3; val_offset:270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 270*FLEN/8, x4, x1, x2)

inst_91:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x5ae194 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a09be and fs3 == 0 and fe3 == 0x18 and fm3 == 0x6c0bdd and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd5ae194; op2val:0xbe8a09be;
op3val:0xc6c0bdd; valaddr_reg:x3; val_offset:273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 273*FLEN/8, x4, x1, x2)

inst_92:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x5ae194 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a09be and fs3 == 0 and fe3 == 0x18 and fm3 == 0x6c0bdd and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd5ae194; op2val:0xbe8a09be;
op3val:0xc6c0bdd; valaddr_reg:x3; val_offset:276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 276*FLEN/8, x4, x1, x2)

inst_93:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x5ae194 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a09be and fs3 == 0 and fe3 == 0x18 and fm3 == 0x6c0bdd and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd5ae194; op2val:0xbe8a09be;
op3val:0xc6c0bdd; valaddr_reg:x3; val_offset:279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 279*FLEN/8, x4, x1, x2)

inst_94:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x5ae194 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a09be and fs3 == 0 and fe3 == 0x18 and fm3 == 0x6c0bdd and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd5ae194; op2val:0xbe8a09be;
op3val:0xc6c0bdd; valaddr_reg:x3; val_offset:282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 282*FLEN/8, x4, x1, x2)

inst_95:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6aa17e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x301eb9 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x216b30 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6aa17e; op2val:0xbfb01eb9;
op3val:0xda16b30; valaddr_reg:x3; val_offset:285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 285*FLEN/8, x4, x1, x2)

inst_96:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6aa17e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x301eb9 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x216b30 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6aa17e; op2val:0xbfb01eb9;
op3val:0xda16b30; valaddr_reg:x3; val_offset:288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 288*FLEN/8, x4, x1, x2)

inst_97:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6aa17e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x301eb9 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x216b30 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6aa17e; op2val:0xbfb01eb9;
op3val:0xda16b30; valaddr_reg:x3; val_offset:291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 291*FLEN/8, x4, x1, x2)

inst_98:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6aa17e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x301eb9 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x216b30 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6aa17e; op2val:0xbfb01eb9;
op3val:0xda16b30; valaddr_reg:x3; val_offset:294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 294*FLEN/8, x4, x1, x2)

inst_99:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6aa17e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x301eb9 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x216b30 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6aa17e; op2val:0xbfb01eb9;
op3val:0xda16b30; valaddr_reg:x3; val_offset:297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 297*FLEN/8, x4, x1, x2)

inst_100:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6e53b4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1e02f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x131a6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6e53b4; op2val:0xbf9e02f8;
op3val:0xd931a6d; valaddr_reg:x3; val_offset:300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 300*FLEN/8, x4, x1, x2)

inst_101:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6e53b4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1e02f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x131a6d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6e53b4; op2val:0xbf9e02f8;
op3val:0xd931a6d; valaddr_reg:x3; val_offset:303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 303*FLEN/8, x4, x1, x2)

inst_102:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6e53b4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1e02f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x131a6d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6e53b4; op2val:0xbf9e02f8;
op3val:0xd931a6d; valaddr_reg:x3; val_offset:306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 306*FLEN/8, x4, x1, x2)

inst_103:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6e53b4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1e02f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x131a6d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6e53b4; op2val:0xbf9e02f8;
op3val:0xd931a6d; valaddr_reg:x3; val_offset:309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 309*FLEN/8, x4, x1, x2)

inst_104:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x6e53b4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1e02f8 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x131a6d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd6e53b4; op2val:0xbf9e02f8;
op3val:0xd931a6d; valaddr_reg:x3; val_offset:312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 312*FLEN/8, x4, x1, x2)

inst_105:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x74b035 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72cefc and fs3 == 0 and fe3 == 0x1a and fm3 == 0x681469 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd74b035; op2val:0xbf72cefc;
op3val:0xd681469; valaddr_reg:x3; val_offset:315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 315*FLEN/8, x4, x1, x2)

inst_106:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x74b035 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72cefc and fs3 == 0 and fe3 == 0x1a and fm3 == 0x681469 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd74b035; op2val:0xbf72cefc;
op3val:0xd681469; valaddr_reg:x3; val_offset:318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 318*FLEN/8, x4, x1, x2)

inst_107:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x74b035 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72cefc and fs3 == 0 and fe3 == 0x1a and fm3 == 0x681469 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd74b035; op2val:0xbf72cefc;
op3val:0xd681469; valaddr_reg:x3; val_offset:321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 321*FLEN/8, x4, x1, x2)

inst_108:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x74b035 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72cefc and fs3 == 0 and fe3 == 0x1a and fm3 == 0x681469 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd74b035; op2val:0xbf72cefc;
op3val:0xd681469; valaddr_reg:x3; val_offset:324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 324*FLEN/8, x4, x1, x2)

inst_109:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x74b035 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72cefc and fs3 == 0 and fe3 == 0x1a and fm3 == 0x681469 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd74b035; op2val:0xbf72cefc;
op3val:0xd681469; valaddr_reg:x3; val_offset:327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 327*FLEN/8, x4, x1, x2)

inst_110:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x77920b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0481cd and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0024d5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd77920b; op2val:0xbf8481cd;
op3val:0xd8024d5; valaddr_reg:x3; val_offset:330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 330*FLEN/8, x4, x1, x2)

inst_111:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x77920b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0481cd and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0024d5 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd77920b; op2val:0xbf8481cd;
op3val:0xd8024d5; valaddr_reg:x3; val_offset:333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 333*FLEN/8, x4, x1, x2)

inst_112:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x77920b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0481cd and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0024d5 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd77920b; op2val:0xbf8481cd;
op3val:0xd8024d5; valaddr_reg:x3; val_offset:336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 336*FLEN/8, x4, x1, x2)

inst_113:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x77920b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0481cd and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0024d5 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd77920b; op2val:0xbf8481cd;
op3val:0xd8024d5; valaddr_reg:x3; val_offset:339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 339*FLEN/8, x4, x1, x2)

inst_114:
// fs1 == 0 and fe1 == 0x1a and fm1 == 0x77920b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0481cd and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0024d5 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd77920b; op2val:0xbf8481cd;
op3val:0xd8024d5; valaddr_reg:x3; val_offset:342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 342*FLEN/8, x4, x1, x2)

inst_115:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x079143 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x618104 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x6ed5fe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd879143; op2val:0xbf618104;
op3val:0xd6ed5fe; valaddr_reg:x3; val_offset:345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 345*FLEN/8, x4, x1, x2)

inst_116:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x079143 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x618104 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x6ed5fe and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd879143; op2val:0xbf618104;
op3val:0xd6ed5fe; valaddr_reg:x3; val_offset:348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 348*FLEN/8, x4, x1, x2)

inst_117:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x079143 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x618104 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x6ed5fe and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd879143; op2val:0xbf618104;
op3val:0xd6ed5fe; valaddr_reg:x3; val_offset:351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 351*FLEN/8, x4, x1, x2)

inst_118:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x079143 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x618104 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x6ed5fe and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd879143; op2val:0xbf618104;
op3val:0xd6ed5fe; valaddr_reg:x3; val_offset:354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 354*FLEN/8, x4, x1, x2)

inst_119:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x079143 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x618104 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x6ed5fe and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd879143; op2val:0xbf618104;
op3val:0xd6ed5fe; valaddr_reg:x3; val_offset:357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 357*FLEN/8, x4, x1, x2)

inst_120:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x10fd82 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6443ad and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01481c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd90fd82; op2val:0xbf6443ad;
op3val:0xd81481c; valaddr_reg:x3; val_offset:360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 360*FLEN/8, x4, x1, x2)

inst_121:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x10fd82 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6443ad and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01481c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd90fd82; op2val:0xbf6443ad;
op3val:0xd81481c; valaddr_reg:x3; val_offset:363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 363*FLEN/8, x4, x1, x2)

inst_122:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x10fd82 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6443ad and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01481c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd90fd82; op2val:0xbf6443ad;
op3val:0xd81481c; valaddr_reg:x3; val_offset:366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 366*FLEN/8, x4, x1, x2)

inst_123:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x10fd82 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6443ad and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01481c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd90fd82; op2val:0xbf6443ad;
op3val:0xd81481c; valaddr_reg:x3; val_offset:369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 369*FLEN/8, x4, x1, x2)

inst_124:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x10fd82 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6443ad and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01481c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd90fd82; op2val:0xbf6443ad;
op3val:0xd81481c; valaddr_reg:x3; val_offset:372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 372*FLEN/8, x4, x1, x2)

inst_125:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x11fc19 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x032d0d and fs3 == 0 and fe3 == 0x1a and fm3 == 0x159b64 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd91fc19; op2val:0xbf032d0d;
op3val:0xd159b64; valaddr_reg:x3; val_offset:375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 375*FLEN/8, x4, x1, x2)

inst_126:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x11fc19 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x032d0d and fs3 == 0 and fe3 == 0x1a and fm3 == 0x159b64 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd91fc19; op2val:0xbf032d0d;
op3val:0xd159b64; valaddr_reg:x3; val_offset:378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 378*FLEN/8, x4, x1, x2)

inst_127:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x11fc19 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x032d0d and fs3 == 0 and fe3 == 0x1a and fm3 == 0x159b64 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd91fc19; op2val:0xbf032d0d;
op3val:0xd159b64; valaddr_reg:x3; val_offset:381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 381*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_128:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x11fc19 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x032d0d and fs3 == 0 and fe3 == 0x1a and fm3 == 0x159b64 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd91fc19; op2val:0xbf032d0d;
op3val:0xd159b64; valaddr_reg:x3; val_offset:384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 384*FLEN/8, x4, x1, x2)

inst_129:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x11fc19 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x032d0d and fs3 == 0 and fe3 == 0x1a and fm3 == 0x159b64 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd91fc19; op2val:0xbf032d0d;
op3val:0xd159b64; valaddr_reg:x3; val_offset:387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 387*FLEN/8, x4, x1, x2)

inst_130:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1a0c58 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12bc19 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x309875 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9a0c58; op2val:0xbf12bc19;
op3val:0xd309875; valaddr_reg:x3; val_offset:390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 390*FLEN/8, x4, x1, x2)

inst_131:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1a0c58 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12bc19 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x309875 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9a0c58; op2val:0xbf12bc19;
op3val:0xd309875; valaddr_reg:x3; val_offset:393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 393*FLEN/8, x4, x1, x2)

inst_132:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1a0c58 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12bc19 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x309875 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9a0c58; op2val:0xbf12bc19;
op3val:0xd309875; valaddr_reg:x3; val_offset:396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 396*FLEN/8, x4, x1, x2)

inst_133:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1a0c58 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12bc19 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x309875 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9a0c58; op2val:0xbf12bc19;
op3val:0xd309875; valaddr_reg:x3; val_offset:399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 399*FLEN/8, x4, x1, x2)

inst_134:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1a0c58 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12bc19 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x309875 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9a0c58; op2val:0xbf12bc19;
op3val:0xd309875; valaddr_reg:x3; val_offset:402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 402*FLEN/8, x4, x1, x2)

inst_135:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1c13cd and fs2 == 1 and fe2 == 0x7c and fm2 == 0x2b972c and fs3 == 0 and fe3 == 0x18 and fm3 == 0x513ac9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9c13cd; op2val:0xbe2b972c;
op3val:0xc513ac9; valaddr_reg:x3; val_offset:405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 405*FLEN/8, x4, x1, x2)

inst_136:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1c13cd and fs2 == 1 and fe2 == 0x7c and fm2 == 0x2b972c and fs3 == 0 and fe3 == 0x18 and fm3 == 0x513ac9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9c13cd; op2val:0xbe2b972c;
op3val:0xc513ac9; valaddr_reg:x3; val_offset:408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 408*FLEN/8, x4, x1, x2)

inst_137:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1c13cd and fs2 == 1 and fe2 == 0x7c and fm2 == 0x2b972c and fs3 == 0 and fe3 == 0x18 and fm3 == 0x513ac9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9c13cd; op2val:0xbe2b972c;
op3val:0xc513ac9; valaddr_reg:x3; val_offset:411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 411*FLEN/8, x4, x1, x2)

inst_138:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1c13cd and fs2 == 1 and fe2 == 0x7c and fm2 == 0x2b972c and fs3 == 0 and fe3 == 0x18 and fm3 == 0x513ac9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9c13cd; op2val:0xbe2b972c;
op3val:0xc513ac9; valaddr_reg:x3; val_offset:414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 414*FLEN/8, x4, x1, x2)

inst_139:
// fs1 == 0 and fe1 == 0x1b and fm1 == 0x1c13cd and fs2 == 1 and fe2 == 0x7c and fm2 == 0x2b972c and fs3 == 0 and fe3 == 0x18 and fm3 == 0x513ac9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xd9c13cd; op2val:0xbe2b972c;
op3val:0xc513ac9; valaddr_reg:x3; val_offset:417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 417*FLEN/8, x4, x1, x2)

inst_140:
// fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xb3a879f; op2val:0xbf439313;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 420*FLEN/8, x4, x1, x2)

inst_141:
// fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xb3a879f; op2val:0xbf439313;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 423*FLEN/8, x4, x1, x2)

inst_142:
// fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xb3a879f; op2val:0xbf439313;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 426*FLEN/8, x4, x1, x2)

inst_143:
// fs1 == 0 and fe1 == 0x16 and fm1 == 0x3a879f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x439313 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0e8078 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xb3a879f; op2val:0xbf439313;
op3val:0xb0e8078; valaddr_reg:x3; val_offset:429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 429*FLEN/8, x4, x1, x2)

inst_144:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 432*FLEN/8, x4, x1, x2)

inst_145:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 435*FLEN/8, x4, x1, x2)

inst_146:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 438*FLEN/8, x4, x1, x2)

inst_147:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 441*FLEN/8, x4, x1, x2)

inst_148:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x1940ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x4eee6f and fs3 == 0 and fe3 == 0x15 and fm3 == 0x77c1a7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xc9940ba; op2val:0xbdceee6f;
op3val:0xaf7c1a7; valaddr_reg:x3; val_offset:444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 444*FLEN/8, x4, x1, x2)

inst_149:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xc317180; valaddr_reg:x3; val_offset:447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 447*FLEN/8, x4, x1, x2)

inst_150:
// fs1 == 0 and fe1 == 0x19 and fm1 == 0x5307a2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x57419d and fs3 == 0 and fe3 == 0x18 and fm3 == 0x317180 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0xcd307a2; op2val:0xbed7419d;
op3val:0xc317180; valaddr_reg:x3; val_offset:450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 450*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xbf439313208876819,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xbf439313208876819,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xc31718004566912,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xc31718004566912,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xc31718004566912,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xc31718004566912,32,FLEN)
NAN_BOXED(0xce59ef116375025,32,FLEN)
NAN_BOXED(0xc031755f224466783,32,FLEN)
NAN_BOXED(0xd9f2c2c28535340,32,FLEN)
NAN_BOXED(0xce59ef116375025,32,FLEN)
NAN_BOXED(0xc031755f224466783,32,FLEN)
NAN_BOXED(0xd9f2c2c28535340,32,FLEN)
NAN_BOXED(0xce59ef116375025,32,FLEN)
NAN_BOXED(0xc031755f224466783,32,FLEN)
NAN_BOXED(0xd9f2c2c28535340,32,FLEN)
NAN_BOXED(0xce59ef116375025,32,FLEN)
NAN_BOXED(0xc031755f224466783,32,FLEN)
NAN_BOXED(0xd9f2c2c28535340,32,FLEN)
NAN_BOXED(0xce59ef116375025,32,FLEN)
NAN_BOXED(0xc031755f224466783,32,FLEN)
NAN_BOXED(0xd9f2c2c28535340,32,FLEN)
NAN_BOXED(0xce5b5be16380862,32,FLEN)
NAN_BOXED(0xc01fa549223299401,32,FLEN)
NAN_BOXED(0xd8f403127491889,32,FLEN)
NAN_BOXED(0xce5b5be16380862,32,FLEN)
NAN_BOXED(0xc01fa549223299401,32,FLEN)
NAN_BOXED(0xd8f403127491889,32,FLEN)
NAN_BOXED(0xce5b5be16380862,32,FLEN)
NAN_BOXED(0xc01fa549223299401,32,FLEN)
NAN_BOXED(0xd8f403127491889,32,FLEN)
NAN_BOXED(0xce5b5be16380862,32,FLEN)
NAN_BOXED(0xc01fa549223299401,32,FLEN)
NAN_BOXED(0xd8f403127491889,32,FLEN)
NAN_BOXED(0xce5b5be16380862,32,FLEN)
NAN_BOXED(0xc01fa549223299401,32,FLEN)
NAN_BOXED(0xd8f403127491889,32,FLEN)
NAN_BOXED(0xcf6a4cf17490639,32,FLEN)
NAN_BOXED(0xc01630b2222679730,32,FLEN)
NAN_BOXED(0xd90b37c27586940,32,FLEN)
NAN_BOXED(0xcf6a4cf17490639,32,FLEN)
NAN_BOXED(0xc01630b2222679730,32,FLEN)
NAN_BOXED(0xd90b37c27586940,32,FLEN)
NAN_BOXED(0xcf6a4cf17490639,32,FLEN)
NAN_BOXED(0xc01630b2222679730,32,FLEN)
NAN_BOXED(0xd90b37c27586940,32,FLEN)
NAN_BOXED(0xcf6a4cf17490639,32,FLEN)
NAN_BOXED(0xc01630b2222679730,32,FLEN)
NAN_BOXED(0xd90b37c27586940,32,FLEN)
NAN_BOXED(0xcf6a4cf17490639,32,FLEN)
NAN_BOXED(0xc01630b2222679730,32,FLEN)
NAN_BOXED(0xd90b37c27586940,32,FLEN)
NAN_BOXED(0xd0bc2a218874530,32,FLEN)
NAN_BOXED(0xbf69eca6211390118,32,FLEN)
NAN_BOXED(0xcff6ab018065584,32,FLEN)
NAN_BOXED(0xd0bc2a218874530,32,FLEN)
NAN_BOXED(0xbf69eca6211390118,32,FLEN)
NAN_BOXED(0xcff6ab018065584,32,FLEN)
NAN_BOXED(0xd0bc2a218874530,32,FLEN)
NAN_BOXED(0xbf69eca6211390118,32,FLEN)
NAN_BOXED(0xcff6ab018065584,32,FLEN)
NAN_BOXED(0xd0bc2a218874530,32,FLEN)
NAN_BOXED(0xbf69eca6211390118,32,FLEN)
NAN_BOXED(0xcff6ab018065584,32,FLEN)
NAN_BOXED(0xd0bc2a218874530,32,FLEN)
NAN_BOXED(0xbf69eca6211390118,32,FLEN)
NAN_BOXED(0xcff6ab018065584,32,FLEN)
NAN_BOXED(0xd105d0a19176202,32,FLEN)
NAN_BOXED(0xbf1a5d46206176070,32,FLEN)
NAN_BOXED(0xcae192312736291,32,FLEN)
NAN_BOXED(0xd105d0a19176202,32,FLEN)
NAN_BOXED(0xbf1a5d46206176070,32,FLEN)
NAN_BOXED(0xcae192312736291,32,FLEN)
NAN_BOXED(0xd105d0a19176202,32,FLEN)
NAN_BOXED(0xbf1a5d46206176070,32,FLEN)
NAN_BOXED(0xcae192312736291,32,FLEN)
NAN_BOXED(0xd105d0a19176202,32,FLEN)
NAN_BOXED(0xbf1a5d46206176070,32,FLEN)
NAN_BOXED(0xcae192312736291,32,FLEN)
NAN_BOXED(0xd105d0a19176202,32,FLEN)
NAN_BOXED(0xbf1a5d46206176070,32,FLEN)
NAN_BOXED(0xcae192312736291,32,FLEN)
NAN_BOXED(0xd15bc2b19528235,32,FLEN)
NAN_BOXED(0xbf932098214090392,32,FLEN)
NAN_BOXED(0xd2c1c3a20994618,32,FLEN)
NAN_BOXED(0xd15bc2b19528235,32,FLEN)
NAN_BOXED(0xbf932098214090392,32,FLEN)
NAN_BOXED(0xd2c1c3a20994618,32,FLEN)
NAN_BOXED(0xd15bc2b19528235,32,FLEN)
NAN_BOXED(0xbf932098214090392,32,FLEN)
NAN_BOXED(0xd2c1c3a20994618,32,FLEN)
NAN_BOXED(0xd15bc2b19528235,32,FLEN)
NAN_BOXED(0xbf932098214090392,32,FLEN)
NAN_BOXED(0xd2c1c3a20994618,32,FLEN)
NAN_BOXED(0xd15bc2b19528235,32,FLEN)
NAN_BOXED(0xbf932098214090392,32,FLEN)
NAN_BOXED(0xd2c1c3a20994618,32,FLEN)
NAN_BOXED(0xd16ddde19602398,32,FLEN)
NAN_BOXED(0xbf2f5df8207552504,32,FLEN)
NAN_BOXED(0xcceb21814872600,32,FLEN)
NAN_BOXED(0xd16ddde19602398,32,FLEN)
NAN_BOXED(0xbf2f5df8207552504,32,FLEN)
NAN_BOXED(0xcceb21814872600,32,FLEN)
NAN_BOXED(0xd16ddde19602398,32,FLEN)
NAN_BOXED(0xbf2f5df8207552504,32,FLEN)
NAN_BOXED(0xcceb21814872600,32,FLEN)
NAN_BOXED(0xd16ddde19602398,32,FLEN)
NAN_BOXED(0xbf2f5df8207552504,32,FLEN)
NAN_BOXED(0xcceb21814872600,32,FLEN)
NAN_BOXED(0xd16ddde19602398,32,FLEN)
NAN_BOXED(0xbf2f5df8207552504,32,FLEN)
NAN_BOXED(0xcceb21814872600,32,FLEN)
NAN_BOXED(0xd1f04c320136643,32,FLEN)
NAN_BOXED(0xbff194f8220280568,32,FLEN)
NAN_BOXED(0xd96100527938309,32,FLEN)
NAN_BOXED(0xd1f04c320136643,32,FLEN)
NAN_BOXED(0xbff194f8220280568,32,FLEN)
NAN_BOXED(0xd96100527938309,32,FLEN)
NAN_BOXED(0xd1f04c320136643,32,FLEN)
NAN_BOXED(0xbff194f8220280568,32,FLEN)
NAN_BOXED(0xd96100527938309,32,FLEN)
NAN_BOXED(0xd1f04c320136643,32,FLEN)
NAN_BOXED(0xbff194f8220280568,32,FLEN)
NAN_BOXED(0xd96100527938309,32,FLEN)
NAN_BOXED(0xd1f04c320136643,32,FLEN)
NAN_BOXED(0xbff194f8220280568,32,FLEN)
NAN_BOXED(0xd96100527938309,32,FLEN)
NAN_BOXED(0xd22883f20366911,32,FLEN)
NAN_BOXED(0xbfd48346218375494,32,FLEN)
NAN_BOXED(0xd86ec2d26946093,32,FLEN)
NAN_BOXED(0xd22883f20366911,32,FLEN)
NAN_BOXED(0xbfd48346218375494,32,FLEN)
NAN_BOXED(0xd86ec2d26946093,32,FLEN)
NAN_BOXED(0xd22883f20366911,32,FLEN)
NAN_BOXED(0xbfd48346218375494,32,FLEN)
NAN_BOXED(0xd86ec2d26946093,32,FLEN)
NAN_BOXED(0xd22883f20366911,32,FLEN)
NAN_BOXED(0xbfd48346218375494,32,FLEN)
NAN_BOXED(0xd86ec2d26946093,32,FLEN)
NAN_BOXED(0xd22883f20366911,32,FLEN)
NAN_BOXED(0xbfd48346218375494,32,FLEN)
NAN_BOXED(0xd86ec2d26946093,32,FLEN)
NAN_BOXED(0xd2593bd20566461,32,FLEN)
NAN_BOXED(0xbffa8a3f220867647,32,FLEN)
NAN_BOXED(0xda20bb128723633,32,FLEN)
NAN_BOXED(0xd2593bd20566461,32,FLEN)
NAN_BOXED(0xbffa8a3f220867647,32,FLEN)
NAN_BOXED(0xda20bb128723633,32,FLEN)
NAN_BOXED(0xd2593bd20566461,32,FLEN)
NAN_BOXED(0xbffa8a3f220867647,32,FLEN)
NAN_BOXED(0xda20bb128723633,32,FLEN)
NAN_BOXED(0xd2593bd20566461,32,FLEN)
NAN_BOXED(0xbffa8a3f220867647,32,FLEN)
NAN_BOXED(0xda20bb128723633,32,FLEN)
NAN_BOXED(0xd2593bd20566461,32,FLEN)
NAN_BOXED(0xbffa8a3f220867647,32,FLEN)
NAN_BOXED(0xda20bb128723633,32,FLEN)
NAN_BOXED(0xd2a9dd420896724,32,FLEN)
NAN_BOXED(0xbf88764c213391436,32,FLEN)
NAN_BOXED(0xd35e56121635937,32,FLEN)
NAN_BOXED(0xd2a9dd420896724,32,FLEN)
NAN_BOXED(0xbf88764c213391436,32,FLEN)
NAN_BOXED(0xd35e56121635937,32,FLEN)
NAN_BOXED(0xd2a9dd420896724,32,FLEN)
NAN_BOXED(0xbf88764c213391436,32,FLEN)
NAN_BOXED(0xd35e56121635937,32,FLEN)
NAN_BOXED(0xd2a9dd420896724,32,FLEN)
NAN_BOXED(0xbf88764c213391436,32,FLEN)
NAN_BOXED(0xd35e56121635937,32,FLEN)
NAN_BOXED(0xd2a9dd420896724,32,FLEN)
NAN_BOXED(0xbf88764c213391436,32,FLEN)
NAN_BOXED(0xd35e56121635937,32,FLEN)
NAN_BOXED(0xd383b1721788951,32,FLEN)
NAN_BOXED(0xbfcf8193218047379,32,FLEN)
NAN_BOXED(0xd95550727890439,32,FLEN)
NAN_BOXED(0xd383b1721788951,32,FLEN)
NAN_BOXED(0xbfcf8193218047379,32,FLEN)
NAN_BOXED(0xd95550727890439,32,FLEN)
NAN_BOXED(0xd383b1721788951,32,FLEN)
NAN_BOXED(0xbfcf8193218047379,32,FLEN)
NAN_BOXED(0xd95550727890439,32,FLEN)
NAN_BOXED(0xd383b1721788951,32,FLEN)
NAN_BOXED(0xbfcf8193218047379,32,FLEN)
NAN_BOXED(0xd95550727890439,32,FLEN)
NAN_BOXED(0xd383b1721788951,32,FLEN)
NAN_BOXED(0xbfcf8193218047379,32,FLEN)
NAN_BOXED(0xd95550727890439,32,FLEN)
NAN_BOXED(0xd3c9c8a22076042,32,FLEN)
NAN_BOXED(0xbe8b8632196814898,32,FLEN)
NAN_BOXED(0xc4d97bc06411708,32,FLEN)
NAN_BOXED(0xd3c9c8a22076042,32,FLEN)
NAN_BOXED(0xbe8b8632196814898,32,FLEN)
NAN_BOXED(0xc4d97bc06411708,32,FLEN)
NAN_BOXED(0xd3c9c8a22076042,32,FLEN)
NAN_BOXED(0xbe8b8632196814898,32,FLEN)
NAN_BOXED(0xc4d97bc06411708,32,FLEN)
NAN_BOXED(0xd3c9c8a22076042,32,FLEN)
NAN_BOXED(0xbe8b8632196814898,32,FLEN)
NAN_BOXED(0xc4d97bc06411708,32,FLEN)
NAN_BOXED(0xd3c9c8a22076042,32,FLEN)
NAN_BOXED(0xbe8b8632196814898,32,FLEN)
NAN_BOXED(0xc4d97bc06411708,32,FLEN)
NAN_BOXED(0xd44a3df22602207,32,FLEN)
NAN_BOXED(0xbf802e60212848736,32,FLEN)
NAN_BOXED(0xd44eb1d22620445,32,FLEN)
NAN_BOXED(0xd44a3df22602207,32,FLEN)
NAN_BOXED(0xbf802e60212848736,32,FLEN)
NAN_BOXED(0xd44eb1d22620445,32,FLEN)
NAN_BOXED(0xd44a3df22602207,32,FLEN)
NAN_BOXED(0xbf802e60212848736,32,FLEN)
NAN_BOXED(0xd44eb1d22620445,32,FLEN)
NAN_BOXED(0xd44a3df22602207,32,FLEN)
NAN_BOXED(0xbf802e60212848736,32,FLEN)
NAN_BOXED(0xd44eb1d22620445,32,FLEN)
NAN_BOXED(0xd44a3df22602207,32,FLEN)
NAN_BOXED(0xbf802e60212848736,32,FLEN)
NAN_BOXED(0xd44eb1d22620445,32,FLEN)
NAN_BOXED(0xd59570623958790,32,FLEN)
NAN_BOXED(0xbeeb90f4203109108,32,FLEN)
NAN_BOXED(0xcc7fdf314433267,32,FLEN)
NAN_BOXED(0xd59570623958790,32,FLEN)
NAN_BOXED(0xbeeb90f4203109108,32,FLEN)
NAN_BOXED(0xcc7fdf314433267,32,FLEN)
NAN_BOXED(0xd59570623958790,32,FLEN)
NAN_BOXED(0xbeeb90f4203109108,32,FLEN)
NAN_BOXED(0xcc7fdf314433267,32,FLEN)
NAN_BOXED(0xd59570623958790,32,FLEN)
NAN_BOXED(0xbeeb90f4203109108,32,FLEN)
NAN_BOXED(0xcc7fdf314433267,32,FLEN)
NAN_BOXED(0xd59570623958790,32,FLEN)
NAN_BOXED(0xbeeb90f4203109108,32,FLEN)
NAN_BOXED(0xcc7fdf314433267,32,FLEN)
NAN_BOXED(0xd5ae19424059796,32,FLEN)
NAN_BOXED(0xbe8a09be196717502,32,FLEN)
NAN_BOXED(0xc6c0bdd08407517,32,FLEN)
NAN_BOXED(0xd5ae19424059796,32,FLEN)
NAN_BOXED(0xbe8a09be196717502,32,FLEN)
NAN_BOXED(0xc6c0bdd08407517,32,FLEN)
NAN_BOXED(0xd5ae19424059796,32,FLEN)
NAN_BOXED(0xbe8a09be196717502,32,FLEN)
NAN_BOXED(0xc6c0bdd08407517,32,FLEN)
NAN_BOXED(0xd5ae19424059796,32,FLEN)
NAN_BOXED(0xbe8a09be196717502,32,FLEN)
NAN_BOXED(0xc6c0bdd08407517,32,FLEN)
NAN_BOXED(0xd5ae19424059796,32,FLEN)
NAN_BOXED(0xbe8a09be196717502,32,FLEN)
NAN_BOXED(0xc6c0bdd08407517,32,FLEN)
NAN_BOXED(0xd6aa17e25091966,32,FLEN)
NAN_BOXED(0xbfb01eb9215990457,32,FLEN)
NAN_BOXED(0xda16b3028682544,32,FLEN)
NAN_BOXED(0xd6aa17e25091966,32,FLEN)
NAN_BOXED(0xbfb01eb9215990457,32,FLEN)
NAN_BOXED(0xda16b3028682544,32,FLEN)
NAN_BOXED(0xd6aa17e25091966,32,FLEN)
NAN_BOXED(0xbfb01eb9215990457,32,FLEN)
NAN_BOXED(0xda16b3028682544,32,FLEN)
NAN_BOXED(0xd6aa17e25091966,32,FLEN)
NAN_BOXED(0xbfb01eb9215990457,32,FLEN)
NAN_BOXED(0xda16b3028682544,32,FLEN)
NAN_BOXED(0xd6aa17e25091966,32,FLEN)
NAN_BOXED(0xbfb01eb9215990457,32,FLEN)
NAN_BOXED(0xda16b3028682544,32,FLEN)
NAN_BOXED(0xd6e53b425334196,32,FLEN)
NAN_BOXED(0xbf9e02f8214803704,32,FLEN)
NAN_BOXED(0xd931a6d27744365,32,FLEN)
NAN_BOXED(0xd6e53b425334196,32,FLEN)
NAN_BOXED(0xbf9e02f8214803704,32,FLEN)
NAN_BOXED(0xd931a6d27744365,32,FLEN)
NAN_BOXED(0xd6e53b425334196,32,FLEN)
NAN_BOXED(0xbf9e02f8214803704,32,FLEN)
NAN_BOXED(0xd931a6d27744365,32,FLEN)
NAN_BOXED(0xd6e53b425334196,32,FLEN)
NAN_BOXED(0xbf9e02f8214803704,32,FLEN)
NAN_BOXED(0xd931a6d27744365,32,FLEN)
NAN_BOXED(0xd6e53b425334196,32,FLEN)
NAN_BOXED(0xbf9e02f8214803704,32,FLEN)
NAN_BOXED(0xd931a6d27744365,32,FLEN)
NAN_BOXED(0xd74b03525751093,32,FLEN)
NAN_BOXED(0xbf72cefc211972348,32,FLEN)
NAN_BOXED(0xd68146924924777,32,FLEN)
NAN_BOXED(0xd74b03525751093,32,FLEN)
NAN_BOXED(0xbf72cefc211972348,32,FLEN)
NAN_BOXED(0xd68146924924777,32,FLEN)
NAN_BOXED(0xd74b03525751093,32,FLEN)
NAN_BOXED(0xbf72cefc211972348,32,FLEN)
NAN_BOXED(0xd68146924924777,32,FLEN)
NAN_BOXED(0xd74b03525751093,32,FLEN)
NAN_BOXED(0xbf72cefc211972348,32,FLEN)
NAN_BOXED(0xd68146924924777,32,FLEN)
NAN_BOXED(0xd74b03525751093,32,FLEN)
NAN_BOXED(0xbf72cefc211972348,32,FLEN)
NAN_BOXED(0xd68146924924777,32,FLEN)
NAN_BOXED(0xd77920b25939979,32,FLEN)
NAN_BOXED(0xbf8481cd213132237,32,FLEN)
NAN_BOXED(0xd8024d526501845,32,FLEN)
NAN_BOXED(0xd77920b25939979,32,FLEN)
NAN_BOXED(0xbf8481cd213132237,32,FLEN)
NAN_BOXED(0xd8024d526501845,32,FLEN)
NAN_BOXED(0xd77920b25939979,32,FLEN)
NAN_BOXED(0xbf8481cd213132237,32,FLEN)
NAN_BOXED(0xd8024d526501845,32,FLEN)
NAN_BOXED(0xd77920b25939979,32,FLEN)
NAN_BOXED(0xbf8481cd213132237,32,FLEN)
NAN_BOXED(0xd8024d526501845,32,FLEN)
NAN_BOXED(0xd77920b25939979,32,FLEN)
NAN_BOXED(0xbf8481cd213132237,32,FLEN)
NAN_BOXED(0xd8024d526501845,32,FLEN)
NAN_BOXED(0xd87914326988355,32,FLEN)
NAN_BOXED(0xbf618104210838276,32,FLEN)
NAN_BOXED(0xd6ed5fe25367550,32,FLEN)
NAN_BOXED(0xd87914326988355,32,FLEN)
NAN_BOXED(0xbf618104210838276,32,FLEN)
NAN_BOXED(0xd6ed5fe25367550,32,FLEN)
NAN_BOXED(0xd87914326988355,32,FLEN)
NAN_BOXED(0xbf618104210838276,32,FLEN)
NAN_BOXED(0xd6ed5fe25367550,32,FLEN)
NAN_BOXED(0xd87914326988355,32,FLEN)
NAN_BOXED(0xbf618104210838276,32,FLEN)
NAN_BOXED(0xd6ed5fe25367550,32,FLEN)
NAN_BOXED(0xd87914326988355,32,FLEN)
NAN_BOXED(0xbf618104210838276,32,FLEN)
NAN_BOXED(0xd6ed5fe25367550,32,FLEN)
NAN_BOXED(0xd90fd8227605890,32,FLEN)
NAN_BOXED(0xbf6443ad211019181,32,FLEN)
NAN_BOXED(0xd81481c26576412,32,FLEN)
NAN_BOXED(0xd90fd8227605890,32,FLEN)
NAN_BOXED(0xbf6443ad211019181,32,FLEN)
NAN_BOXED(0xd81481c26576412,32,FLEN)
NAN_BOXED(0xd90fd8227605890,32,FLEN)
NAN_BOXED(0xbf6443ad211019181,32,FLEN)
NAN_BOXED(0xd81481c26576412,32,FLEN)
NAN_BOXED(0xd90fd8227605890,32,FLEN)
NAN_BOXED(0xbf6443ad211019181,32,FLEN)
NAN_BOXED(0xd81481c26576412,32,FLEN)
NAN_BOXED(0xd90fd8227605890,32,FLEN)
NAN_BOXED(0xbf6443ad211019181,32,FLEN)
NAN_BOXED(0xd81481c26576412,32,FLEN)
NAN_BOXED(0xd91fc1927671065,32,FLEN)
NAN_BOXED(0xbf032d0d204656397,32,FLEN)
NAN_BOXED(0xd159b6419519844,32,FLEN)
NAN_BOXED(0xd91fc1927671065,32,FLEN)
NAN_BOXED(0xbf032d0d204656397,32,FLEN)
NAN_BOXED(0xd159b6419519844,32,FLEN)
NAN_BOXED(0xd91fc1927671065,32,FLEN)
NAN_BOXED(0xbf032d0d204656397,32,FLEN)
NAN_BOXED(0xd159b6419519844,32,FLEN)
NAN_BOXED(0xd91fc1927671065,32,FLEN)
NAN_BOXED(0xbf032d0d204656397,32,FLEN)
NAN_BOXED(0xd159b6419519844,32,FLEN)
NAN_BOXED(0xd91fc1927671065,32,FLEN)
NAN_BOXED(0xbf032d0d204656397,32,FLEN)
NAN_BOXED(0xd159b6419519844,32,FLEN)
NAN_BOXED(0xd9a0c5828199512,32,FLEN)
NAN_BOXED(0xbf12bc19205676057,32,FLEN)
NAN_BOXED(0xd30987521288565,32,FLEN)
NAN_BOXED(0xd9a0c5828199512,32,FLEN)
NAN_BOXED(0xbf12bc19205676057,32,FLEN)
NAN_BOXED(0xd30987521288565,32,FLEN)
NAN_BOXED(0xd9a0c5828199512,32,FLEN)
NAN_BOXED(0xbf12bc19205676057,32,FLEN)
NAN_BOXED(0xd30987521288565,32,FLEN)
NAN_BOXED(0xd9a0c5828199512,32,FLEN)
NAN_BOXED(0xbf12bc19205676057,32,FLEN)
NAN_BOXED(0xd30987521288565,32,FLEN)
NAN_BOXED(0xd9a0c5828199512,32,FLEN)
NAN_BOXED(0xbf12bc19205676057,32,FLEN)
NAN_BOXED(0xd30987521288565,32,FLEN)
NAN_BOXED(0xd9c13cd28332493,32,FLEN)
NAN_BOXED(0xbe2b972c190527788,32,FLEN)
NAN_BOXED(0xc513ac906650057,32,FLEN)
NAN_BOXED(0xd9c13cd28332493,32,FLEN)
NAN_BOXED(0xbe2b972c190527788,32,FLEN)
NAN_BOXED(0xc513ac906650057,32,FLEN)
NAN_BOXED(0xd9c13cd28332493,32,FLEN)
NAN_BOXED(0xbe2b972c190527788,32,FLEN)
NAN_BOXED(0xc513ac906650057,32,FLEN)
NAN_BOXED(0xd9c13cd28332493,32,FLEN)
NAN_BOXED(0xbe2b972c190527788,32,FLEN)
NAN_BOXED(0xc513ac906650057,32,FLEN)
NAN_BOXED(0xd9c13cd28332493,32,FLEN)
NAN_BOXED(0xbe2b972c190527788,32,FLEN)
NAN_BOXED(0xc513ac906650057,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xbf439313208876819,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xbf439313208876819,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xbf439313208876819,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xb3a879f88385183,32,FLEN)
NAN_BOXED(0xbf439313208876819,32,FLEN)
NAN_BOXED(0xb0e807885499768,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xc9940ba11370170,32,FLEN)
NAN_BOXED(0xbdceee6f184455279,32,FLEN)
NAN_BOXED(0xaf7c1a784009127,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xc31718004566912,32,FLEN)
NAN_BOXED(0xcd307a215156642,32,FLEN)
NAN_BOXED(0xbed7419d201778077,32,FLEN)
NAN_BOXED(0xc31718004566912,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 46*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
