
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_19942:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x8780001f; valaddr_reg:x12; val_offset:59763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59763*FLEN/8, x13, x9, x10)

inst_19943:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x87fffff0; valaddr_reg:x12; val_offset:59766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59766*FLEN/8, x13, x9, x10)

inst_19944:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x8780000f; valaddr_reg:x12; val_offset:59769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59769*FLEN/8, x13, x9, x10)

inst_19945:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x87fffff8; valaddr_reg:x12; val_offset:59772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59772*FLEN/8, x13, x9, x10)

inst_19946:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x87800007; valaddr_reg:x12; val_offset:59775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59775*FLEN/8, x13, x9, x10)

inst_19947:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x87fffffc; valaddr_reg:x12; val_offset:59778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59778*FLEN/8, x13, x9, x10)

inst_19948:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x87800003; valaddr_reg:x12; val_offset:59781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59781*FLEN/8, x13, x9, x10)

inst_19949:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x87fffffe; valaddr_reg:x12; val_offset:59784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59784*FLEN/8, x13, x9, x10)

inst_19950:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:59787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59787*FLEN/8, x13, x9, x10)

inst_19951:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:59790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59790*FLEN/8, x13, x9, x10)

inst_19952:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:59793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59793*FLEN/8, x13, x9, x10)

inst_19953:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:59796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59796*FLEN/8, x13, x9, x10)

inst_19954:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:59799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59799*FLEN/8, x13, x9, x10)

inst_19955:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:59802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59802*FLEN/8, x13, x9, x10)

inst_19956:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:59805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59805*FLEN/8, x13, x9, x10)

inst_19957:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:59808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59808*FLEN/8, x13, x9, x10)

inst_19958:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:59811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59811*FLEN/8, x13, x9, x10)

inst_19959:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:59814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59814*FLEN/8, x13, x9, x10)

inst_19960:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:59817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59817*FLEN/8, x13, x9, x10)

inst_19961:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:59820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59820*FLEN/8, x13, x9, x10)

inst_19962:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:59823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59823*FLEN/8, x13, x9, x10)

inst_19963:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:59826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59826*FLEN/8, x13, x9, x10)

inst_19964:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:59829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59829*FLEN/8, x13, x9, x10)

inst_19965:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b0da; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:59832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59832*FLEN/8, x13, x9, x10)

inst_19966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88000001; valaddr_reg:x12; val_offset:59835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59835*FLEN/8, x13, x9, x10)

inst_19967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88000000; valaddr_reg:x12; val_offset:59838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59838*FLEN/8, x13, x9, x10)

inst_19968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fffff; valaddr_reg:x12; val_offset:59841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59841*FLEN/8, x13, x9, x10)

inst_19969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88400000; valaddr_reg:x12; val_offset:59844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59844*FLEN/8, x13, x9, x10)

inst_19970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x883fffff; valaddr_reg:x12; val_offset:59847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59847*FLEN/8, x13, x9, x10)

inst_19971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88600000; valaddr_reg:x12; val_offset:59850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59850*FLEN/8, x13, x9, x10)

inst_19972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x881fffff; valaddr_reg:x12; val_offset:59853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59853*FLEN/8, x13, x9, x10)

inst_19973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88700000; valaddr_reg:x12; val_offset:59856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59856*FLEN/8, x13, x9, x10)

inst_19974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x880fffff; valaddr_reg:x12; val_offset:59859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59859*FLEN/8, x13, x9, x10)

inst_19975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88780000; valaddr_reg:x12; val_offset:59862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59862*FLEN/8, x13, x9, x10)

inst_19976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8807ffff; valaddr_reg:x12; val_offset:59865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59865*FLEN/8, x13, x9, x10)

inst_19977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887c0000; valaddr_reg:x12; val_offset:59868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59868*FLEN/8, x13, x9, x10)

inst_19978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8803ffff; valaddr_reg:x12; val_offset:59871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59871*FLEN/8, x13, x9, x10)

inst_19979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887e0000; valaddr_reg:x12; val_offset:59874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59874*FLEN/8, x13, x9, x10)

inst_19980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8801ffff; valaddr_reg:x12; val_offset:59877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59877*FLEN/8, x13, x9, x10)

inst_19981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887f0000; valaddr_reg:x12; val_offset:59880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59880*FLEN/8, x13, x9, x10)

inst_19982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8800ffff; valaddr_reg:x12; val_offset:59883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59883*FLEN/8, x13, x9, x10)

inst_19983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887f8000; valaddr_reg:x12; val_offset:59886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59886*FLEN/8, x13, x9, x10)

inst_19984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88007fff; valaddr_reg:x12; val_offset:59889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59889*FLEN/8, x13, x9, x10)

inst_19985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fc000; valaddr_reg:x12; val_offset:59892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59892*FLEN/8, x13, x9, x10)

inst_19986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88003fff; valaddr_reg:x12; val_offset:59895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59895*FLEN/8, x13, x9, x10)

inst_19987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fe000; valaddr_reg:x12; val_offset:59898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59898*FLEN/8, x13, x9, x10)

inst_19988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88001fff; valaddr_reg:x12; val_offset:59901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59901*FLEN/8, x13, x9, x10)

inst_19989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ff000; valaddr_reg:x12; val_offset:59904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59904*FLEN/8, x13, x9, x10)

inst_19990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88000fff; valaddr_reg:x12; val_offset:59907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59907*FLEN/8, x13, x9, x10)

inst_19991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ff800; valaddr_reg:x12; val_offset:59910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59910*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_156)
inst_19992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x880007ff; valaddr_reg:x12; val_offset:59913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59913*FLEN/8, x13, x9, x10)

inst_19993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ffc00; valaddr_reg:x12; val_offset:59916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59916*FLEN/8, x13, x9, x10)

inst_19994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x880003ff; valaddr_reg:x12; val_offset:59919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59919*FLEN/8, x13, x9, x10)

inst_19995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ffe00; valaddr_reg:x12; val_offset:59922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59922*FLEN/8, x13, x9, x10)

inst_19996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x880001ff; valaddr_reg:x12; val_offset:59925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59925*FLEN/8, x13, x9, x10)

inst_19997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fff00; valaddr_reg:x12; val_offset:59928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59928*FLEN/8, x13, x9, x10)

inst_19998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x880000ff; valaddr_reg:x12; val_offset:59931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59931*FLEN/8, x13, x9, x10)

inst_19999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fff80; valaddr_reg:x12; val_offset:59934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59934*FLEN/8, x13, x9, x10)

inst_20000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8800007f; valaddr_reg:x12; val_offset:59937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59937*FLEN/8, x13, x9, x10)

inst_20001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fffc0; valaddr_reg:x12; val_offset:59940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59940*FLEN/8, x13, x9, x10)

inst_20002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8800003f; valaddr_reg:x12; val_offset:59943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59943*FLEN/8, x13, x9, x10)

inst_20003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887fffe0; valaddr_reg:x12; val_offset:59946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59946*FLEN/8, x13, x9, x10)

inst_20004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8800001f; valaddr_reg:x12; val_offset:59949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59949*FLEN/8, x13, x9, x10)

inst_20005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ffff0; valaddr_reg:x12; val_offset:59952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59952*FLEN/8, x13, x9, x10)

inst_20006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8800000f; valaddr_reg:x12; val_offset:59955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59955*FLEN/8, x13, x9, x10)

inst_20007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ffff8; valaddr_reg:x12; val_offset:59958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59958*FLEN/8, x13, x9, x10)

inst_20008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88000007; valaddr_reg:x12; val_offset:59961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59961*FLEN/8, x13, x9, x10)

inst_20009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ffffc; valaddr_reg:x12; val_offset:59964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59964*FLEN/8, x13, x9, x10)

inst_20010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x88000003; valaddr_reg:x12; val_offset:59967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59967*FLEN/8, x13, x9, x10)

inst_20011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x887ffffe; valaddr_reg:x12; val_offset:59970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59970*FLEN/8, x13, x9, x10)

inst_20012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:59973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59973*FLEN/8, x13, x9, x10)

inst_20013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:59976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59976*FLEN/8, x13, x9, x10)

inst_20014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:59979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59979*FLEN/8, x13, x9, x10)

inst_20015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:59982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59982*FLEN/8, x13, x9, x10)

inst_20016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:59985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59985*FLEN/8, x13, x9, x10)

inst_20017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:59988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59988*FLEN/8, x13, x9, x10)

inst_20018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:59991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59991*FLEN/8, x13, x9, x10)

inst_20019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:59994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59994*FLEN/8, x13, x9, x10)

inst_20020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:59997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 59997*FLEN/8, x13, x9, x10)

inst_20021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:60000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60000*FLEN/8, x13, x9, x10)

inst_20022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:60003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60003*FLEN/8, x13, x9, x10)

inst_20023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:60006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60006*FLEN/8, x13, x9, x10)

inst_20024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:60009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60009*FLEN/8, x13, x9, x10)

inst_20025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:60012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60012*FLEN/8, x13, x9, x10)

inst_20026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:60015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60015*FLEN/8, x13, x9, x10)

inst_20027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec9e9c9; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:60018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60018*FLEN/8, x13, x9, x10)

inst_20028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800001; valaddr_reg:x12; val_offset:60021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60021*FLEN/8, x13, x9, x10)

inst_20029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800000; valaddr_reg:x12; val_offset:60024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60024*FLEN/8, x13, x9, x10)

inst_20030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffffff; valaddr_reg:x12; val_offset:60027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60027*FLEN/8, x13, x9, x10)

inst_20031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88c00000; valaddr_reg:x12; val_offset:60030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60030*FLEN/8, x13, x9, x10)

inst_20032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88bfffff; valaddr_reg:x12; val_offset:60033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60033*FLEN/8, x13, x9, x10)

inst_20033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88e00000; valaddr_reg:x12; val_offset:60036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60036*FLEN/8, x13, x9, x10)

inst_20034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x889fffff; valaddr_reg:x12; val_offset:60039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60039*FLEN/8, x13, x9, x10)

inst_20035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88f00000; valaddr_reg:x12; val_offset:60042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60042*FLEN/8, x13, x9, x10)

inst_20036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888fffff; valaddr_reg:x12; val_offset:60045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60045*FLEN/8, x13, x9, x10)

inst_20037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88f80000; valaddr_reg:x12; val_offset:60048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60048*FLEN/8, x13, x9, x10)

inst_20038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8887ffff; valaddr_reg:x12; val_offset:60051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60051*FLEN/8, x13, x9, x10)

inst_20039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fc0000; valaddr_reg:x12; val_offset:60054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60054*FLEN/8, x13, x9, x10)

inst_20040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8883ffff; valaddr_reg:x12; val_offset:60057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60057*FLEN/8, x13, x9, x10)

inst_20041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fe0000; valaddr_reg:x12; val_offset:60060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60060*FLEN/8, x13, x9, x10)

inst_20042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8881ffff; valaddr_reg:x12; val_offset:60063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60063*FLEN/8, x13, x9, x10)

inst_20043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ff0000; valaddr_reg:x12; val_offset:60066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60066*FLEN/8, x13, x9, x10)

inst_20044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880ffff; valaddr_reg:x12; val_offset:60069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60069*FLEN/8, x13, x9, x10)

inst_20045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ff8000; valaddr_reg:x12; val_offset:60072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60072*FLEN/8, x13, x9, x10)

inst_20046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88807fff; valaddr_reg:x12; val_offset:60075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60075*FLEN/8, x13, x9, x10)

inst_20047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffc000; valaddr_reg:x12; val_offset:60078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60078*FLEN/8, x13, x9, x10)

inst_20048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88803fff; valaddr_reg:x12; val_offset:60081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60081*FLEN/8, x13, x9, x10)

inst_20049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffe000; valaddr_reg:x12; val_offset:60084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60084*FLEN/8, x13, x9, x10)

inst_20050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88801fff; valaddr_reg:x12; val_offset:60087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60087*FLEN/8, x13, x9, x10)

inst_20051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fff000; valaddr_reg:x12; val_offset:60090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60090*FLEN/8, x13, x9, x10)

inst_20052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800fff; valaddr_reg:x12; val_offset:60093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60093*FLEN/8, x13, x9, x10)

inst_20053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fff800; valaddr_reg:x12; val_offset:60096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60096*FLEN/8, x13, x9, x10)

inst_20054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888007ff; valaddr_reg:x12; val_offset:60099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60099*FLEN/8, x13, x9, x10)

inst_20055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffc00; valaddr_reg:x12; val_offset:60102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60102*FLEN/8, x13, x9, x10)

inst_20056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888003ff; valaddr_reg:x12; val_offset:60105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60105*FLEN/8, x13, x9, x10)

inst_20057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffe00; valaddr_reg:x12; val_offset:60108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60108*FLEN/8, x13, x9, x10)

inst_20058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888001ff; valaddr_reg:x12; val_offset:60111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60111*FLEN/8, x13, x9, x10)

inst_20059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffff00; valaddr_reg:x12; val_offset:60114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60114*FLEN/8, x13, x9, x10)

inst_20060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888000ff; valaddr_reg:x12; val_offset:60117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60117*FLEN/8, x13, x9, x10)

inst_20061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffff80; valaddr_reg:x12; val_offset:60120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60120*FLEN/8, x13, x9, x10)

inst_20062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880007f; valaddr_reg:x12; val_offset:60123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60123*FLEN/8, x13, x9, x10)

inst_20063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffffc0; valaddr_reg:x12; val_offset:60126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60126*FLEN/8, x13, x9, x10)

inst_20064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880003f; valaddr_reg:x12; val_offset:60129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60129*FLEN/8, x13, x9, x10)

inst_20065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffffe0; valaddr_reg:x12; val_offset:60132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60132*FLEN/8, x13, x9, x10)

inst_20066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880001f; valaddr_reg:x12; val_offset:60135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60135*FLEN/8, x13, x9, x10)

inst_20067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffff0; valaddr_reg:x12; val_offset:60138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60138*FLEN/8, x13, x9, x10)

inst_20068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880000f; valaddr_reg:x12; val_offset:60141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60141*FLEN/8, x13, x9, x10)

inst_20069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffff8; valaddr_reg:x12; val_offset:60144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60144*FLEN/8, x13, x9, x10)

inst_20070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800007; valaddr_reg:x12; val_offset:60147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60147*FLEN/8, x13, x9, x10)

inst_20071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffffc; valaddr_reg:x12; val_offset:60150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60150*FLEN/8, x13, x9, x10)

inst_20072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800003; valaddr_reg:x12; val_offset:60153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60153*FLEN/8, x13, x9, x10)

inst_20073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffffe; valaddr_reg:x12; val_offset:60156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60156*FLEN/8, x13, x9, x10)

inst_20074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:60159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60159*FLEN/8, x13, x9, x10)

inst_20075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:60162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60162*FLEN/8, x13, x9, x10)

inst_20076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:60165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60165*FLEN/8, x13, x9, x10)

inst_20077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:60168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60168*FLEN/8, x13, x9, x10)

inst_20078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:60171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60171*FLEN/8, x13, x9, x10)

inst_20079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:60174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60174*FLEN/8, x13, x9, x10)

inst_20080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:60177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60177*FLEN/8, x13, x9, x10)

inst_20081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:60180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60180*FLEN/8, x13, x9, x10)

inst_20082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:60183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60183*FLEN/8, x13, x9, x10)

inst_20083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:60186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60186*FLEN/8, x13, x9, x10)

inst_20084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:60189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60189*FLEN/8, x13, x9, x10)

inst_20085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:60192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60192*FLEN/8, x13, x9, x10)

inst_20086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:60195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60195*FLEN/8, x13, x9, x10)

inst_20087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:60198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60198*FLEN/8, x13, x9, x10)

inst_20088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:60201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60201*FLEN/8, x13, x9, x10)

inst_20089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:60204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60204*FLEN/8, x13, x9, x10)

inst_20090:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89000001; valaddr_reg:x12; val_offset:60207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60207*FLEN/8, x13, x9, x10)

inst_20091:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89000000; valaddr_reg:x12; val_offset:60210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60210*FLEN/8, x13, x9, x10)

inst_20092:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fffff; valaddr_reg:x12; val_offset:60213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60213*FLEN/8, x13, x9, x10)

inst_20093:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89400000; valaddr_reg:x12; val_offset:60216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60216*FLEN/8, x13, x9, x10)

inst_20094:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x893fffff; valaddr_reg:x12; val_offset:60219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60219*FLEN/8, x13, x9, x10)

inst_20095:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89600000; valaddr_reg:x12; val_offset:60222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60222*FLEN/8, x13, x9, x10)

inst_20096:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x891fffff; valaddr_reg:x12; val_offset:60225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60225*FLEN/8, x13, x9, x10)

inst_20097:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89700000; valaddr_reg:x12; val_offset:60228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60228*FLEN/8, x13, x9, x10)

inst_20098:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x890fffff; valaddr_reg:x12; val_offset:60231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60231*FLEN/8, x13, x9, x10)

inst_20099:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89780000; valaddr_reg:x12; val_offset:60234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60234*FLEN/8, x13, x9, x10)

inst_20100:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8907ffff; valaddr_reg:x12; val_offset:60237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60237*FLEN/8, x13, x9, x10)

inst_20101:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897c0000; valaddr_reg:x12; val_offset:60240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60240*FLEN/8, x13, x9, x10)

inst_20102:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8903ffff; valaddr_reg:x12; val_offset:60243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60243*FLEN/8, x13, x9, x10)

inst_20103:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897e0000; valaddr_reg:x12; val_offset:60246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60246*FLEN/8, x13, x9, x10)

inst_20104:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8901ffff; valaddr_reg:x12; val_offset:60249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60249*FLEN/8, x13, x9, x10)

inst_20105:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897f0000; valaddr_reg:x12; val_offset:60252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60252*FLEN/8, x13, x9, x10)

inst_20106:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8900ffff; valaddr_reg:x12; val_offset:60255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60255*FLEN/8, x13, x9, x10)

inst_20107:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897f8000; valaddr_reg:x12; val_offset:60258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60258*FLEN/8, x13, x9, x10)

inst_20108:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89007fff; valaddr_reg:x12; val_offset:60261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60261*FLEN/8, x13, x9, x10)

inst_20109:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fc000; valaddr_reg:x12; val_offset:60264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60264*FLEN/8, x13, x9, x10)

inst_20110:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89003fff; valaddr_reg:x12; val_offset:60267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60267*FLEN/8, x13, x9, x10)

inst_20111:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fe000; valaddr_reg:x12; val_offset:60270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60270*FLEN/8, x13, x9, x10)

inst_20112:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89001fff; valaddr_reg:x12; val_offset:60273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60273*FLEN/8, x13, x9, x10)

inst_20113:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ff000; valaddr_reg:x12; val_offset:60276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60276*FLEN/8, x13, x9, x10)

inst_20114:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89000fff; valaddr_reg:x12; val_offset:60279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60279*FLEN/8, x13, x9, x10)

inst_20115:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ff800; valaddr_reg:x12; val_offset:60282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60282*FLEN/8, x13, x9, x10)

inst_20116:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x890007ff; valaddr_reg:x12; val_offset:60285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60285*FLEN/8, x13, x9, x10)

inst_20117:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ffc00; valaddr_reg:x12; val_offset:60288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60288*FLEN/8, x13, x9, x10)

inst_20118:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x890003ff; valaddr_reg:x12; val_offset:60291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60291*FLEN/8, x13, x9, x10)

inst_20119:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ffe00; valaddr_reg:x12; val_offset:60294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60294*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_157)
inst_20120:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x890001ff; valaddr_reg:x12; val_offset:60297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60297*FLEN/8, x13, x9, x10)

inst_20121:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fff00; valaddr_reg:x12; val_offset:60300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60300*FLEN/8, x13, x9, x10)

inst_20122:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x890000ff; valaddr_reg:x12; val_offset:60303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60303*FLEN/8, x13, x9, x10)

inst_20123:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fff80; valaddr_reg:x12; val_offset:60306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60306*FLEN/8, x13, x9, x10)

inst_20124:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8900007f; valaddr_reg:x12; val_offset:60309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60309*FLEN/8, x13, x9, x10)

inst_20125:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fffc0; valaddr_reg:x12; val_offset:60312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60312*FLEN/8, x13, x9, x10)

inst_20126:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8900003f; valaddr_reg:x12; val_offset:60315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60315*FLEN/8, x13, x9, x10)

inst_20127:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897fffe0; valaddr_reg:x12; val_offset:60318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60318*FLEN/8, x13, x9, x10)

inst_20128:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8900001f; valaddr_reg:x12; val_offset:60321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60321*FLEN/8, x13, x9, x10)

inst_20129:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ffff0; valaddr_reg:x12; val_offset:60324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60324*FLEN/8, x13, x9, x10)

inst_20130:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8900000f; valaddr_reg:x12; val_offset:60327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60327*FLEN/8, x13, x9, x10)

inst_20131:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ffff8; valaddr_reg:x12; val_offset:60330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60330*FLEN/8, x13, x9, x10)

inst_20132:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89000007; valaddr_reg:x12; val_offset:60333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60333*FLEN/8, x13, x9, x10)

inst_20133:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ffffc; valaddr_reg:x12; val_offset:60336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60336*FLEN/8, x13, x9, x10)

inst_20134:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x89000003; valaddr_reg:x12; val_offset:60339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60339*FLEN/8, x13, x9, x10)

inst_20135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x897ffffe; valaddr_reg:x12; val_offset:60342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60342*FLEN/8, x13, x9, x10)

inst_20136:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:60345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60345*FLEN/8, x13, x9, x10)

inst_20137:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:60348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60348*FLEN/8, x13, x9, x10)

inst_20138:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:60351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60351*FLEN/8, x13, x9, x10)

inst_20139:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:60354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60354*FLEN/8, x13, x9, x10)

inst_20140:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:60357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60357*FLEN/8, x13, x9, x10)

inst_20141:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:60360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60360*FLEN/8, x13, x9, x10)

inst_20142:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:60363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60363*FLEN/8, x13, x9, x10)

inst_20143:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:60366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60366*FLEN/8, x13, x9, x10)

inst_20144:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:60369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60369*FLEN/8, x13, x9, x10)

inst_20145:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:60372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60372*FLEN/8, x13, x9, x10)

inst_20146:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:60375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60375*FLEN/8, x13, x9, x10)

inst_20147:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:60378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60378*FLEN/8, x13, x9, x10)

inst_20148:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:60381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60381*FLEN/8, x13, x9, x10)

inst_20149:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:60384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60384*FLEN/8, x13, x9, x10)

inst_20150:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:60387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60387*FLEN/8, x13, x9, x10)

inst_20151:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1ae574; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:60390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60390*FLEN/8, x13, x9, x10)

inst_20152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89800001; valaddr_reg:x12; val_offset:60393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60393*FLEN/8, x13, x9, x10)

inst_20153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89800000; valaddr_reg:x12; val_offset:60396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60396*FLEN/8, x13, x9, x10)

inst_20154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffffff; valaddr_reg:x12; val_offset:60399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60399*FLEN/8, x13, x9, x10)

inst_20155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89c00000; valaddr_reg:x12; val_offset:60402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60402*FLEN/8, x13, x9, x10)

inst_20156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89bfffff; valaddr_reg:x12; val_offset:60405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60405*FLEN/8, x13, x9, x10)

inst_20157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89e00000; valaddr_reg:x12; val_offset:60408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60408*FLEN/8, x13, x9, x10)

inst_20158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x899fffff; valaddr_reg:x12; val_offset:60411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60411*FLEN/8, x13, x9, x10)

inst_20159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89f00000; valaddr_reg:x12; val_offset:60414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60414*FLEN/8, x13, x9, x10)

inst_20160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x898fffff; valaddr_reg:x12; val_offset:60417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60417*FLEN/8, x13, x9, x10)

inst_20161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89f80000; valaddr_reg:x12; val_offset:60420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60420*FLEN/8, x13, x9, x10)

inst_20162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8987ffff; valaddr_reg:x12; val_offset:60423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60423*FLEN/8, x13, x9, x10)

inst_20163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fc0000; valaddr_reg:x12; val_offset:60426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60426*FLEN/8, x13, x9, x10)

inst_20164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8983ffff; valaddr_reg:x12; val_offset:60429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60429*FLEN/8, x13, x9, x10)

inst_20165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fe0000; valaddr_reg:x12; val_offset:60432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60432*FLEN/8, x13, x9, x10)

inst_20166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8981ffff; valaddr_reg:x12; val_offset:60435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60435*FLEN/8, x13, x9, x10)

inst_20167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ff0000; valaddr_reg:x12; val_offset:60438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60438*FLEN/8, x13, x9, x10)

inst_20168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8980ffff; valaddr_reg:x12; val_offset:60441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60441*FLEN/8, x13, x9, x10)

inst_20169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ff8000; valaddr_reg:x12; val_offset:60444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60444*FLEN/8, x13, x9, x10)

inst_20170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89807fff; valaddr_reg:x12; val_offset:60447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60447*FLEN/8, x13, x9, x10)

inst_20171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffc000; valaddr_reg:x12; val_offset:60450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60450*FLEN/8, x13, x9, x10)

inst_20172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89803fff; valaddr_reg:x12; val_offset:60453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60453*FLEN/8, x13, x9, x10)

inst_20173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffe000; valaddr_reg:x12; val_offset:60456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60456*FLEN/8, x13, x9, x10)

inst_20174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89801fff; valaddr_reg:x12; val_offset:60459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60459*FLEN/8, x13, x9, x10)

inst_20175:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fff000; valaddr_reg:x12; val_offset:60462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60462*FLEN/8, x13, x9, x10)

inst_20176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89800fff; valaddr_reg:x12; val_offset:60465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60465*FLEN/8, x13, x9, x10)

inst_20177:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fff800; valaddr_reg:x12; val_offset:60468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60468*FLEN/8, x13, x9, x10)

inst_20178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x898007ff; valaddr_reg:x12; val_offset:60471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60471*FLEN/8, x13, x9, x10)

inst_20179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fffc00; valaddr_reg:x12; val_offset:60474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60474*FLEN/8, x13, x9, x10)

inst_20180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x898003ff; valaddr_reg:x12; val_offset:60477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60477*FLEN/8, x13, x9, x10)

inst_20181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fffe00; valaddr_reg:x12; val_offset:60480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60480*FLEN/8, x13, x9, x10)

inst_20182:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x898001ff; valaddr_reg:x12; val_offset:60483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60483*FLEN/8, x13, x9, x10)

inst_20183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffff00; valaddr_reg:x12; val_offset:60486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60486*FLEN/8, x13, x9, x10)

inst_20184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x898000ff; valaddr_reg:x12; val_offset:60489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60489*FLEN/8, x13, x9, x10)

inst_20185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffff80; valaddr_reg:x12; val_offset:60492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60492*FLEN/8, x13, x9, x10)

inst_20186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8980007f; valaddr_reg:x12; val_offset:60495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60495*FLEN/8, x13, x9, x10)

inst_20187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffffc0; valaddr_reg:x12; val_offset:60498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60498*FLEN/8, x13, x9, x10)

inst_20188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8980003f; valaddr_reg:x12; val_offset:60501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60501*FLEN/8, x13, x9, x10)

inst_20189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89ffffe0; valaddr_reg:x12; val_offset:60504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60504*FLEN/8, x13, x9, x10)

inst_20190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8980001f; valaddr_reg:x12; val_offset:60507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60507*FLEN/8, x13, x9, x10)

inst_20191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fffff0; valaddr_reg:x12; val_offset:60510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60510*FLEN/8, x13, x9, x10)

inst_20192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8980000f; valaddr_reg:x12; val_offset:60513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60513*FLEN/8, x13, x9, x10)

inst_20193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fffff8; valaddr_reg:x12; val_offset:60516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60516*FLEN/8, x13, x9, x10)

inst_20194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89800007; valaddr_reg:x12; val_offset:60519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60519*FLEN/8, x13, x9, x10)

inst_20195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fffffc; valaddr_reg:x12; val_offset:60522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60522*FLEN/8, x13, x9, x10)

inst_20196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89800003; valaddr_reg:x12; val_offset:60525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60525*FLEN/8, x13, x9, x10)

inst_20197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x89fffffe; valaddr_reg:x12; val_offset:60528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60528*FLEN/8, x13, x9, x10)

inst_20198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:60531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60531*FLEN/8, x13, x9, x10)

inst_20199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:60534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60534*FLEN/8, x13, x9, x10)

inst_20200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:60537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60537*FLEN/8, x13, x9, x10)

inst_20201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:60540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60540*FLEN/8, x13, x9, x10)

inst_20202:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:60543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60543*FLEN/8, x13, x9, x10)

inst_20203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:60546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60546*FLEN/8, x13, x9, x10)

inst_20204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:60549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60549*FLEN/8, x13, x9, x10)

inst_20205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:60552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60552*FLEN/8, x13, x9, x10)

inst_20206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:60555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60555*FLEN/8, x13, x9, x10)

inst_20207:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:60558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60558*FLEN/8, x13, x9, x10)

inst_20208:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:60561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60561*FLEN/8, x13, x9, x10)

inst_20209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:60564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60564*FLEN/8, x13, x9, x10)

inst_20210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:60567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60567*FLEN/8, x13, x9, x10)

inst_20211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:60570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60570*FLEN/8, x13, x9, x10)

inst_20212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:60573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60573*FLEN/8, x13, x9, x10)

inst_20213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebee1af; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:60576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60576*FLEN/8, x13, x9, x10)

inst_20214:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a000001; valaddr_reg:x12; val_offset:60579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60579*FLEN/8, x13, x9, x10)

inst_20215:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a000000; valaddr_reg:x12; val_offset:60582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60582*FLEN/8, x13, x9, x10)

inst_20216:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fffff; valaddr_reg:x12; val_offset:60585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60585*FLEN/8, x13, x9, x10)

inst_20217:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a400000; valaddr_reg:x12; val_offset:60588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60588*FLEN/8, x13, x9, x10)

inst_20218:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a3fffff; valaddr_reg:x12; val_offset:60591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60591*FLEN/8, x13, x9, x10)

inst_20219:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a600000; valaddr_reg:x12; val_offset:60594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60594*FLEN/8, x13, x9, x10)

inst_20220:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a1fffff; valaddr_reg:x12; val_offset:60597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60597*FLEN/8, x13, x9, x10)

inst_20221:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a700000; valaddr_reg:x12; val_offset:60600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60600*FLEN/8, x13, x9, x10)

inst_20222:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a0fffff; valaddr_reg:x12; val_offset:60603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60603*FLEN/8, x13, x9, x10)

inst_20223:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a780000; valaddr_reg:x12; val_offset:60606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60606*FLEN/8, x13, x9, x10)

inst_20224:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a07ffff; valaddr_reg:x12; val_offset:60609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60609*FLEN/8, x13, x9, x10)

inst_20225:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7c0000; valaddr_reg:x12; val_offset:60612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60612*FLEN/8, x13, x9, x10)

inst_20226:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a03ffff; valaddr_reg:x12; val_offset:60615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60615*FLEN/8, x13, x9, x10)

inst_20227:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7e0000; valaddr_reg:x12; val_offset:60618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60618*FLEN/8, x13, x9, x10)

inst_20228:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a01ffff; valaddr_reg:x12; val_offset:60621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60621*FLEN/8, x13, x9, x10)

inst_20229:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7f0000; valaddr_reg:x12; val_offset:60624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60624*FLEN/8, x13, x9, x10)

inst_20230:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a00ffff; valaddr_reg:x12; val_offset:60627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60627*FLEN/8, x13, x9, x10)

inst_20231:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7f8000; valaddr_reg:x12; val_offset:60630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60630*FLEN/8, x13, x9, x10)

inst_20232:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a007fff; valaddr_reg:x12; val_offset:60633*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60633*FLEN/8, x13, x9, x10)

inst_20233:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fc000; valaddr_reg:x12; val_offset:60636*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60636*FLEN/8, x13, x9, x10)

inst_20234:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a003fff; valaddr_reg:x12; val_offset:60639*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60639*FLEN/8, x13, x9, x10)

inst_20235:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fe000; valaddr_reg:x12; val_offset:60642*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60642*FLEN/8, x13, x9, x10)

inst_20236:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a001fff; valaddr_reg:x12; val_offset:60645*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60645*FLEN/8, x13, x9, x10)

inst_20237:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ff000; valaddr_reg:x12; val_offset:60648*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60648*FLEN/8, x13, x9, x10)

inst_20238:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a000fff; valaddr_reg:x12; val_offset:60651*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60651*FLEN/8, x13, x9, x10)

inst_20239:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ff800; valaddr_reg:x12; val_offset:60654*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60654*FLEN/8, x13, x9, x10)

inst_20240:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a0007ff; valaddr_reg:x12; val_offset:60657*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60657*FLEN/8, x13, x9, x10)

inst_20241:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ffc00; valaddr_reg:x12; val_offset:60660*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60660*FLEN/8, x13, x9, x10)

inst_20242:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a0003ff; valaddr_reg:x12; val_offset:60663*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60663*FLEN/8, x13, x9, x10)

inst_20243:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ffe00; valaddr_reg:x12; val_offset:60666*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60666*FLEN/8, x13, x9, x10)

inst_20244:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a0001ff; valaddr_reg:x12; val_offset:60669*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60669*FLEN/8, x13, x9, x10)

inst_20245:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fff00; valaddr_reg:x12; val_offset:60672*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60672*FLEN/8, x13, x9, x10)

inst_20246:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a0000ff; valaddr_reg:x12; val_offset:60675*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60675*FLEN/8, x13, x9, x10)

inst_20247:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fff80; valaddr_reg:x12; val_offset:60678*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60678*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_158)
inst_20248:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a00007f; valaddr_reg:x12; val_offset:60681*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60681*FLEN/8, x13, x9, x10)

inst_20249:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fffc0; valaddr_reg:x12; val_offset:60684*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60684*FLEN/8, x13, x9, x10)

inst_20250:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a00003f; valaddr_reg:x12; val_offset:60687*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60687*FLEN/8, x13, x9, x10)

inst_20251:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7fffe0; valaddr_reg:x12; val_offset:60690*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60690*FLEN/8, x13, x9, x10)

inst_20252:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a00001f; valaddr_reg:x12; val_offset:60693*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60693*FLEN/8, x13, x9, x10)

inst_20253:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ffff0; valaddr_reg:x12; val_offset:60696*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60696*FLEN/8, x13, x9, x10)

inst_20254:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a00000f; valaddr_reg:x12; val_offset:60699*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60699*FLEN/8, x13, x9, x10)

inst_20255:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ffff8; valaddr_reg:x12; val_offset:60702*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60702*FLEN/8, x13, x9, x10)

inst_20256:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a000007; valaddr_reg:x12; val_offset:60705*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60705*FLEN/8, x13, x9, x10)

inst_20257:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ffffc; valaddr_reg:x12; val_offset:60708*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60708*FLEN/8, x13, x9, x10)

inst_20258:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a000003; valaddr_reg:x12; val_offset:60711*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60711*FLEN/8, x13, x9, x10)

inst_20259:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8a7ffffe; valaddr_reg:x12; val_offset:60714*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60714*FLEN/8, x13, x9, x10)

inst_20260:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:60717*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60717*FLEN/8, x13, x9, x10)

inst_20261:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:60720*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60720*FLEN/8, x13, x9, x10)

inst_20262:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:60723*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60723*FLEN/8, x13, x9, x10)

inst_20263:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:60726*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60726*FLEN/8, x13, x9, x10)

inst_20264:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:60729*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60729*FLEN/8, x13, x9, x10)

inst_20265:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:60732*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60732*FLEN/8, x13, x9, x10)

inst_20266:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:60735*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60735*FLEN/8, x13, x9, x10)

inst_20267:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:60738*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60738*FLEN/8, x13, x9, x10)

inst_20268:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:60741*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60741*FLEN/8, x13, x9, x10)

inst_20269:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:60744*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60744*FLEN/8, x13, x9, x10)

inst_20270:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:60747*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60747*FLEN/8, x13, x9, x10)

inst_20271:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:60750*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60750*FLEN/8, x13, x9, x10)

inst_20272:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:60753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60753*FLEN/8, x13, x9, x10)

inst_20273:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:60756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60756*FLEN/8, x13, x9, x10)

inst_20274:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:60759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60759*FLEN/8, x13, x9, x10)

inst_20275:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e44f9f4; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:60762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60762*FLEN/8, x13, x9, x10)

inst_20276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a800001; valaddr_reg:x12; val_offset:60765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60765*FLEN/8, x13, x9, x10)

inst_20277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a800000; valaddr_reg:x12; val_offset:60768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60768*FLEN/8, x13, x9, x10)

inst_20278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affffff; valaddr_reg:x12; val_offset:60771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60771*FLEN/8, x13, x9, x10)

inst_20279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8ac00000; valaddr_reg:x12; val_offset:60774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60774*FLEN/8, x13, x9, x10)

inst_20280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8abfffff; valaddr_reg:x12; val_offset:60777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60777*FLEN/8, x13, x9, x10)

inst_20281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8ae00000; valaddr_reg:x12; val_offset:60780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60780*FLEN/8, x13, x9, x10)

inst_20282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a9fffff; valaddr_reg:x12; val_offset:60783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60783*FLEN/8, x13, x9, x10)

inst_20283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8af00000; valaddr_reg:x12; val_offset:60786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60786*FLEN/8, x13, x9, x10)

inst_20284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a8fffff; valaddr_reg:x12; val_offset:60789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60789*FLEN/8, x13, x9, x10)

inst_20285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8af80000; valaddr_reg:x12; val_offset:60792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60792*FLEN/8, x13, x9, x10)

inst_20286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a87ffff; valaddr_reg:x12; val_offset:60795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60795*FLEN/8, x13, x9, x10)

inst_20287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afc0000; valaddr_reg:x12; val_offset:60798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60798*FLEN/8, x13, x9, x10)

inst_20288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a83ffff; valaddr_reg:x12; val_offset:60801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60801*FLEN/8, x13, x9, x10)

inst_20289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afe0000; valaddr_reg:x12; val_offset:60804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60804*FLEN/8, x13, x9, x10)

inst_20290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a81ffff; valaddr_reg:x12; val_offset:60807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60807*FLEN/8, x13, x9, x10)

inst_20291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8aff0000; valaddr_reg:x12; val_offset:60810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60810*FLEN/8, x13, x9, x10)

inst_20292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a80ffff; valaddr_reg:x12; val_offset:60813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60813*FLEN/8, x13, x9, x10)

inst_20293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8aff8000; valaddr_reg:x12; val_offset:60816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60816*FLEN/8, x13, x9, x10)

inst_20294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a807fff; valaddr_reg:x12; val_offset:60819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60819*FLEN/8, x13, x9, x10)

inst_20295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affc000; valaddr_reg:x12; val_offset:60822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60822*FLEN/8, x13, x9, x10)

inst_20296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a803fff; valaddr_reg:x12; val_offset:60825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60825*FLEN/8, x13, x9, x10)

inst_20297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affe000; valaddr_reg:x12; val_offset:60828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60828*FLEN/8, x13, x9, x10)

inst_20298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a801fff; valaddr_reg:x12; val_offset:60831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60831*FLEN/8, x13, x9, x10)

inst_20299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afff000; valaddr_reg:x12; val_offset:60834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60834*FLEN/8, x13, x9, x10)

inst_20300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a800fff; valaddr_reg:x12; val_offset:60837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60837*FLEN/8, x13, x9, x10)

inst_20301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afff800; valaddr_reg:x12; val_offset:60840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60840*FLEN/8, x13, x9, x10)

inst_20302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a8007ff; valaddr_reg:x12; val_offset:60843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60843*FLEN/8, x13, x9, x10)

inst_20303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afffc00; valaddr_reg:x12; val_offset:60846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60846*FLEN/8, x13, x9, x10)

inst_20304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a8003ff; valaddr_reg:x12; val_offset:60849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60849*FLEN/8, x13, x9, x10)

inst_20305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afffe00; valaddr_reg:x12; val_offset:60852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60852*FLEN/8, x13, x9, x10)

inst_20306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a8001ff; valaddr_reg:x12; val_offset:60855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60855*FLEN/8, x13, x9, x10)

inst_20307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affff00; valaddr_reg:x12; val_offset:60858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60858*FLEN/8, x13, x9, x10)

inst_20308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a8000ff; valaddr_reg:x12; val_offset:60861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60861*FLEN/8, x13, x9, x10)

inst_20309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affff80; valaddr_reg:x12; val_offset:60864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60864*FLEN/8, x13, x9, x10)

inst_20310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a80007f; valaddr_reg:x12; val_offset:60867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60867*FLEN/8, x13, x9, x10)

inst_20311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affffc0; valaddr_reg:x12; val_offset:60870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60870*FLEN/8, x13, x9, x10)

inst_20312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a80003f; valaddr_reg:x12; val_offset:60873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60873*FLEN/8, x13, x9, x10)

inst_20313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8affffe0; valaddr_reg:x12; val_offset:60876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60876*FLEN/8, x13, x9, x10)

inst_20314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a80001f; valaddr_reg:x12; val_offset:60879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60879*FLEN/8, x13, x9, x10)

inst_20315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afffff0; valaddr_reg:x12; val_offset:60882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60882*FLEN/8, x13, x9, x10)

inst_20316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a80000f; valaddr_reg:x12; val_offset:60885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60885*FLEN/8, x13, x9, x10)

inst_20317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afffff8; valaddr_reg:x12; val_offset:60888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60888*FLEN/8, x13, x9, x10)

inst_20318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a800007; valaddr_reg:x12; val_offset:60891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60891*FLEN/8, x13, x9, x10)

inst_20319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afffffc; valaddr_reg:x12; val_offset:60894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60894*FLEN/8, x13, x9, x10)

inst_20320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8a800003; valaddr_reg:x12; val_offset:60897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60897*FLEN/8, x13, x9, x10)

inst_20321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8afffffe; valaddr_reg:x12; val_offset:60900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60900*FLEN/8, x13, x9, x10)

inst_20322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:60903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60903*FLEN/8, x13, x9, x10)

inst_20323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:60906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60906*FLEN/8, x13, x9, x10)

inst_20324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:60909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60909*FLEN/8, x13, x9, x10)

inst_20325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:60912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60912*FLEN/8, x13, x9, x10)

inst_20326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:60915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60915*FLEN/8, x13, x9, x10)

inst_20327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:60918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60918*FLEN/8, x13, x9, x10)

inst_20328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:60921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60921*FLEN/8, x13, x9, x10)

inst_20329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:60924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60924*FLEN/8, x13, x9, x10)

inst_20330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:60927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60927*FLEN/8, x13, x9, x10)

inst_20331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:60930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60930*FLEN/8, x13, x9, x10)

inst_20332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:60933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60933*FLEN/8, x13, x9, x10)

inst_20333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:60936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60936*FLEN/8, x13, x9, x10)

inst_20334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:60939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60939*FLEN/8, x13, x9, x10)

inst_20335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:60942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60942*FLEN/8, x13, x9, x10)

inst_20336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:60945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60945*FLEN/8, x13, x9, x10)

inst_20337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62497; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:60948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60948*FLEN/8, x13, x9, x10)

inst_20338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000001; valaddr_reg:x12; val_offset:60951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60951*FLEN/8, x13, x9, x10)

inst_20339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000000; valaddr_reg:x12; val_offset:60954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60954*FLEN/8, x13, x9, x10)

inst_20340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fffff; valaddr_reg:x12; val_offset:60957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60957*FLEN/8, x13, x9, x10)

inst_20341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b400000; valaddr_reg:x12; val_offset:60960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60960*FLEN/8, x13, x9, x10)

inst_20342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b3fffff; valaddr_reg:x12; val_offset:60963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60963*FLEN/8, x13, x9, x10)

inst_20343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b600000; valaddr_reg:x12; val_offset:60966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60966*FLEN/8, x13, x9, x10)

inst_20344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b1fffff; valaddr_reg:x12; val_offset:60969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60969*FLEN/8, x13, x9, x10)

inst_20345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b700000; valaddr_reg:x12; val_offset:60972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60972*FLEN/8, x13, x9, x10)

inst_20346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0fffff; valaddr_reg:x12; val_offset:60975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60975*FLEN/8, x13, x9, x10)

inst_20347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b780000; valaddr_reg:x12; val_offset:60978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60978*FLEN/8, x13, x9, x10)

inst_20348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b07ffff; valaddr_reg:x12; val_offset:60981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60981*FLEN/8, x13, x9, x10)

inst_20349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7c0000; valaddr_reg:x12; val_offset:60984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60984*FLEN/8, x13, x9, x10)

inst_20350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b03ffff; valaddr_reg:x12; val_offset:60987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60987*FLEN/8, x13, x9, x10)

inst_20351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7e0000; valaddr_reg:x12; val_offset:60990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60990*FLEN/8, x13, x9, x10)

inst_20352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b01ffff; valaddr_reg:x12; val_offset:60993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60993*FLEN/8, x13, x9, x10)

inst_20353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7f0000; valaddr_reg:x12; val_offset:60996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60996*FLEN/8, x13, x9, x10)

inst_20354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00ffff; valaddr_reg:x12; val_offset:60999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60999*FLEN/8, x13, x9, x10)

inst_20355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7f8000; valaddr_reg:x12; val_offset:61002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61002*FLEN/8, x13, x9, x10)

inst_20356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b007fff; valaddr_reg:x12; val_offset:61005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61005*FLEN/8, x13, x9, x10)

inst_20357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fc000; valaddr_reg:x12; val_offset:61008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61008*FLEN/8, x13, x9, x10)

inst_20358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b003fff; valaddr_reg:x12; val_offset:61011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61011*FLEN/8, x13, x9, x10)

inst_20359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fe000; valaddr_reg:x12; val_offset:61014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61014*FLEN/8, x13, x9, x10)

inst_20360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b001fff; valaddr_reg:x12; val_offset:61017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61017*FLEN/8, x13, x9, x10)

inst_20361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ff000; valaddr_reg:x12; val_offset:61020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61020*FLEN/8, x13, x9, x10)

inst_20362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000fff; valaddr_reg:x12; val_offset:61023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61023*FLEN/8, x13, x9, x10)

inst_20363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ff800; valaddr_reg:x12; val_offset:61026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61026*FLEN/8, x13, x9, x10)

inst_20364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0007ff; valaddr_reg:x12; val_offset:61029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61029*FLEN/8, x13, x9, x10)

inst_20365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffc00; valaddr_reg:x12; val_offset:61032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61032*FLEN/8, x13, x9, x10)

inst_20366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0003ff; valaddr_reg:x12; val_offset:61035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61035*FLEN/8, x13, x9, x10)

inst_20367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffe00; valaddr_reg:x12; val_offset:61038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61038*FLEN/8, x13, x9, x10)

inst_20368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0001ff; valaddr_reg:x12; val_offset:61041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61041*FLEN/8, x13, x9, x10)

inst_20369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fff00; valaddr_reg:x12; val_offset:61044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61044*FLEN/8, x13, x9, x10)

inst_20370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0000ff; valaddr_reg:x12; val_offset:61047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61047*FLEN/8, x13, x9, x10)

inst_20371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fff80; valaddr_reg:x12; val_offset:61050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61050*FLEN/8, x13, x9, x10)

inst_20372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00007f; valaddr_reg:x12; val_offset:61053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61053*FLEN/8, x13, x9, x10)

inst_20373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fffc0; valaddr_reg:x12; val_offset:61056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61056*FLEN/8, x13, x9, x10)

inst_20374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00003f; valaddr_reg:x12; val_offset:61059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61059*FLEN/8, x13, x9, x10)

inst_20375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fffe0; valaddr_reg:x12; val_offset:61062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61062*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_159)
inst_20376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00001f; valaddr_reg:x12; val_offset:61065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61065*FLEN/8, x13, x9, x10)

inst_20377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffff0; valaddr_reg:x12; val_offset:61068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61068*FLEN/8, x13, x9, x10)

inst_20378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00000f; valaddr_reg:x12; val_offset:61071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61071*FLEN/8, x13, x9, x10)

inst_20379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffff8; valaddr_reg:x12; val_offset:61074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61074*FLEN/8, x13, x9, x10)

inst_20380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000007; valaddr_reg:x12; val_offset:61077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61077*FLEN/8, x13, x9, x10)

inst_20381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffffc; valaddr_reg:x12; val_offset:61080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61080*FLEN/8, x13, x9, x10)

inst_20382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000003; valaddr_reg:x12; val_offset:61083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61083*FLEN/8, x13, x9, x10)

inst_20383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffffe; valaddr_reg:x12; val_offset:61086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61086*FLEN/8, x13, x9, x10)

inst_20384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:61089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61089*FLEN/8, x13, x9, x10)

inst_20385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:61092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61092*FLEN/8, x13, x9, x10)

inst_20386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:61095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61095*FLEN/8, x13, x9, x10)

inst_20387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:61098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61098*FLEN/8, x13, x9, x10)

inst_20388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:61101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61101*FLEN/8, x13, x9, x10)

inst_20389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:61104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61104*FLEN/8, x13, x9, x10)

inst_20390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:61107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61107*FLEN/8, x13, x9, x10)

inst_20391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:61110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61110*FLEN/8, x13, x9, x10)

inst_20392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:61113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61113*FLEN/8, x13, x9, x10)

inst_20393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:61116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61116*FLEN/8, x13, x9, x10)

inst_20394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:61119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61119*FLEN/8, x13, x9, x10)

inst_20395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:61122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61122*FLEN/8, x13, x9, x10)

inst_20396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:61125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61125*FLEN/8, x13, x9, x10)

inst_20397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:61128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61128*FLEN/8, x13, x9, x10)

inst_20398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:61131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61131*FLEN/8, x13, x9, x10)

inst_20399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:61134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61134*FLEN/8, x13, x9, x10)

inst_20400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b800001; valaddr_reg:x12; val_offset:61137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61137*FLEN/8, x13, x9, x10)

inst_20401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b800000; valaddr_reg:x12; val_offset:61140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61140*FLEN/8, x13, x9, x10)

inst_20402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffffff; valaddr_reg:x12; val_offset:61143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61143*FLEN/8, x13, x9, x10)

inst_20403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bc00000; valaddr_reg:x12; val_offset:61146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61146*FLEN/8, x13, x9, x10)

inst_20404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bbfffff; valaddr_reg:x12; val_offset:61149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61149*FLEN/8, x13, x9, x10)

inst_20405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8be00000; valaddr_reg:x12; val_offset:61152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61152*FLEN/8, x13, x9, x10)

inst_20406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b9fffff; valaddr_reg:x12; val_offset:61155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61155*FLEN/8, x13, x9, x10)

inst_20407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bf00000; valaddr_reg:x12; val_offset:61158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61158*FLEN/8, x13, x9, x10)

inst_20408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b8fffff; valaddr_reg:x12; val_offset:61161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61161*FLEN/8, x13, x9, x10)

inst_20409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bf80000; valaddr_reg:x12; val_offset:61164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61164*FLEN/8, x13, x9, x10)

inst_20410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b87ffff; valaddr_reg:x12; val_offset:61167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61167*FLEN/8, x13, x9, x10)

inst_20411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfc0000; valaddr_reg:x12; val_offset:61170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61170*FLEN/8, x13, x9, x10)

inst_20412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b83ffff; valaddr_reg:x12; val_offset:61173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61173*FLEN/8, x13, x9, x10)

inst_20413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfe0000; valaddr_reg:x12; val_offset:61176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61176*FLEN/8, x13, x9, x10)

inst_20414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b81ffff; valaddr_reg:x12; val_offset:61179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61179*FLEN/8, x13, x9, x10)

inst_20415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bff0000; valaddr_reg:x12; val_offset:61182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61182*FLEN/8, x13, x9, x10)

inst_20416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b80ffff; valaddr_reg:x12; val_offset:61185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61185*FLEN/8, x13, x9, x10)

inst_20417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bff8000; valaddr_reg:x12; val_offset:61188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61188*FLEN/8, x13, x9, x10)

inst_20418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b807fff; valaddr_reg:x12; val_offset:61191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61191*FLEN/8, x13, x9, x10)

inst_20419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffc000; valaddr_reg:x12; val_offset:61194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61194*FLEN/8, x13, x9, x10)

inst_20420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b803fff; valaddr_reg:x12; val_offset:61197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61197*FLEN/8, x13, x9, x10)

inst_20421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffe000; valaddr_reg:x12; val_offset:61200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61200*FLEN/8, x13, x9, x10)

inst_20422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b801fff; valaddr_reg:x12; val_offset:61203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61203*FLEN/8, x13, x9, x10)

inst_20423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfff000; valaddr_reg:x12; val_offset:61206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61206*FLEN/8, x13, x9, x10)

inst_20424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b800fff; valaddr_reg:x12; val_offset:61209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61209*FLEN/8, x13, x9, x10)

inst_20425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfff800; valaddr_reg:x12; val_offset:61212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61212*FLEN/8, x13, x9, x10)

inst_20426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b8007ff; valaddr_reg:x12; val_offset:61215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61215*FLEN/8, x13, x9, x10)

inst_20427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfffc00; valaddr_reg:x12; val_offset:61218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61218*FLEN/8, x13, x9, x10)

inst_20428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b8003ff; valaddr_reg:x12; val_offset:61221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61221*FLEN/8, x13, x9, x10)

inst_20429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfffe00; valaddr_reg:x12; val_offset:61224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61224*FLEN/8, x13, x9, x10)

inst_20430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b8001ff; valaddr_reg:x12; val_offset:61227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61227*FLEN/8, x13, x9, x10)

inst_20431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffff00; valaddr_reg:x12; val_offset:61230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61230*FLEN/8, x13, x9, x10)

inst_20432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b8000ff; valaddr_reg:x12; val_offset:61233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61233*FLEN/8, x13, x9, x10)

inst_20433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffff80; valaddr_reg:x12; val_offset:61236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61236*FLEN/8, x13, x9, x10)

inst_20434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b80007f; valaddr_reg:x12; val_offset:61239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61239*FLEN/8, x13, x9, x10)

inst_20435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffffc0; valaddr_reg:x12; val_offset:61242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61242*FLEN/8, x13, x9, x10)

inst_20436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b80003f; valaddr_reg:x12; val_offset:61245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61245*FLEN/8, x13, x9, x10)

inst_20437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bffffe0; valaddr_reg:x12; val_offset:61248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61248*FLEN/8, x13, x9, x10)

inst_20438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b80001f; valaddr_reg:x12; val_offset:61251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61251*FLEN/8, x13, x9, x10)

inst_20439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfffff0; valaddr_reg:x12; val_offset:61254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61254*FLEN/8, x13, x9, x10)

inst_20440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b80000f; valaddr_reg:x12; val_offset:61257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61257*FLEN/8, x13, x9, x10)

inst_20441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfffff8; valaddr_reg:x12; val_offset:61260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61260*FLEN/8, x13, x9, x10)

inst_20442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b800007; valaddr_reg:x12; val_offset:61263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61263*FLEN/8, x13, x9, x10)

inst_20443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfffffc; valaddr_reg:x12; val_offset:61266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61266*FLEN/8, x13, x9, x10)

inst_20444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8b800003; valaddr_reg:x12; val_offset:61269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61269*FLEN/8, x13, x9, x10)

inst_20445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8bfffffe; valaddr_reg:x12; val_offset:61272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61272*FLEN/8, x13, x9, x10)

inst_20446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:61275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61275*FLEN/8, x13, x9, x10)

inst_20447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:61278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61278*FLEN/8, x13, x9, x10)

inst_20448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:61281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61281*FLEN/8, x13, x9, x10)

inst_20449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:61284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61284*FLEN/8, x13, x9, x10)

inst_20450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:61287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61287*FLEN/8, x13, x9, x10)

inst_20451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:61290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61290*FLEN/8, x13, x9, x10)

inst_20452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:61293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61293*FLEN/8, x13, x9, x10)

inst_20453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:61296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61296*FLEN/8, x13, x9, x10)

inst_20454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:61299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61299*FLEN/8, x13, x9, x10)

inst_20455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:61302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61302*FLEN/8, x13, x9, x10)

inst_20456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:61305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61305*FLEN/8, x13, x9, x10)

inst_20457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:61308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61308*FLEN/8, x13, x9, x10)

inst_20458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:61311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61311*FLEN/8, x13, x9, x10)

inst_20459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:61314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61314*FLEN/8, x13, x9, x10)

inst_20460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:61317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61317*FLEN/8, x13, x9, x10)

inst_20461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191b6f; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:61320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61320*FLEN/8, x13, x9, x10)

inst_20462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c000001; valaddr_reg:x12; val_offset:61323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61323*FLEN/8, x13, x9, x10)

inst_20463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c000000; valaddr_reg:x12; val_offset:61326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61326*FLEN/8, x13, x9, x10)

inst_20464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fffff; valaddr_reg:x12; val_offset:61329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61329*FLEN/8, x13, x9, x10)

inst_20465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c400000; valaddr_reg:x12; val_offset:61332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61332*FLEN/8, x13, x9, x10)

inst_20466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c3fffff; valaddr_reg:x12; val_offset:61335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61335*FLEN/8, x13, x9, x10)

inst_20467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c600000; valaddr_reg:x12; val_offset:61338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61338*FLEN/8, x13, x9, x10)

inst_20468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c1fffff; valaddr_reg:x12; val_offset:61341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61341*FLEN/8, x13, x9, x10)

inst_20469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c700000; valaddr_reg:x12; val_offset:61344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61344*FLEN/8, x13, x9, x10)

inst_20470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c0fffff; valaddr_reg:x12; val_offset:61347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61347*FLEN/8, x13, x9, x10)

inst_20471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c780000; valaddr_reg:x12; val_offset:61350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61350*FLEN/8, x13, x9, x10)

inst_20472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c07ffff; valaddr_reg:x12; val_offset:61353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61353*FLEN/8, x13, x9, x10)

inst_20473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7c0000; valaddr_reg:x12; val_offset:61356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61356*FLEN/8, x13, x9, x10)

inst_20474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c03ffff; valaddr_reg:x12; val_offset:61359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61359*FLEN/8, x13, x9, x10)

inst_20475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7e0000; valaddr_reg:x12; val_offset:61362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61362*FLEN/8, x13, x9, x10)

inst_20476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c01ffff; valaddr_reg:x12; val_offset:61365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61365*FLEN/8, x13, x9, x10)

inst_20477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7f0000; valaddr_reg:x12; val_offset:61368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61368*FLEN/8, x13, x9, x10)

inst_20478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c00ffff; valaddr_reg:x12; val_offset:61371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61371*FLEN/8, x13, x9, x10)

inst_20479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7f8000; valaddr_reg:x12; val_offset:61374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61374*FLEN/8, x13, x9, x10)

inst_20480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c007fff; valaddr_reg:x12; val_offset:61377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61377*FLEN/8, x13, x9, x10)

inst_20481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fc000; valaddr_reg:x12; val_offset:61380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61380*FLEN/8, x13, x9, x10)

inst_20482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c003fff; valaddr_reg:x12; val_offset:61383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61383*FLEN/8, x13, x9, x10)

inst_20483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fe000; valaddr_reg:x12; val_offset:61386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61386*FLEN/8, x13, x9, x10)

inst_20484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c001fff; valaddr_reg:x12; val_offset:61389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61389*FLEN/8, x13, x9, x10)

inst_20485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ff000; valaddr_reg:x12; val_offset:61392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61392*FLEN/8, x13, x9, x10)

inst_20486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c000fff; valaddr_reg:x12; val_offset:61395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61395*FLEN/8, x13, x9, x10)

inst_20487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ff800; valaddr_reg:x12; val_offset:61398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61398*FLEN/8, x13, x9, x10)

inst_20488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c0007ff; valaddr_reg:x12; val_offset:61401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61401*FLEN/8, x13, x9, x10)

inst_20489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ffc00; valaddr_reg:x12; val_offset:61404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61404*FLEN/8, x13, x9, x10)

inst_20490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c0003ff; valaddr_reg:x12; val_offset:61407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61407*FLEN/8, x13, x9, x10)

inst_20491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ffe00; valaddr_reg:x12; val_offset:61410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61410*FLEN/8, x13, x9, x10)

inst_20492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c0001ff; valaddr_reg:x12; val_offset:61413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61413*FLEN/8, x13, x9, x10)

inst_20493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fff00; valaddr_reg:x12; val_offset:61416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61416*FLEN/8, x13, x9, x10)

inst_20494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c0000ff; valaddr_reg:x12; val_offset:61419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61419*FLEN/8, x13, x9, x10)

inst_20495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fff80; valaddr_reg:x12; val_offset:61422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61422*FLEN/8, x13, x9, x10)

inst_20496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c00007f; valaddr_reg:x12; val_offset:61425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61425*FLEN/8, x13, x9, x10)

inst_20497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fffc0; valaddr_reg:x12; val_offset:61428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61428*FLEN/8, x13, x9, x10)

inst_20498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c00003f; valaddr_reg:x12; val_offset:61431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61431*FLEN/8, x13, x9, x10)

inst_20499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7fffe0; valaddr_reg:x12; val_offset:61434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61434*FLEN/8, x13, x9, x10)

inst_20500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c00001f; valaddr_reg:x12; val_offset:61437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61437*FLEN/8, x13, x9, x10)

inst_20501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ffff0; valaddr_reg:x12; val_offset:61440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61440*FLEN/8, x13, x9, x10)

inst_20502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c00000f; valaddr_reg:x12; val_offset:61443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61443*FLEN/8, x13, x9, x10)

inst_20503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ffff8; valaddr_reg:x12; val_offset:61446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61446*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_160)
inst_20504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c000007; valaddr_reg:x12; val_offset:61449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61449*FLEN/8, x13, x9, x10)

inst_20505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ffffc; valaddr_reg:x12; val_offset:61452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61452*FLEN/8, x13, x9, x10)

inst_20506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c000003; valaddr_reg:x12; val_offset:61455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61455*FLEN/8, x13, x9, x10)

inst_20507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8c7ffffe; valaddr_reg:x12; val_offset:61458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61458*FLEN/8, x13, x9, x10)

inst_20508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:61461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61461*FLEN/8, x13, x9, x10)

inst_20509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:61464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61464*FLEN/8, x13, x9, x10)

inst_20510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:61467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61467*FLEN/8, x13, x9, x10)

inst_20511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:61470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61470*FLEN/8, x13, x9, x10)

inst_20512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:61473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61473*FLEN/8, x13, x9, x10)

inst_20513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:61476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61476*FLEN/8, x13, x9, x10)

inst_20514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:61479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61479*FLEN/8, x13, x9, x10)

inst_20515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:61482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61482*FLEN/8, x13, x9, x10)

inst_20516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:61485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61485*FLEN/8, x13, x9, x10)

inst_20517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:61488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61488*FLEN/8, x13, x9, x10)

inst_20518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:61491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61491*FLEN/8, x13, x9, x10)

inst_20519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:61494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61494*FLEN/8, x13, x9, x10)

inst_20520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:61497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61497*FLEN/8, x13, x9, x10)

inst_20521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:61500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61500*FLEN/8, x13, x9, x10)

inst_20522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:61503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61503*FLEN/8, x13, x9, x10)

inst_20523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef6431; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:61506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61506*FLEN/8, x13, x9, x10)

inst_20524:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c800001; valaddr_reg:x12; val_offset:61509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61509*FLEN/8, x13, x9, x10)

inst_20525:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c800000; valaddr_reg:x12; val_offset:61512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61512*FLEN/8, x13, x9, x10)

inst_20526:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffffff; valaddr_reg:x12; val_offset:61515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61515*FLEN/8, x13, x9, x10)

inst_20527:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cc00000; valaddr_reg:x12; val_offset:61518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61518*FLEN/8, x13, x9, x10)

inst_20528:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cbfffff; valaddr_reg:x12; val_offset:61521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61521*FLEN/8, x13, x9, x10)

inst_20529:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8ce00000; valaddr_reg:x12; val_offset:61524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61524*FLEN/8, x13, x9, x10)

inst_20530:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c9fffff; valaddr_reg:x12; val_offset:61527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61527*FLEN/8, x13, x9, x10)

inst_20531:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cf00000; valaddr_reg:x12; val_offset:61530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61530*FLEN/8, x13, x9, x10)

inst_20532:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c8fffff; valaddr_reg:x12; val_offset:61533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61533*FLEN/8, x13, x9, x10)

inst_20533:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cf80000; valaddr_reg:x12; val_offset:61536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61536*FLEN/8, x13, x9, x10)

inst_20534:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c87ffff; valaddr_reg:x12; val_offset:61539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61539*FLEN/8, x13, x9, x10)

inst_20535:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfc0000; valaddr_reg:x12; val_offset:61542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61542*FLEN/8, x13, x9, x10)

inst_20536:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c83ffff; valaddr_reg:x12; val_offset:61545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61545*FLEN/8, x13, x9, x10)

inst_20537:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfe0000; valaddr_reg:x12; val_offset:61548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61548*FLEN/8, x13, x9, x10)

inst_20538:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c81ffff; valaddr_reg:x12; val_offset:61551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61551*FLEN/8, x13, x9, x10)

inst_20539:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cff0000; valaddr_reg:x12; val_offset:61554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61554*FLEN/8, x13, x9, x10)

inst_20540:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c80ffff; valaddr_reg:x12; val_offset:61557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61557*FLEN/8, x13, x9, x10)

inst_20541:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cff8000; valaddr_reg:x12; val_offset:61560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61560*FLEN/8, x13, x9, x10)

inst_20542:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c807fff; valaddr_reg:x12; val_offset:61563*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61563*FLEN/8, x13, x9, x10)

inst_20543:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffc000; valaddr_reg:x12; val_offset:61566*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61566*FLEN/8, x13, x9, x10)

inst_20544:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c803fff; valaddr_reg:x12; val_offset:61569*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61569*FLEN/8, x13, x9, x10)

inst_20545:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffe000; valaddr_reg:x12; val_offset:61572*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61572*FLEN/8, x13, x9, x10)

inst_20546:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c801fff; valaddr_reg:x12; val_offset:61575*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61575*FLEN/8, x13, x9, x10)

inst_20547:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfff000; valaddr_reg:x12; val_offset:61578*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61578*FLEN/8, x13, x9, x10)

inst_20548:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c800fff; valaddr_reg:x12; val_offset:61581*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61581*FLEN/8, x13, x9, x10)

inst_20549:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfff800; valaddr_reg:x12; val_offset:61584*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61584*FLEN/8, x13, x9, x10)

inst_20550:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c8007ff; valaddr_reg:x12; val_offset:61587*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61587*FLEN/8, x13, x9, x10)

inst_20551:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfffc00; valaddr_reg:x12; val_offset:61590*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61590*FLEN/8, x13, x9, x10)

inst_20552:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c8003ff; valaddr_reg:x12; val_offset:61593*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61593*FLEN/8, x13, x9, x10)

inst_20553:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfffe00; valaddr_reg:x12; val_offset:61596*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61596*FLEN/8, x13, x9, x10)

inst_20554:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c8001ff; valaddr_reg:x12; val_offset:61599*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61599*FLEN/8, x13, x9, x10)

inst_20555:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffff00; valaddr_reg:x12; val_offset:61602*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61602*FLEN/8, x13, x9, x10)

inst_20556:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c8000ff; valaddr_reg:x12; val_offset:61605*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61605*FLEN/8, x13, x9, x10)

inst_20557:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffff80; valaddr_reg:x12; val_offset:61608*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61608*FLEN/8, x13, x9, x10)

inst_20558:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c80007f; valaddr_reg:x12; val_offset:61611*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61611*FLEN/8, x13, x9, x10)

inst_20559:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffffc0; valaddr_reg:x12; val_offset:61614*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61614*FLEN/8, x13, x9, x10)

inst_20560:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c80003f; valaddr_reg:x12; val_offset:61617*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61617*FLEN/8, x13, x9, x10)

inst_20561:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cffffe0; valaddr_reg:x12; val_offset:61620*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61620*FLEN/8, x13, x9, x10)

inst_20562:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c80001f; valaddr_reg:x12; val_offset:61623*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61623*FLEN/8, x13, x9, x10)

inst_20563:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfffff0; valaddr_reg:x12; val_offset:61626*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61626*FLEN/8, x13, x9, x10)

inst_20564:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c80000f; valaddr_reg:x12; val_offset:61629*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61629*FLEN/8, x13, x9, x10)

inst_20565:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfffff8; valaddr_reg:x12; val_offset:61632*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61632*FLEN/8, x13, x9, x10)

inst_20566:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c800007; valaddr_reg:x12; val_offset:61635*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61635*FLEN/8, x13, x9, x10)

inst_20567:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfffffc; valaddr_reg:x12; val_offset:61638*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61638*FLEN/8, x13, x9, x10)

inst_20568:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8c800003; valaddr_reg:x12; val_offset:61641*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61641*FLEN/8, x13, x9, x10)

inst_20569:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8cfffffe; valaddr_reg:x12; val_offset:61644*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61644*FLEN/8, x13, x9, x10)

inst_20570:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:61647*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61647*FLEN/8, x13, x9, x10)

inst_20571:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:61650*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61650*FLEN/8, x13, x9, x10)

inst_20572:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:61653*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61653*FLEN/8, x13, x9, x10)

inst_20573:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:61656*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61656*FLEN/8, x13, x9, x10)

inst_20574:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:61659*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61659*FLEN/8, x13, x9, x10)

inst_20575:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:61662*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61662*FLEN/8, x13, x9, x10)

inst_20576:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:61665*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61665*FLEN/8, x13, x9, x10)

inst_20577:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:61668*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61668*FLEN/8, x13, x9, x10)

inst_20578:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:61671*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61671*FLEN/8, x13, x9, x10)

inst_20579:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:61674*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61674*FLEN/8, x13, x9, x10)

inst_20580:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:61677*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61677*FLEN/8, x13, x9, x10)

inst_20581:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:61680*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61680*FLEN/8, x13, x9, x10)

inst_20582:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:61683*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61683*FLEN/8, x13, x9, x10)

inst_20583:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:61686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61686*FLEN/8, x13, x9, x10)

inst_20584:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:61689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61689*FLEN/8, x13, x9, x10)

inst_20585:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da0b610; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:61692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61692*FLEN/8, x13, x9, x10)

inst_20586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d000001; valaddr_reg:x12; val_offset:61695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61695*FLEN/8, x13, x9, x10)

inst_20587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d000000; valaddr_reg:x12; val_offset:61698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61698*FLEN/8, x13, x9, x10)

inst_20588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fffff; valaddr_reg:x12; val_offset:61701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61701*FLEN/8, x13, x9, x10)

inst_20589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d400000; valaddr_reg:x12; val_offset:61704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61704*FLEN/8, x13, x9, x10)

inst_20590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d3fffff; valaddr_reg:x12; val_offset:61707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61707*FLEN/8, x13, x9, x10)

inst_20591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d600000; valaddr_reg:x12; val_offset:61710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61710*FLEN/8, x13, x9, x10)

inst_20592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d1fffff; valaddr_reg:x12; val_offset:61713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61713*FLEN/8, x13, x9, x10)

inst_20593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d700000; valaddr_reg:x12; val_offset:61716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61716*FLEN/8, x13, x9, x10)

inst_20594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d0fffff; valaddr_reg:x12; val_offset:61719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61719*FLEN/8, x13, x9, x10)

inst_20595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d780000; valaddr_reg:x12; val_offset:61722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61722*FLEN/8, x13, x9, x10)

inst_20596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d07ffff; valaddr_reg:x12; val_offset:61725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61725*FLEN/8, x13, x9, x10)

inst_20597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7c0000; valaddr_reg:x12; val_offset:61728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61728*FLEN/8, x13, x9, x10)

inst_20598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d03ffff; valaddr_reg:x12; val_offset:61731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61731*FLEN/8, x13, x9, x10)

inst_20599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7e0000; valaddr_reg:x12; val_offset:61734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61734*FLEN/8, x13, x9, x10)

inst_20600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d01ffff; valaddr_reg:x12; val_offset:61737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61737*FLEN/8, x13, x9, x10)

inst_20601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7f0000; valaddr_reg:x12; val_offset:61740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61740*FLEN/8, x13, x9, x10)

inst_20602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d00ffff; valaddr_reg:x12; val_offset:61743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61743*FLEN/8, x13, x9, x10)

inst_20603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7f8000; valaddr_reg:x12; val_offset:61746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61746*FLEN/8, x13, x9, x10)

inst_20604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d007fff; valaddr_reg:x12; val_offset:61749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61749*FLEN/8, x13, x9, x10)

inst_20605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fc000; valaddr_reg:x12; val_offset:61752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61752*FLEN/8, x13, x9, x10)

inst_20606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d003fff; valaddr_reg:x12; val_offset:61755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61755*FLEN/8, x13, x9, x10)

inst_20607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fe000; valaddr_reg:x12; val_offset:61758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61758*FLEN/8, x13, x9, x10)

inst_20608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d001fff; valaddr_reg:x12; val_offset:61761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61761*FLEN/8, x13, x9, x10)

inst_20609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ff000; valaddr_reg:x12; val_offset:61764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61764*FLEN/8, x13, x9, x10)

inst_20610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d000fff; valaddr_reg:x12; val_offset:61767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61767*FLEN/8, x13, x9, x10)

inst_20611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ff800; valaddr_reg:x12; val_offset:61770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61770*FLEN/8, x13, x9, x10)

inst_20612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d0007ff; valaddr_reg:x12; val_offset:61773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61773*FLEN/8, x13, x9, x10)

inst_20613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ffc00; valaddr_reg:x12; val_offset:61776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61776*FLEN/8, x13, x9, x10)

inst_20614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d0003ff; valaddr_reg:x12; val_offset:61779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61779*FLEN/8, x13, x9, x10)

inst_20615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ffe00; valaddr_reg:x12; val_offset:61782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61782*FLEN/8, x13, x9, x10)

inst_20616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d0001ff; valaddr_reg:x12; val_offset:61785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61785*FLEN/8, x13, x9, x10)

inst_20617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fff00; valaddr_reg:x12; val_offset:61788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61788*FLEN/8, x13, x9, x10)

inst_20618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d0000ff; valaddr_reg:x12; val_offset:61791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61791*FLEN/8, x13, x9, x10)

inst_20619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fff80; valaddr_reg:x12; val_offset:61794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61794*FLEN/8, x13, x9, x10)

inst_20620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d00007f; valaddr_reg:x12; val_offset:61797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61797*FLEN/8, x13, x9, x10)

inst_20621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fffc0; valaddr_reg:x12; val_offset:61800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61800*FLEN/8, x13, x9, x10)

inst_20622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d00003f; valaddr_reg:x12; val_offset:61803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61803*FLEN/8, x13, x9, x10)

inst_20623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7fffe0; valaddr_reg:x12; val_offset:61806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61806*FLEN/8, x13, x9, x10)

inst_20624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d00001f; valaddr_reg:x12; val_offset:61809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61809*FLEN/8, x13, x9, x10)

inst_20625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ffff0; valaddr_reg:x12; val_offset:61812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61812*FLEN/8, x13, x9, x10)

inst_20626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d00000f; valaddr_reg:x12; val_offset:61815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61815*FLEN/8, x13, x9, x10)

inst_20627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ffff8; valaddr_reg:x12; val_offset:61818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61818*FLEN/8, x13, x9, x10)

inst_20628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d000007; valaddr_reg:x12; val_offset:61821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61821*FLEN/8, x13, x9, x10)

inst_20629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ffffc; valaddr_reg:x12; val_offset:61824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61824*FLEN/8, x13, x9, x10)

inst_20630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d000003; valaddr_reg:x12; val_offset:61827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61827*FLEN/8, x13, x9, x10)

inst_20631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8d7ffffe; valaddr_reg:x12; val_offset:61830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61830*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_161)
inst_20632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x12; val_offset:61833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61833*FLEN/8, x13, x9, x10)

inst_20633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x12; val_offset:61836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61836*FLEN/8, x13, x9, x10)

inst_20634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x12; val_offset:61839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61839*FLEN/8, x13, x9, x10)

inst_20635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x12; val_offset:61842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61842*FLEN/8, x13, x9, x10)

inst_20636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x12; val_offset:61845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61845*FLEN/8, x13, x9, x10)

inst_20637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x12; val_offset:61848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61848*FLEN/8, x13, x9, x10)

inst_20638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x12; val_offset:61851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61851*FLEN/8, x13, x9, x10)

inst_20639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x12; val_offset:61854*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61854*FLEN/8, x13, x9, x10)

inst_20640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x12; val_offset:61857*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61857*FLEN/8, x13, x9, x10)

inst_20641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x12; val_offset:61860*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61860*FLEN/8, x13, x9, x10)

inst_20642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x12; val_offset:61863*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61863*FLEN/8, x13, x9, x10)

inst_20643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x12; val_offset:61866*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61866*FLEN/8, x13, x9, x10)

inst_20644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x12; val_offset:61869*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61869*FLEN/8, x13, x9, x10)

inst_20645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x12; val_offset:61872*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61872*FLEN/8, x13, x9, x10)

inst_20646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x12; val_offset:61875*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61875*FLEN/8, x13, x9, x10)

inst_20647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb00757; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x12; val_offset:61878*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61878*FLEN/8, x13, x9, x10)

inst_20648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800001; valaddr_reg:x12; val_offset:61881*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61881*FLEN/8, x13, x9, x10)

inst_20649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d800000; valaddr_reg:x12; val_offset:61884*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61884*FLEN/8, x13, x9, x10)

inst_20650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffffff; valaddr_reg:x12; val_offset:61887*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61887*FLEN/8, x13, x9, x10)

inst_20651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dc00000; valaddr_reg:x12; val_offset:61890*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61890*FLEN/8, x13, x9, x10)

inst_20652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dbfffff; valaddr_reg:x12; val_offset:61893*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61893*FLEN/8, x13, x9, x10)

inst_20653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8de00000; valaddr_reg:x12; val_offset:61896*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61896*FLEN/8, x13, x9, x10)

inst_20654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d9fffff; valaddr_reg:x12; val_offset:61899*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61899*FLEN/8, x13, x9, x10)

inst_20655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8df00000; valaddr_reg:x12; val_offset:61902*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61902*FLEN/8, x13, x9, x10)

inst_20656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d8fffff; valaddr_reg:x12; val_offset:61905*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61905*FLEN/8, x13, x9, x10)

inst_20657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8df80000; valaddr_reg:x12; val_offset:61908*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61908*FLEN/8, x13, x9, x10)

inst_20658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d87ffff; valaddr_reg:x12; val_offset:61911*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61911*FLEN/8, x13, x9, x10)

inst_20659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfc0000; valaddr_reg:x12; val_offset:61914*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61914*FLEN/8, x13, x9, x10)

inst_20660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d83ffff; valaddr_reg:x12; val_offset:61917*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61917*FLEN/8, x13, x9, x10)

inst_20661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dfe0000; valaddr_reg:x12; val_offset:61920*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61920*FLEN/8, x13, x9, x10)

inst_20662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d81ffff; valaddr_reg:x12; val_offset:61923*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61923*FLEN/8, x13, x9, x10)

inst_20663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dff0000; valaddr_reg:x12; val_offset:61926*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61926*FLEN/8, x13, x9, x10)

inst_20664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d80ffff; valaddr_reg:x12; val_offset:61929*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61929*FLEN/8, x13, x9, x10)

inst_20665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dff8000; valaddr_reg:x12; val_offset:61932*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61932*FLEN/8, x13, x9, x10)

inst_20666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8d807fff; valaddr_reg:x12; val_offset:61935*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61935*FLEN/8, x13, x9, x10)

inst_20667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8adedc; op2val:0x80000000;
op3val:0x8dffc000; valaddr_reg:x12; val_offset:61938*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 61938*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154194534,32,FLEN)
NAN_BOXED(2091495642,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151398331,32,FLEN)
NAN_BOXED(2091495642,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151957572,32,FLEN)
NAN_BOXED(2091495642,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149880393,32,FLEN)
NAN_BOXED(2091495642,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2153475510,32,FLEN)
NAN_BOXED(2091495642,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2150839091,32,FLEN)
NAN_BOXED(2091495642,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2152516812,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701377,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701376,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089983,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2285895680,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2285895679,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2287992832,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2283798527,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2289041408,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2282749951,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2289565696,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2282225663,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2289827840,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281963519,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2289958912,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281832447,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290024448,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281766911,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290057216,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281734143,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290073600,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281717759,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290081792,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281709567,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290085888,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281705471,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290087936,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281703423,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290088960,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281702399,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089472,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701887,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089728,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701631,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089856,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701503,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089920,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701439,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089952,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701407,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089968,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701391,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089976,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701383,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089980,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2281701379,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2290089982,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872248,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483655,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872252,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483651,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872254,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483649,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151078765,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154673883,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149161369,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154194534,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151398331,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151957572,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149880393,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2153475510,32,FLEN)
NAN_BOXED(2127161801,32,FLEN)
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NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365588479,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373975552,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587967,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373975808,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587711,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373975936,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587583,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976000,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587519,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976032,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587487,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976048,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587471,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976056,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587463,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976060,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2365587459,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976062,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872248,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483655,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872252,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483651,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872254,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483649,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151078765,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154673883,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149161369,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154194534,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151398331,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151957572,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149880393,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2153475510,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2150839091,32,FLEN)
NAN_BOXED(2125465431,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2152516812,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976065,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976064,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364671,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2378170368,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2378170367,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2380267520,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2376073215,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2381316096,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2375024639,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2381840384,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2374500351,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382102528,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2374238207,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382233600,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2374107135,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382299136,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2374041599,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382331904,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2374008831,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382348288,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373992447,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382356480,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373984255,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382360576,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373980159,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382362624,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373978111,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382363648,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373977087,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364160,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976575,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364416,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976319,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364544,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976191,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364608,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976127,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364640,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976095,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364656,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976079,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364664,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976071,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364668,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2373976067,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364670,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872248,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483655,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872252,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483651,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2155872254,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2147483649,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151078765,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154673883,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149161369,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2154194534,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151398331,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2151957572,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2149880393,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2153475510,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2150839091,32,FLEN)
NAN_BOXED(2123030236,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2152516812,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364673,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382364672,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2390753279,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2386558976,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2386558975,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2388656128,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2384461823,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2389704704,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2383413247,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2390228992,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382888959,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2390491136,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382626815,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2390622208,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382495743,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2390687744,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2382430207,32,FLEN)
NAN_BOXED(2132723723,32,FLEN)

RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
