
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 07:30:48 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fnmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fnmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fnmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_15340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5000000; valaddr_reg:x12; val_offset:45957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45957*FLEN/8, x13, x9, x10)

inst_15341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fffff; valaddr_reg:x12; val_offset:45960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45960*FLEN/8, x13, x9, x10)

inst_15342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5400000; valaddr_reg:x12; val_offset:45963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45963*FLEN/8, x13, x9, x10)

inst_15343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc53fffff; valaddr_reg:x12; val_offset:45966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45966*FLEN/8, x13, x9, x10)

inst_15344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5600000; valaddr_reg:x12; val_offset:45969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45969*FLEN/8, x13, x9, x10)

inst_15345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc51fffff; valaddr_reg:x12; val_offset:45972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45972*FLEN/8, x13, x9, x10)

inst_15346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5700000; valaddr_reg:x12; val_offset:45975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45975*FLEN/8, x13, x9, x10)

inst_15347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc50fffff; valaddr_reg:x12; val_offset:45978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45978*FLEN/8, x13, x9, x10)

inst_15348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5780000; valaddr_reg:x12; val_offset:45981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45981*FLEN/8, x13, x9, x10)

inst_15349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc507ffff; valaddr_reg:x12; val_offset:45984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45984*FLEN/8, x13, x9, x10)

inst_15350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57c0000; valaddr_reg:x12; val_offset:45987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45987*FLEN/8, x13, x9, x10)

inst_15351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc503ffff; valaddr_reg:x12; val_offset:45990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45990*FLEN/8, x13, x9, x10)

inst_15352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57e0000; valaddr_reg:x12; val_offset:45993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45993*FLEN/8, x13, x9, x10)

inst_15353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc501ffff; valaddr_reg:x12; val_offset:45996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45996*FLEN/8, x13, x9, x10)

inst_15354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57f0000; valaddr_reg:x12; val_offset:45999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 45999*FLEN/8, x13, x9, x10)

inst_15355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc500ffff; valaddr_reg:x12; val_offset:46002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46002*FLEN/8, x13, x9, x10)

inst_15356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57f8000; valaddr_reg:x12; val_offset:46005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46005*FLEN/8, x13, x9, x10)

inst_15357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5007fff; valaddr_reg:x12; val_offset:46008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46008*FLEN/8, x13, x9, x10)

inst_15358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fc000; valaddr_reg:x12; val_offset:46011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46011*FLEN/8, x13, x9, x10)

inst_15359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5003fff; valaddr_reg:x12; val_offset:46014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46014*FLEN/8, x13, x9, x10)

inst_15360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fe000; valaddr_reg:x12; val_offset:46017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46017*FLEN/8, x13, x9, x10)

inst_15361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5001fff; valaddr_reg:x12; val_offset:46020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46020*FLEN/8, x13, x9, x10)

inst_15362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ff000; valaddr_reg:x12; val_offset:46023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46023*FLEN/8, x13, x9, x10)

inst_15363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5000fff; valaddr_reg:x12; val_offset:46026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46026*FLEN/8, x13, x9, x10)

inst_15364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ff800; valaddr_reg:x12; val_offset:46029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46029*FLEN/8, x13, x9, x10)

inst_15365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc50007ff; valaddr_reg:x12; val_offset:46032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46032*FLEN/8, x13, x9, x10)

inst_15366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ffc00; valaddr_reg:x12; val_offset:46035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46035*FLEN/8, x13, x9, x10)

inst_15367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc50003ff; valaddr_reg:x12; val_offset:46038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46038*FLEN/8, x13, x9, x10)

inst_15368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ffe00; valaddr_reg:x12; val_offset:46041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46041*FLEN/8, x13, x9, x10)

inst_15369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc50001ff; valaddr_reg:x12; val_offset:46044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46044*FLEN/8, x13, x9, x10)

inst_15370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fff00; valaddr_reg:x12; val_offset:46047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46047*FLEN/8, x13, x9, x10)

inst_15371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc50000ff; valaddr_reg:x12; val_offset:46050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46050*FLEN/8, x13, x9, x10)

inst_15372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fff80; valaddr_reg:x12; val_offset:46053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46053*FLEN/8, x13, x9, x10)

inst_15373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc500007f; valaddr_reg:x12; val_offset:46056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46056*FLEN/8, x13, x9, x10)

inst_15374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fffc0; valaddr_reg:x12; val_offset:46059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46059*FLEN/8, x13, x9, x10)

inst_15375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc500003f; valaddr_reg:x12; val_offset:46062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46062*FLEN/8, x13, x9, x10)

inst_15376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57fffe0; valaddr_reg:x12; val_offset:46065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46065*FLEN/8, x13, x9, x10)

inst_15377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc500001f; valaddr_reg:x12; val_offset:46068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46068*FLEN/8, x13, x9, x10)

inst_15378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ffff0; valaddr_reg:x12; val_offset:46071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46071*FLEN/8, x13, x9, x10)

inst_15379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc500000f; valaddr_reg:x12; val_offset:46074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46074*FLEN/8, x13, x9, x10)

inst_15380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ffff8; valaddr_reg:x12; val_offset:46077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46077*FLEN/8, x13, x9, x10)

inst_15381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5000007; valaddr_reg:x12; val_offset:46080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46080*FLEN/8, x13, x9, x10)

inst_15382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ffffc; valaddr_reg:x12; val_offset:46083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46083*FLEN/8, x13, x9, x10)

inst_15383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5000003; valaddr_reg:x12; val_offset:46086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46086*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_120)
inst_15384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc57ffffe; valaddr_reg:x12; val_offset:46089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46089*FLEN/8, x13, x9, x10)

inst_15385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xc5000001; valaddr_reg:x12; val_offset:46092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46092*FLEN/8, x13, x9, x10)

inst_15386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:46095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46095*FLEN/8, x13, x9, x10)

inst_15387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbf800007; valaddr_reg:x12; val_offset:46098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46098*FLEN/8, x13, x9, x10)

inst_15388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:46101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46101*FLEN/8, x13, x9, x10)

inst_15389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbf800003; valaddr_reg:x12; val_offset:46104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46104*FLEN/8, x13, x9, x10)

inst_15390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:46107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46107*FLEN/8, x13, x9, x10)

inst_15391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbf800001; valaddr_reg:x12; val_offset:46110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46110*FLEN/8, x13, x9, x10)

inst_15392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:46113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46113*FLEN/8, x13, x9, x10)

inst_15393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:46116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46116*FLEN/8, x13, x9, x10)

inst_15394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbf999999; valaddr_reg:x12; val_offset:46119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46119*FLEN/8, x13, x9, x10)

inst_15395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:46122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46122*FLEN/8, x13, x9, x10)

inst_15396:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:46125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46125*FLEN/8, x13, x9, x10)

inst_15397:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:46128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46128*FLEN/8, x13, x9, x10)

inst_15398:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:46131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46131*FLEN/8, x13, x9, x10)

inst_15399:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:46134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46134*FLEN/8, x13, x9, x10)

inst_15400:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:46137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46137*FLEN/8, x13, x9, x10)

inst_15401:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d2b40 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fdb2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd2b40; op2val:0x804fdb2b;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:46140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46140*FLEN/8, x13, x9, x10)

inst_15402:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5800000; valaddr_reg:x12; val_offset:46143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46143*FLEN/8, x13, x9, x10)

inst_15403:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffffff; valaddr_reg:x12; val_offset:46146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46146*FLEN/8, x13, x9, x10)

inst_15404:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5c00000; valaddr_reg:x12; val_offset:46149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46149*FLEN/8, x13, x9, x10)

inst_15405:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5bfffff; valaddr_reg:x12; val_offset:46152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46152*FLEN/8, x13, x9, x10)

inst_15406:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5e00000; valaddr_reg:x12; val_offset:46155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46155*FLEN/8, x13, x9, x10)

inst_15407:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc59fffff; valaddr_reg:x12; val_offset:46158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46158*FLEN/8, x13, x9, x10)

inst_15408:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5f00000; valaddr_reg:x12; val_offset:46161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46161*FLEN/8, x13, x9, x10)

inst_15409:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc58fffff; valaddr_reg:x12; val_offset:46164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46164*FLEN/8, x13, x9, x10)

inst_15410:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5f80000; valaddr_reg:x12; val_offset:46167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46167*FLEN/8, x13, x9, x10)

inst_15411:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc587ffff; valaddr_reg:x12; val_offset:46170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46170*FLEN/8, x13, x9, x10)

inst_15412:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fc0000; valaddr_reg:x12; val_offset:46173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46173*FLEN/8, x13, x9, x10)

inst_15413:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc583ffff; valaddr_reg:x12; val_offset:46176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46176*FLEN/8, x13, x9, x10)

inst_15414:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fe0000; valaddr_reg:x12; val_offset:46179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46179*FLEN/8, x13, x9, x10)

inst_15415:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc581ffff; valaddr_reg:x12; val_offset:46182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46182*FLEN/8, x13, x9, x10)

inst_15416:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ff0000; valaddr_reg:x12; val_offset:46185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46185*FLEN/8, x13, x9, x10)

inst_15417:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc580ffff; valaddr_reg:x12; val_offset:46188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46188*FLEN/8, x13, x9, x10)

inst_15418:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ff8000; valaddr_reg:x12; val_offset:46191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46191*FLEN/8, x13, x9, x10)

inst_15419:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5807fff; valaddr_reg:x12; val_offset:46194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46194*FLEN/8, x13, x9, x10)

inst_15420:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffc000; valaddr_reg:x12; val_offset:46197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46197*FLEN/8, x13, x9, x10)

inst_15421:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5803fff; valaddr_reg:x12; val_offset:46200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46200*FLEN/8, x13, x9, x10)

inst_15422:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffe000; valaddr_reg:x12; val_offset:46203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46203*FLEN/8, x13, x9, x10)

inst_15423:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5801fff; valaddr_reg:x12; val_offset:46206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46206*FLEN/8, x13, x9, x10)

inst_15424:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fff000; valaddr_reg:x12; val_offset:46209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46209*FLEN/8, x13, x9, x10)

inst_15425:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5800fff; valaddr_reg:x12; val_offset:46212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46212*FLEN/8, x13, x9, x10)

inst_15426:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fff800; valaddr_reg:x12; val_offset:46215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46215*FLEN/8, x13, x9, x10)

inst_15427:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc58007ff; valaddr_reg:x12; val_offset:46218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46218*FLEN/8, x13, x9, x10)

inst_15428:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fffc00; valaddr_reg:x12; val_offset:46221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46221*FLEN/8, x13, x9, x10)

inst_15429:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc58003ff; valaddr_reg:x12; val_offset:46224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46224*FLEN/8, x13, x9, x10)

inst_15430:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fffe00; valaddr_reg:x12; val_offset:46227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46227*FLEN/8, x13, x9, x10)

inst_15431:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc58001ff; valaddr_reg:x12; val_offset:46230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46230*FLEN/8, x13, x9, x10)

inst_15432:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffff00; valaddr_reg:x12; val_offset:46233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46233*FLEN/8, x13, x9, x10)

inst_15433:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc58000ff; valaddr_reg:x12; val_offset:46236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46236*FLEN/8, x13, x9, x10)

inst_15434:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffff80; valaddr_reg:x12; val_offset:46239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46239*FLEN/8, x13, x9, x10)

inst_15435:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc580007f; valaddr_reg:x12; val_offset:46242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46242*FLEN/8, x13, x9, x10)

inst_15436:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffffc0; valaddr_reg:x12; val_offset:46245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46245*FLEN/8, x13, x9, x10)

inst_15437:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc580003f; valaddr_reg:x12; val_offset:46248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46248*FLEN/8, x13, x9, x10)

inst_15438:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5ffffe0; valaddr_reg:x12; val_offset:46251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46251*FLEN/8, x13, x9, x10)

inst_15439:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc580001f; valaddr_reg:x12; val_offset:46254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46254*FLEN/8, x13, x9, x10)

inst_15440:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fffff0; valaddr_reg:x12; val_offset:46257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46257*FLEN/8, x13, x9, x10)

inst_15441:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc580000f; valaddr_reg:x12; val_offset:46260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46260*FLEN/8, x13, x9, x10)

inst_15442:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fffff8; valaddr_reg:x12; val_offset:46263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46263*FLEN/8, x13, x9, x10)

inst_15443:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5800007; valaddr_reg:x12; val_offset:46266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46266*FLEN/8, x13, x9, x10)

inst_15444:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fffffc; valaddr_reg:x12; val_offset:46269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46269*FLEN/8, x13, x9, x10)

inst_15445:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5800003; valaddr_reg:x12; val_offset:46272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46272*FLEN/8, x13, x9, x10)

inst_15446:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5fffffe; valaddr_reg:x12; val_offset:46275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46275*FLEN/8, x13, x9, x10)

inst_15447:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xc5800001; valaddr_reg:x12; val_offset:46278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46278*FLEN/8, x13, x9, x10)

inst_15448:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:46281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46281*FLEN/8, x13, x9, x10)

inst_15449:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbf800007; valaddr_reg:x12; val_offset:46284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46284*FLEN/8, x13, x9, x10)

inst_15450:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:46287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46287*FLEN/8, x13, x9, x10)

inst_15451:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbf800003; valaddr_reg:x12; val_offset:46290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46290*FLEN/8, x13, x9, x10)

inst_15452:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:46293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46293*FLEN/8, x13, x9, x10)

inst_15453:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbf800001; valaddr_reg:x12; val_offset:46296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46296*FLEN/8, x13, x9, x10)

inst_15454:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:46299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46299*FLEN/8, x13, x9, x10)

inst_15455:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:46302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46302*FLEN/8, x13, x9, x10)

inst_15456:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbf999999; valaddr_reg:x12; val_offset:46305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46305*FLEN/8, x13, x9, x10)

inst_15457:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:46308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46308*FLEN/8, x13, x9, x10)

inst_15458:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:46311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46311*FLEN/8, x13, x9, x10)

inst_15459:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:46314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46314*FLEN/8, x13, x9, x10)

inst_15460:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:46317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46317*FLEN/8, x13, x9, x10)

inst_15461:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:46320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46320*FLEN/8, x13, x9, x10)

inst_15462:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:46323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46323*FLEN/8, x13, x9, x10)

inst_15463:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2f96eb and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3a9df7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daf96eb; op2val:0x813a9df7;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:46326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46326*FLEN/8, x13, x9, x10)

inst_15464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6000000; valaddr_reg:x12; val_offset:46329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46329*FLEN/8, x13, x9, x10)

inst_15465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fffff; valaddr_reg:x12; val_offset:46332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46332*FLEN/8, x13, x9, x10)

inst_15466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6400000; valaddr_reg:x12; val_offset:46335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46335*FLEN/8, x13, x9, x10)

inst_15467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc63fffff; valaddr_reg:x12; val_offset:46338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46338*FLEN/8, x13, x9, x10)

inst_15468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6600000; valaddr_reg:x12; val_offset:46341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46341*FLEN/8, x13, x9, x10)

inst_15469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc61fffff; valaddr_reg:x12; val_offset:46344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46344*FLEN/8, x13, x9, x10)

inst_15470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6700000; valaddr_reg:x12; val_offset:46347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46347*FLEN/8, x13, x9, x10)

inst_15471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc60fffff; valaddr_reg:x12; val_offset:46350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46350*FLEN/8, x13, x9, x10)

inst_15472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6780000; valaddr_reg:x12; val_offset:46353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46353*FLEN/8, x13, x9, x10)

inst_15473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc607ffff; valaddr_reg:x12; val_offset:46356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46356*FLEN/8, x13, x9, x10)

inst_15474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67c0000; valaddr_reg:x12; val_offset:46359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46359*FLEN/8, x13, x9, x10)

inst_15475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc603ffff; valaddr_reg:x12; val_offset:46362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46362*FLEN/8, x13, x9, x10)

inst_15476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67e0000; valaddr_reg:x12; val_offset:46365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46365*FLEN/8, x13, x9, x10)

inst_15477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc601ffff; valaddr_reg:x12; val_offset:46368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46368*FLEN/8, x13, x9, x10)

inst_15478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67f0000; valaddr_reg:x12; val_offset:46371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46371*FLEN/8, x13, x9, x10)

inst_15479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc600ffff; valaddr_reg:x12; val_offset:46374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46374*FLEN/8, x13, x9, x10)

inst_15480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67f8000; valaddr_reg:x12; val_offset:46377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46377*FLEN/8, x13, x9, x10)

inst_15481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6007fff; valaddr_reg:x12; val_offset:46380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46380*FLEN/8, x13, x9, x10)

inst_15482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fc000; valaddr_reg:x12; val_offset:46383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46383*FLEN/8, x13, x9, x10)

inst_15483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6003fff; valaddr_reg:x12; val_offset:46386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46386*FLEN/8, x13, x9, x10)

inst_15484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fe000; valaddr_reg:x12; val_offset:46389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46389*FLEN/8, x13, x9, x10)

inst_15485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6001fff; valaddr_reg:x12; val_offset:46392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46392*FLEN/8, x13, x9, x10)

inst_15486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ff000; valaddr_reg:x12; val_offset:46395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46395*FLEN/8, x13, x9, x10)

inst_15487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6000fff; valaddr_reg:x12; val_offset:46398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46398*FLEN/8, x13, x9, x10)

inst_15488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ff800; valaddr_reg:x12; val_offset:46401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46401*FLEN/8, x13, x9, x10)

inst_15489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc60007ff; valaddr_reg:x12; val_offset:46404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46404*FLEN/8, x13, x9, x10)

inst_15490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ffc00; valaddr_reg:x12; val_offset:46407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46407*FLEN/8, x13, x9, x10)

inst_15491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc60003ff; valaddr_reg:x12; val_offset:46410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46410*FLEN/8, x13, x9, x10)

inst_15492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ffe00; valaddr_reg:x12; val_offset:46413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46413*FLEN/8, x13, x9, x10)

inst_15493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc60001ff; valaddr_reg:x12; val_offset:46416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46416*FLEN/8, x13, x9, x10)

inst_15494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fff00; valaddr_reg:x12; val_offset:46419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46419*FLEN/8, x13, x9, x10)

inst_15495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc60000ff; valaddr_reg:x12; val_offset:46422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46422*FLEN/8, x13, x9, x10)

inst_15496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fff80; valaddr_reg:x12; val_offset:46425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46425*FLEN/8, x13, x9, x10)

inst_15497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc600007f; valaddr_reg:x12; val_offset:46428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46428*FLEN/8, x13, x9, x10)

inst_15498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fffc0; valaddr_reg:x12; val_offset:46431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46431*FLEN/8, x13, x9, x10)

inst_15499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc600003f; valaddr_reg:x12; val_offset:46434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46434*FLEN/8, x13, x9, x10)

inst_15500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67fffe0; valaddr_reg:x12; val_offset:46437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46437*FLEN/8, x13, x9, x10)

inst_15501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc600001f; valaddr_reg:x12; val_offset:46440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46440*FLEN/8, x13, x9, x10)

inst_15502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ffff0; valaddr_reg:x12; val_offset:46443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46443*FLEN/8, x13, x9, x10)

inst_15503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc600000f; valaddr_reg:x12; val_offset:46446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46446*FLEN/8, x13, x9, x10)

inst_15504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ffff8; valaddr_reg:x12; val_offset:46449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46449*FLEN/8, x13, x9, x10)

inst_15505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6000007; valaddr_reg:x12; val_offset:46452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46452*FLEN/8, x13, x9, x10)

inst_15506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ffffc; valaddr_reg:x12; val_offset:46455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46455*FLEN/8, x13, x9, x10)

inst_15507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6000003; valaddr_reg:x12; val_offset:46458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46458*FLEN/8, x13, x9, x10)

inst_15508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc67ffffe; valaddr_reg:x12; val_offset:46461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46461*FLEN/8, x13, x9, x10)

inst_15509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xc6000001; valaddr_reg:x12; val_offset:46464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46464*FLEN/8, x13, x9, x10)

inst_15510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:46467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46467*FLEN/8, x13, x9, x10)

inst_15511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbf800007; valaddr_reg:x12; val_offset:46470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46470*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_121)
inst_15512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:46473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46473*FLEN/8, x13, x9, x10)

inst_15513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbf800003; valaddr_reg:x12; val_offset:46476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46476*FLEN/8, x13, x9, x10)

inst_15514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:46479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46479*FLEN/8, x13, x9, x10)

inst_15515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbf800001; valaddr_reg:x12; val_offset:46482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46482*FLEN/8, x13, x9, x10)

inst_15516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:46485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46485*FLEN/8, x13, x9, x10)

inst_15517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:46488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46488*FLEN/8, x13, x9, x10)

inst_15518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbf999999; valaddr_reg:x12; val_offset:46491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46491*FLEN/8, x13, x9, x10)

inst_15519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:46494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46494*FLEN/8, x13, x9, x10)

inst_15520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:46497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46497*FLEN/8, x13, x9, x10)

inst_15521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:46500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46500*FLEN/8, x13, x9, x10)

inst_15522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:46503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46503*FLEN/8, x13, x9, x10)

inst_15523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:46506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46506*FLEN/8, x13, x9, x10)

inst_15524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:46509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46509*FLEN/8, x13, x9, x10)

inst_15525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2d84 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f9427 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2d84; op2val:0x802f9427;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:46512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46512*FLEN/8, x13, x9, x10)

inst_15526:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6800000; valaddr_reg:x12; val_offset:46515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46515*FLEN/8, x13, x9, x10)

inst_15527:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffffff; valaddr_reg:x12; val_offset:46518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46518*FLEN/8, x13, x9, x10)

inst_15528:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6c00000; valaddr_reg:x12; val_offset:46521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46521*FLEN/8, x13, x9, x10)

inst_15529:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6bfffff; valaddr_reg:x12; val_offset:46524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46524*FLEN/8, x13, x9, x10)

inst_15530:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6e00000; valaddr_reg:x12; val_offset:46527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46527*FLEN/8, x13, x9, x10)

inst_15531:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc69fffff; valaddr_reg:x12; val_offset:46530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46530*FLEN/8, x13, x9, x10)

inst_15532:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6f00000; valaddr_reg:x12; val_offset:46533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46533*FLEN/8, x13, x9, x10)

inst_15533:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc68fffff; valaddr_reg:x12; val_offset:46536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46536*FLEN/8, x13, x9, x10)

inst_15534:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6f80000; valaddr_reg:x12; val_offset:46539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46539*FLEN/8, x13, x9, x10)

inst_15535:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc687ffff; valaddr_reg:x12; val_offset:46542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46542*FLEN/8, x13, x9, x10)

inst_15536:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fc0000; valaddr_reg:x12; val_offset:46545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46545*FLEN/8, x13, x9, x10)

inst_15537:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc683ffff; valaddr_reg:x12; val_offset:46548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46548*FLEN/8, x13, x9, x10)

inst_15538:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fe0000; valaddr_reg:x12; val_offset:46551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46551*FLEN/8, x13, x9, x10)

inst_15539:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc681ffff; valaddr_reg:x12; val_offset:46554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46554*FLEN/8, x13, x9, x10)

inst_15540:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ff0000; valaddr_reg:x12; val_offset:46557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46557*FLEN/8, x13, x9, x10)

inst_15541:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc680ffff; valaddr_reg:x12; val_offset:46560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46560*FLEN/8, x13, x9, x10)

inst_15542:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ff8000; valaddr_reg:x12; val_offset:46563*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46563*FLEN/8, x13, x9, x10)

inst_15543:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6807fff; valaddr_reg:x12; val_offset:46566*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46566*FLEN/8, x13, x9, x10)

inst_15544:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffc000; valaddr_reg:x12; val_offset:46569*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46569*FLEN/8, x13, x9, x10)

inst_15545:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6803fff; valaddr_reg:x12; val_offset:46572*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46572*FLEN/8, x13, x9, x10)

inst_15546:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffe000; valaddr_reg:x12; val_offset:46575*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46575*FLEN/8, x13, x9, x10)

inst_15547:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6801fff; valaddr_reg:x12; val_offset:46578*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46578*FLEN/8, x13, x9, x10)

inst_15548:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fff000; valaddr_reg:x12; val_offset:46581*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46581*FLEN/8, x13, x9, x10)

inst_15549:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6800fff; valaddr_reg:x12; val_offset:46584*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46584*FLEN/8, x13, x9, x10)

inst_15550:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fff800; valaddr_reg:x12; val_offset:46587*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46587*FLEN/8, x13, x9, x10)

inst_15551:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc68007ff; valaddr_reg:x12; val_offset:46590*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46590*FLEN/8, x13, x9, x10)

inst_15552:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fffc00; valaddr_reg:x12; val_offset:46593*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46593*FLEN/8, x13, x9, x10)

inst_15553:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc68003ff; valaddr_reg:x12; val_offset:46596*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46596*FLEN/8, x13, x9, x10)

inst_15554:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fffe00; valaddr_reg:x12; val_offset:46599*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46599*FLEN/8, x13, x9, x10)

inst_15555:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc68001ff; valaddr_reg:x12; val_offset:46602*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46602*FLEN/8, x13, x9, x10)

inst_15556:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffff00; valaddr_reg:x12; val_offset:46605*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46605*FLEN/8, x13, x9, x10)

inst_15557:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc68000ff; valaddr_reg:x12; val_offset:46608*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46608*FLEN/8, x13, x9, x10)

inst_15558:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffff80; valaddr_reg:x12; val_offset:46611*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46611*FLEN/8, x13, x9, x10)

inst_15559:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc680007f; valaddr_reg:x12; val_offset:46614*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46614*FLEN/8, x13, x9, x10)

inst_15560:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffffc0; valaddr_reg:x12; val_offset:46617*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46617*FLEN/8, x13, x9, x10)

inst_15561:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc680003f; valaddr_reg:x12; val_offset:46620*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46620*FLEN/8, x13, x9, x10)

inst_15562:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6ffffe0; valaddr_reg:x12; val_offset:46623*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46623*FLEN/8, x13, x9, x10)

inst_15563:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc680001f; valaddr_reg:x12; val_offset:46626*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46626*FLEN/8, x13, x9, x10)

inst_15564:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fffff0; valaddr_reg:x12; val_offset:46629*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46629*FLEN/8, x13, x9, x10)

inst_15565:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc680000f; valaddr_reg:x12; val_offset:46632*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46632*FLEN/8, x13, x9, x10)

inst_15566:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fffff8; valaddr_reg:x12; val_offset:46635*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46635*FLEN/8, x13, x9, x10)

inst_15567:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6800007; valaddr_reg:x12; val_offset:46638*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46638*FLEN/8, x13, x9, x10)

inst_15568:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fffffc; valaddr_reg:x12; val_offset:46641*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46641*FLEN/8, x13, x9, x10)

inst_15569:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6800003; valaddr_reg:x12; val_offset:46644*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46644*FLEN/8, x13, x9, x10)

inst_15570:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6fffffe; valaddr_reg:x12; val_offset:46647*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46647*FLEN/8, x13, x9, x10)

inst_15571:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xc6800001; valaddr_reg:x12; val_offset:46650*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46650*FLEN/8, x13, x9, x10)

inst_15572:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:46653*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46653*FLEN/8, x13, x9, x10)

inst_15573:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbf800007; valaddr_reg:x12; val_offset:46656*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46656*FLEN/8, x13, x9, x10)

inst_15574:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:46659*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46659*FLEN/8, x13, x9, x10)

inst_15575:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbf800003; valaddr_reg:x12; val_offset:46662*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46662*FLEN/8, x13, x9, x10)

inst_15576:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:46665*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46665*FLEN/8, x13, x9, x10)

inst_15577:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbf800001; valaddr_reg:x12; val_offset:46668*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46668*FLEN/8, x13, x9, x10)

inst_15578:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:46671*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46671*FLEN/8, x13, x9, x10)

inst_15579:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:46674*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46674*FLEN/8, x13, x9, x10)

inst_15580:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbf999999; valaddr_reg:x12; val_offset:46677*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46677*FLEN/8, x13, x9, x10)

inst_15581:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:46680*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46680*FLEN/8, x13, x9, x10)

inst_15582:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:46683*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46683*FLEN/8, x13, x9, x10)

inst_15583:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:46686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46686*FLEN/8, x13, x9, x10)

inst_15584:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:46689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46689*FLEN/8, x13, x9, x10)

inst_15585:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:46692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46692*FLEN/8, x13, x9, x10)

inst_15586:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:46695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46695*FLEN/8, x13, x9, x10)

inst_15587:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25796d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x460651 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5796d; op2val:0x81460651;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:46698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46698*FLEN/8, x13, x9, x10)

inst_15588:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7000000; valaddr_reg:x12; val_offset:46701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46701*FLEN/8, x13, x9, x10)

inst_15589:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fffff; valaddr_reg:x12; val_offset:46704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46704*FLEN/8, x13, x9, x10)

inst_15590:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7400000; valaddr_reg:x12; val_offset:46707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46707*FLEN/8, x13, x9, x10)

inst_15591:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc73fffff; valaddr_reg:x12; val_offset:46710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46710*FLEN/8, x13, x9, x10)

inst_15592:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7600000; valaddr_reg:x12; val_offset:46713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46713*FLEN/8, x13, x9, x10)

inst_15593:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc71fffff; valaddr_reg:x12; val_offset:46716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46716*FLEN/8, x13, x9, x10)

inst_15594:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7700000; valaddr_reg:x12; val_offset:46719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46719*FLEN/8, x13, x9, x10)

inst_15595:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc70fffff; valaddr_reg:x12; val_offset:46722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46722*FLEN/8, x13, x9, x10)

inst_15596:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7780000; valaddr_reg:x12; val_offset:46725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46725*FLEN/8, x13, x9, x10)

inst_15597:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc707ffff; valaddr_reg:x12; val_offset:46728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46728*FLEN/8, x13, x9, x10)

inst_15598:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77c0000; valaddr_reg:x12; val_offset:46731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46731*FLEN/8, x13, x9, x10)

inst_15599:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc703ffff; valaddr_reg:x12; val_offset:46734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46734*FLEN/8, x13, x9, x10)

inst_15600:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77e0000; valaddr_reg:x12; val_offset:46737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46737*FLEN/8, x13, x9, x10)

inst_15601:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc701ffff; valaddr_reg:x12; val_offset:46740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46740*FLEN/8, x13, x9, x10)

inst_15602:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77f0000; valaddr_reg:x12; val_offset:46743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46743*FLEN/8, x13, x9, x10)

inst_15603:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc700ffff; valaddr_reg:x12; val_offset:46746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46746*FLEN/8, x13, x9, x10)

inst_15604:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77f8000; valaddr_reg:x12; val_offset:46749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46749*FLEN/8, x13, x9, x10)

inst_15605:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7007fff; valaddr_reg:x12; val_offset:46752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46752*FLEN/8, x13, x9, x10)

inst_15606:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fc000; valaddr_reg:x12; val_offset:46755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46755*FLEN/8, x13, x9, x10)

inst_15607:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7003fff; valaddr_reg:x12; val_offset:46758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46758*FLEN/8, x13, x9, x10)

inst_15608:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fe000; valaddr_reg:x12; val_offset:46761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46761*FLEN/8, x13, x9, x10)

inst_15609:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7001fff; valaddr_reg:x12; val_offset:46764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46764*FLEN/8, x13, x9, x10)

inst_15610:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ff000; valaddr_reg:x12; val_offset:46767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46767*FLEN/8, x13, x9, x10)

inst_15611:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7000fff; valaddr_reg:x12; val_offset:46770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46770*FLEN/8, x13, x9, x10)

inst_15612:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ff800; valaddr_reg:x12; val_offset:46773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46773*FLEN/8, x13, x9, x10)

inst_15613:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc70007ff; valaddr_reg:x12; val_offset:46776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46776*FLEN/8, x13, x9, x10)

inst_15614:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ffc00; valaddr_reg:x12; val_offset:46779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46779*FLEN/8, x13, x9, x10)

inst_15615:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc70003ff; valaddr_reg:x12; val_offset:46782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46782*FLEN/8, x13, x9, x10)

inst_15616:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ffe00; valaddr_reg:x12; val_offset:46785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46785*FLEN/8, x13, x9, x10)

inst_15617:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc70001ff; valaddr_reg:x12; val_offset:46788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46788*FLEN/8, x13, x9, x10)

inst_15618:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fff00; valaddr_reg:x12; val_offset:46791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46791*FLEN/8, x13, x9, x10)

inst_15619:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc70000ff; valaddr_reg:x12; val_offset:46794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46794*FLEN/8, x13, x9, x10)

inst_15620:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fff80; valaddr_reg:x12; val_offset:46797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46797*FLEN/8, x13, x9, x10)

inst_15621:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc700007f; valaddr_reg:x12; val_offset:46800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46800*FLEN/8, x13, x9, x10)

inst_15622:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fffc0; valaddr_reg:x12; val_offset:46803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46803*FLEN/8, x13, x9, x10)

inst_15623:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc700003f; valaddr_reg:x12; val_offset:46806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46806*FLEN/8, x13, x9, x10)

inst_15624:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77fffe0; valaddr_reg:x12; val_offset:46809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46809*FLEN/8, x13, x9, x10)

inst_15625:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc700001f; valaddr_reg:x12; val_offset:46812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46812*FLEN/8, x13, x9, x10)

inst_15626:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ffff0; valaddr_reg:x12; val_offset:46815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46815*FLEN/8, x13, x9, x10)

inst_15627:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc700000f; valaddr_reg:x12; val_offset:46818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46818*FLEN/8, x13, x9, x10)

inst_15628:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ffff8; valaddr_reg:x12; val_offset:46821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46821*FLEN/8, x13, x9, x10)

inst_15629:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7000007; valaddr_reg:x12; val_offset:46824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46824*FLEN/8, x13, x9, x10)

inst_15630:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ffffc; valaddr_reg:x12; val_offset:46827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46827*FLEN/8, x13, x9, x10)

inst_15631:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7000003; valaddr_reg:x12; val_offset:46830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46830*FLEN/8, x13, x9, x10)

inst_15632:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc77ffffe; valaddr_reg:x12; val_offset:46833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46833*FLEN/8, x13, x9, x10)

inst_15633:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xc7000001; valaddr_reg:x12; val_offset:46836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46836*FLEN/8, x13, x9, x10)

inst_15634:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:46839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46839*FLEN/8, x13, x9, x10)

inst_15635:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbf800007; valaddr_reg:x12; val_offset:46842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46842*FLEN/8, x13, x9, x10)

inst_15636:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:46845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46845*FLEN/8, x13, x9, x10)

inst_15637:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbf800003; valaddr_reg:x12; val_offset:46848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46848*FLEN/8, x13, x9, x10)

inst_15638:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:46851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46851*FLEN/8, x13, x9, x10)

inst_15639:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbf800001; valaddr_reg:x12; val_offset:46854*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46854*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_122)
inst_15640:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:46857*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46857*FLEN/8, x13, x9, x10)

inst_15641:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:46860*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46860*FLEN/8, x13, x9, x10)

inst_15642:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbf999999; valaddr_reg:x12; val_offset:46863*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46863*FLEN/8, x13, x9, x10)

inst_15643:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:46866*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46866*FLEN/8, x13, x9, x10)

inst_15644:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:46869*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46869*FLEN/8, x13, x9, x10)

inst_15645:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:46872*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46872*FLEN/8, x13, x9, x10)

inst_15646:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:46875*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46875*FLEN/8, x13, x9, x10)

inst_15647:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:46878*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46878*FLEN/8, x13, x9, x10)

inst_15648:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:46881*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46881*FLEN/8, x13, x9, x10)

inst_15649:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0c8ca0 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x692471 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0c8ca0; op2val:0x81e92471;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:46884*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46884*FLEN/8, x13, x9, x10)

inst_15650:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7800000; valaddr_reg:x12; val_offset:46887*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46887*FLEN/8, x13, x9, x10)

inst_15651:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffffff; valaddr_reg:x12; val_offset:46890*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46890*FLEN/8, x13, x9, x10)

inst_15652:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7c00000; valaddr_reg:x12; val_offset:46893*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46893*FLEN/8, x13, x9, x10)

inst_15653:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7bfffff; valaddr_reg:x12; val_offset:46896*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46896*FLEN/8, x13, x9, x10)

inst_15654:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7e00000; valaddr_reg:x12; val_offset:46899*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46899*FLEN/8, x13, x9, x10)

inst_15655:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc79fffff; valaddr_reg:x12; val_offset:46902*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46902*FLEN/8, x13, x9, x10)

inst_15656:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7f00000; valaddr_reg:x12; val_offset:46905*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46905*FLEN/8, x13, x9, x10)

inst_15657:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc78fffff; valaddr_reg:x12; val_offset:46908*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46908*FLEN/8, x13, x9, x10)

inst_15658:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7f80000; valaddr_reg:x12; val_offset:46911*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46911*FLEN/8, x13, x9, x10)

inst_15659:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc787ffff; valaddr_reg:x12; val_offset:46914*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46914*FLEN/8, x13, x9, x10)

inst_15660:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fc0000; valaddr_reg:x12; val_offset:46917*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46917*FLEN/8, x13, x9, x10)

inst_15661:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc783ffff; valaddr_reg:x12; val_offset:46920*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46920*FLEN/8, x13, x9, x10)

inst_15662:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fe0000; valaddr_reg:x12; val_offset:46923*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46923*FLEN/8, x13, x9, x10)

inst_15663:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc781ffff; valaddr_reg:x12; val_offset:46926*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46926*FLEN/8, x13, x9, x10)

inst_15664:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ff0000; valaddr_reg:x12; val_offset:46929*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46929*FLEN/8, x13, x9, x10)

inst_15665:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc780ffff; valaddr_reg:x12; val_offset:46932*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46932*FLEN/8, x13, x9, x10)

inst_15666:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ff8000; valaddr_reg:x12; val_offset:46935*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46935*FLEN/8, x13, x9, x10)

inst_15667:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7807fff; valaddr_reg:x12; val_offset:46938*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46938*FLEN/8, x13, x9, x10)

inst_15668:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffc000; valaddr_reg:x12; val_offset:46941*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46941*FLEN/8, x13, x9, x10)

inst_15669:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7803fff; valaddr_reg:x12; val_offset:46944*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46944*FLEN/8, x13, x9, x10)

inst_15670:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffe000; valaddr_reg:x12; val_offset:46947*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46947*FLEN/8, x13, x9, x10)

inst_15671:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7801fff; valaddr_reg:x12; val_offset:46950*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46950*FLEN/8, x13, x9, x10)

inst_15672:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fff000; valaddr_reg:x12; val_offset:46953*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46953*FLEN/8, x13, x9, x10)

inst_15673:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7800fff; valaddr_reg:x12; val_offset:46956*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46956*FLEN/8, x13, x9, x10)

inst_15674:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fff800; valaddr_reg:x12; val_offset:46959*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46959*FLEN/8, x13, x9, x10)

inst_15675:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc78007ff; valaddr_reg:x12; val_offset:46962*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46962*FLEN/8, x13, x9, x10)

inst_15676:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fffc00; valaddr_reg:x12; val_offset:46965*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46965*FLEN/8, x13, x9, x10)

inst_15677:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc78003ff; valaddr_reg:x12; val_offset:46968*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46968*FLEN/8, x13, x9, x10)

inst_15678:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fffe00; valaddr_reg:x12; val_offset:46971*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46971*FLEN/8, x13, x9, x10)

inst_15679:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc78001ff; valaddr_reg:x12; val_offset:46974*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46974*FLEN/8, x13, x9, x10)

inst_15680:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffff00; valaddr_reg:x12; val_offset:46977*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46977*FLEN/8, x13, x9, x10)

inst_15681:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc78000ff; valaddr_reg:x12; val_offset:46980*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46980*FLEN/8, x13, x9, x10)

inst_15682:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffff80; valaddr_reg:x12; val_offset:46983*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46983*FLEN/8, x13, x9, x10)

inst_15683:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc780007f; valaddr_reg:x12; val_offset:46986*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46986*FLEN/8, x13, x9, x10)

inst_15684:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffffc0; valaddr_reg:x12; val_offset:46989*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46989*FLEN/8, x13, x9, x10)

inst_15685:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc780003f; valaddr_reg:x12; val_offset:46992*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46992*FLEN/8, x13, x9, x10)

inst_15686:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7ffffe0; valaddr_reg:x12; val_offset:46995*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46995*FLEN/8, x13, x9, x10)

inst_15687:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc780001f; valaddr_reg:x12; val_offset:46998*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 46998*FLEN/8, x13, x9, x10)

inst_15688:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fffff0; valaddr_reg:x12; val_offset:47001*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47001*FLEN/8, x13, x9, x10)

inst_15689:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc780000f; valaddr_reg:x12; val_offset:47004*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47004*FLEN/8, x13, x9, x10)

inst_15690:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fffff8; valaddr_reg:x12; val_offset:47007*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47007*FLEN/8, x13, x9, x10)

inst_15691:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7800007; valaddr_reg:x12; val_offset:47010*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47010*FLEN/8, x13, x9, x10)

inst_15692:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fffffc; valaddr_reg:x12; val_offset:47013*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47013*FLEN/8, x13, x9, x10)

inst_15693:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7800003; valaddr_reg:x12; val_offset:47016*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47016*FLEN/8, x13, x9, x10)

inst_15694:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7fffffe; valaddr_reg:x12; val_offset:47019*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47019*FLEN/8, x13, x9, x10)

inst_15695:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xc7800001; valaddr_reg:x12; val_offset:47022*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47022*FLEN/8, x13, x9, x10)

inst_15696:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:47025*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47025*FLEN/8, x13, x9, x10)

inst_15697:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbf800007; valaddr_reg:x12; val_offset:47028*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47028*FLEN/8, x13, x9, x10)

inst_15698:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:47031*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47031*FLEN/8, x13, x9, x10)

inst_15699:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbf800003; valaddr_reg:x12; val_offset:47034*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47034*FLEN/8, x13, x9, x10)

inst_15700:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:47037*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47037*FLEN/8, x13, x9, x10)

inst_15701:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbf800001; valaddr_reg:x12; val_offset:47040*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47040*FLEN/8, x13, x9, x10)

inst_15702:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:47043*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47043*FLEN/8, x13, x9, x10)

inst_15703:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:47046*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47046*FLEN/8, x13, x9, x10)

inst_15704:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbf999999; valaddr_reg:x12; val_offset:47049*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47049*FLEN/8, x13, x9, x10)

inst_15705:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:47052*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47052*FLEN/8, x13, x9, x10)

inst_15706:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:47055*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47055*FLEN/8, x13, x9, x10)

inst_15707:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:47058*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47058*FLEN/8, x13, x9, x10)

inst_15708:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:47061*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47061*FLEN/8, x13, x9, x10)

inst_15709:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:47064*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47064*FLEN/8, x13, x9, x10)

inst_15710:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:47067*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47067*FLEN/8, x13, x9, x10)

inst_15711:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x632071 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x104599 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e632071; op2val:0x80904599;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:47070*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47070*FLEN/8, x13, x9, x10)

inst_15712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8000000; valaddr_reg:x12; val_offset:47073*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47073*FLEN/8, x13, x9, x10)

inst_15713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fffff; valaddr_reg:x12; val_offset:47076*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47076*FLEN/8, x13, x9, x10)

inst_15714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8400000; valaddr_reg:x12; val_offset:47079*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47079*FLEN/8, x13, x9, x10)

inst_15715:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc83fffff; valaddr_reg:x12; val_offset:47082*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47082*FLEN/8, x13, x9, x10)

inst_15716:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8600000; valaddr_reg:x12; val_offset:47085*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47085*FLEN/8, x13, x9, x10)

inst_15717:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc81fffff; valaddr_reg:x12; val_offset:47088*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47088*FLEN/8, x13, x9, x10)

inst_15718:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8700000; valaddr_reg:x12; val_offset:47091*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47091*FLEN/8, x13, x9, x10)

inst_15719:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc80fffff; valaddr_reg:x12; val_offset:47094*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47094*FLEN/8, x13, x9, x10)

inst_15720:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8780000; valaddr_reg:x12; val_offset:47097*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47097*FLEN/8, x13, x9, x10)

inst_15721:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc807ffff; valaddr_reg:x12; val_offset:47100*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47100*FLEN/8, x13, x9, x10)

inst_15722:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87c0000; valaddr_reg:x12; val_offset:47103*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47103*FLEN/8, x13, x9, x10)

inst_15723:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc803ffff; valaddr_reg:x12; val_offset:47106*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47106*FLEN/8, x13, x9, x10)

inst_15724:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87e0000; valaddr_reg:x12; val_offset:47109*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47109*FLEN/8, x13, x9, x10)

inst_15725:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc801ffff; valaddr_reg:x12; val_offset:47112*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47112*FLEN/8, x13, x9, x10)

inst_15726:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87f0000; valaddr_reg:x12; val_offset:47115*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47115*FLEN/8, x13, x9, x10)

inst_15727:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc800ffff; valaddr_reg:x12; val_offset:47118*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47118*FLEN/8, x13, x9, x10)

inst_15728:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87f8000; valaddr_reg:x12; val_offset:47121*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47121*FLEN/8, x13, x9, x10)

inst_15729:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8007fff; valaddr_reg:x12; val_offset:47124*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47124*FLEN/8, x13, x9, x10)

inst_15730:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fc000; valaddr_reg:x12; val_offset:47127*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47127*FLEN/8, x13, x9, x10)

inst_15731:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8003fff; valaddr_reg:x12; val_offset:47130*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47130*FLEN/8, x13, x9, x10)

inst_15732:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fe000; valaddr_reg:x12; val_offset:47133*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47133*FLEN/8, x13, x9, x10)

inst_15733:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8001fff; valaddr_reg:x12; val_offset:47136*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47136*FLEN/8, x13, x9, x10)

inst_15734:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ff000; valaddr_reg:x12; val_offset:47139*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47139*FLEN/8, x13, x9, x10)

inst_15735:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8000fff; valaddr_reg:x12; val_offset:47142*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47142*FLEN/8, x13, x9, x10)

inst_15736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ff800; valaddr_reg:x12; val_offset:47145*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47145*FLEN/8, x13, x9, x10)

inst_15737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc80007ff; valaddr_reg:x12; val_offset:47148*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47148*FLEN/8, x13, x9, x10)

inst_15738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ffc00; valaddr_reg:x12; val_offset:47151*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47151*FLEN/8, x13, x9, x10)

inst_15739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc80003ff; valaddr_reg:x12; val_offset:47154*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47154*FLEN/8, x13, x9, x10)

inst_15740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ffe00; valaddr_reg:x12; val_offset:47157*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47157*FLEN/8, x13, x9, x10)

inst_15741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc80001ff; valaddr_reg:x12; val_offset:47160*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47160*FLEN/8, x13, x9, x10)

inst_15742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fff00; valaddr_reg:x12; val_offset:47163*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47163*FLEN/8, x13, x9, x10)

inst_15743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc80000ff; valaddr_reg:x12; val_offset:47166*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47166*FLEN/8, x13, x9, x10)

inst_15744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fff80; valaddr_reg:x12; val_offset:47169*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47169*FLEN/8, x13, x9, x10)

inst_15745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc800007f; valaddr_reg:x12; val_offset:47172*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47172*FLEN/8, x13, x9, x10)

inst_15746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fffc0; valaddr_reg:x12; val_offset:47175*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47175*FLEN/8, x13, x9, x10)

inst_15747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc800003f; valaddr_reg:x12; val_offset:47178*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47178*FLEN/8, x13, x9, x10)

inst_15748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87fffe0; valaddr_reg:x12; val_offset:47181*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47181*FLEN/8, x13, x9, x10)

inst_15749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc800001f; valaddr_reg:x12; val_offset:47184*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47184*FLEN/8, x13, x9, x10)

inst_15750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ffff0; valaddr_reg:x12; val_offset:47187*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47187*FLEN/8, x13, x9, x10)

inst_15751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc800000f; valaddr_reg:x12; val_offset:47190*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47190*FLEN/8, x13, x9, x10)

inst_15752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ffff8; valaddr_reg:x12; val_offset:47193*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47193*FLEN/8, x13, x9, x10)

inst_15753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8000007; valaddr_reg:x12; val_offset:47196*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47196*FLEN/8, x13, x9, x10)

inst_15754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ffffc; valaddr_reg:x12; val_offset:47199*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47199*FLEN/8, x13, x9, x10)

inst_15755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8000003; valaddr_reg:x12; val_offset:47202*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47202*FLEN/8, x13, x9, x10)

inst_15756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc87ffffe; valaddr_reg:x12; val_offset:47205*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47205*FLEN/8, x13, x9, x10)

inst_15757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xc8000001; valaddr_reg:x12; val_offset:47208*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47208*FLEN/8, x13, x9, x10)

inst_15758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:47211*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47211*FLEN/8, x13, x9, x10)

inst_15759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbf800007; valaddr_reg:x12; val_offset:47214*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47214*FLEN/8, x13, x9, x10)

inst_15760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:47217*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47217*FLEN/8, x13, x9, x10)

inst_15761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbf800003; valaddr_reg:x12; val_offset:47220*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47220*FLEN/8, x13, x9, x10)

inst_15762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:47223*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47223*FLEN/8, x13, x9, x10)

inst_15763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbf800001; valaddr_reg:x12; val_offset:47226*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47226*FLEN/8, x13, x9, x10)

inst_15764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:47229*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47229*FLEN/8, x13, x9, x10)

inst_15765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:47232*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47232*FLEN/8, x13, x9, x10)

inst_15766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbf999999; valaddr_reg:x12; val_offset:47235*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47235*FLEN/8, x13, x9, x10)

inst_15767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:47238*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47238*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_123)
inst_15768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:47241*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47241*FLEN/8, x13, x9, x10)

inst_15769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:47244*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47244*FLEN/8, x13, x9, x10)

inst_15770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:47247*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47247*FLEN/8, x13, x9, x10)

inst_15771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:47250*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47250*FLEN/8, x13, x9, x10)

inst_15772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:47253*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47253*FLEN/8, x13, x9, x10)

inst_15773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ba6e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4586b9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeba6e4; op2val:0x804586b9;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:47256*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47256*FLEN/8, x13, x9, x10)

inst_15774:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8800000; valaddr_reg:x12; val_offset:47259*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47259*FLEN/8, x13, x9, x10)

inst_15775:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffffff; valaddr_reg:x12; val_offset:47262*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47262*FLEN/8, x13, x9, x10)

inst_15776:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8c00000; valaddr_reg:x12; val_offset:47265*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47265*FLEN/8, x13, x9, x10)

inst_15777:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8bfffff; valaddr_reg:x12; val_offset:47268*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47268*FLEN/8, x13, x9, x10)

inst_15778:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8e00000; valaddr_reg:x12; val_offset:47271*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47271*FLEN/8, x13, x9, x10)

inst_15779:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc89fffff; valaddr_reg:x12; val_offset:47274*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47274*FLEN/8, x13, x9, x10)

inst_15780:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8f00000; valaddr_reg:x12; val_offset:47277*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47277*FLEN/8, x13, x9, x10)

inst_15781:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc88fffff; valaddr_reg:x12; val_offset:47280*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47280*FLEN/8, x13, x9, x10)

inst_15782:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8f80000; valaddr_reg:x12; val_offset:47283*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47283*FLEN/8, x13, x9, x10)

inst_15783:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc887ffff; valaddr_reg:x12; val_offset:47286*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47286*FLEN/8, x13, x9, x10)

inst_15784:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fc0000; valaddr_reg:x12; val_offset:47289*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47289*FLEN/8, x13, x9, x10)

inst_15785:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc883ffff; valaddr_reg:x12; val_offset:47292*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47292*FLEN/8, x13, x9, x10)

inst_15786:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fe0000; valaddr_reg:x12; val_offset:47295*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47295*FLEN/8, x13, x9, x10)

inst_15787:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc881ffff; valaddr_reg:x12; val_offset:47298*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47298*FLEN/8, x13, x9, x10)

inst_15788:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ff0000; valaddr_reg:x12; val_offset:47301*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47301*FLEN/8, x13, x9, x10)

inst_15789:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc880ffff; valaddr_reg:x12; val_offset:47304*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47304*FLEN/8, x13, x9, x10)

inst_15790:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ff8000; valaddr_reg:x12; val_offset:47307*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47307*FLEN/8, x13, x9, x10)

inst_15791:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8807fff; valaddr_reg:x12; val_offset:47310*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47310*FLEN/8, x13, x9, x10)

inst_15792:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffc000; valaddr_reg:x12; val_offset:47313*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47313*FLEN/8, x13, x9, x10)

inst_15793:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8803fff; valaddr_reg:x12; val_offset:47316*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47316*FLEN/8, x13, x9, x10)

inst_15794:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffe000; valaddr_reg:x12; val_offset:47319*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47319*FLEN/8, x13, x9, x10)

inst_15795:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8801fff; valaddr_reg:x12; val_offset:47322*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47322*FLEN/8, x13, x9, x10)

inst_15796:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fff000; valaddr_reg:x12; val_offset:47325*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47325*FLEN/8, x13, x9, x10)

inst_15797:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8800fff; valaddr_reg:x12; val_offset:47328*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47328*FLEN/8, x13, x9, x10)

inst_15798:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fff800; valaddr_reg:x12; val_offset:47331*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47331*FLEN/8, x13, x9, x10)

inst_15799:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc88007ff; valaddr_reg:x12; val_offset:47334*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47334*FLEN/8, x13, x9, x10)

inst_15800:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fffc00; valaddr_reg:x12; val_offset:47337*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47337*FLEN/8, x13, x9, x10)

inst_15801:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc88003ff; valaddr_reg:x12; val_offset:47340*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47340*FLEN/8, x13, x9, x10)

inst_15802:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fffe00; valaddr_reg:x12; val_offset:47343*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47343*FLEN/8, x13, x9, x10)

inst_15803:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc88001ff; valaddr_reg:x12; val_offset:47346*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47346*FLEN/8, x13, x9, x10)

inst_15804:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffff00; valaddr_reg:x12; val_offset:47349*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47349*FLEN/8, x13, x9, x10)

inst_15805:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc88000ff; valaddr_reg:x12; val_offset:47352*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47352*FLEN/8, x13, x9, x10)

inst_15806:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffff80; valaddr_reg:x12; val_offset:47355*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47355*FLEN/8, x13, x9, x10)

inst_15807:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc880007f; valaddr_reg:x12; val_offset:47358*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47358*FLEN/8, x13, x9, x10)

inst_15808:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffffc0; valaddr_reg:x12; val_offset:47361*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47361*FLEN/8, x13, x9, x10)

inst_15809:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc880003f; valaddr_reg:x12; val_offset:47364*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47364*FLEN/8, x13, x9, x10)

inst_15810:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8ffffe0; valaddr_reg:x12; val_offset:47367*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47367*FLEN/8, x13, x9, x10)

inst_15811:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc880001f; valaddr_reg:x12; val_offset:47370*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47370*FLEN/8, x13, x9, x10)

inst_15812:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fffff0; valaddr_reg:x12; val_offset:47373*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47373*FLEN/8, x13, x9, x10)

inst_15813:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc880000f; valaddr_reg:x12; val_offset:47376*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47376*FLEN/8, x13, x9, x10)

inst_15814:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fffff8; valaddr_reg:x12; val_offset:47379*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47379*FLEN/8, x13, x9, x10)

inst_15815:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8800007; valaddr_reg:x12; val_offset:47382*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47382*FLEN/8, x13, x9, x10)

inst_15816:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fffffc; valaddr_reg:x12; val_offset:47385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47385*FLEN/8, x13, x9, x10)

inst_15817:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8800003; valaddr_reg:x12; val_offset:47388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47388*FLEN/8, x13, x9, x10)

inst_15818:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8fffffe; valaddr_reg:x12; val_offset:47391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47391*FLEN/8, x13, x9, x10)

inst_15819:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xc8800001; valaddr_reg:x12; val_offset:47394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47394*FLEN/8, x13, x9, x10)

inst_15820:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:47397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47397*FLEN/8, x13, x9, x10)

inst_15821:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbf800007; valaddr_reg:x12; val_offset:47400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47400*FLEN/8, x13, x9, x10)

inst_15822:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:47403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47403*FLEN/8, x13, x9, x10)

inst_15823:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbf800003; valaddr_reg:x12; val_offset:47406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47406*FLEN/8, x13, x9, x10)

inst_15824:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:47409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47409*FLEN/8, x13, x9, x10)

inst_15825:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbf800001; valaddr_reg:x12; val_offset:47412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47412*FLEN/8, x13, x9, x10)

inst_15826:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:47415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47415*FLEN/8, x13, x9, x10)

inst_15827:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:47418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47418*FLEN/8, x13, x9, x10)

inst_15828:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbf999999; valaddr_reg:x12; val_offset:47421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47421*FLEN/8, x13, x9, x10)

inst_15829:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:47424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47424*FLEN/8, x13, x9, x10)

inst_15830:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:47427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47427*FLEN/8, x13, x9, x10)

inst_15831:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:47430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47430*FLEN/8, x13, x9, x10)

inst_15832:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:47433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47433*FLEN/8, x13, x9, x10)

inst_15833:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:47436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47436*FLEN/8, x13, x9, x10)

inst_15834:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:47439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47439*FLEN/8, x13, x9, x10)

inst_15835:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32c488 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x374ca0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32c488; op2val:0x82b74ca0;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:47442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47442*FLEN/8, x13, x9, x10)

inst_15836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9000000; valaddr_reg:x12; val_offset:47445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47445*FLEN/8, x13, x9, x10)

inst_15837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fffff; valaddr_reg:x12; val_offset:47448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47448*FLEN/8, x13, x9, x10)

inst_15838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9400000; valaddr_reg:x12; val_offset:47451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47451*FLEN/8, x13, x9, x10)

inst_15839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc93fffff; valaddr_reg:x12; val_offset:47454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47454*FLEN/8, x13, x9, x10)

inst_15840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9600000; valaddr_reg:x12; val_offset:47457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47457*FLEN/8, x13, x9, x10)

inst_15841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc91fffff; valaddr_reg:x12; val_offset:47460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47460*FLEN/8, x13, x9, x10)

inst_15842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9700000; valaddr_reg:x12; val_offset:47463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47463*FLEN/8, x13, x9, x10)

inst_15843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc90fffff; valaddr_reg:x12; val_offset:47466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47466*FLEN/8, x13, x9, x10)

inst_15844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9780000; valaddr_reg:x12; val_offset:47469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47469*FLEN/8, x13, x9, x10)

inst_15845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc907ffff; valaddr_reg:x12; val_offset:47472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47472*FLEN/8, x13, x9, x10)

inst_15846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97c0000; valaddr_reg:x12; val_offset:47475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47475*FLEN/8, x13, x9, x10)

inst_15847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc903ffff; valaddr_reg:x12; val_offset:47478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47478*FLEN/8, x13, x9, x10)

inst_15848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97e0000; valaddr_reg:x12; val_offset:47481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47481*FLEN/8, x13, x9, x10)

inst_15849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc901ffff; valaddr_reg:x12; val_offset:47484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47484*FLEN/8, x13, x9, x10)

inst_15850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97f0000; valaddr_reg:x12; val_offset:47487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47487*FLEN/8, x13, x9, x10)

inst_15851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc900ffff; valaddr_reg:x12; val_offset:47490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47490*FLEN/8, x13, x9, x10)

inst_15852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97f8000; valaddr_reg:x12; val_offset:47493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47493*FLEN/8, x13, x9, x10)

inst_15853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9007fff; valaddr_reg:x12; val_offset:47496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47496*FLEN/8, x13, x9, x10)

inst_15854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fc000; valaddr_reg:x12; val_offset:47499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47499*FLEN/8, x13, x9, x10)

inst_15855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9003fff; valaddr_reg:x12; val_offset:47502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47502*FLEN/8, x13, x9, x10)

inst_15856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fe000; valaddr_reg:x12; val_offset:47505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47505*FLEN/8, x13, x9, x10)

inst_15857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9001fff; valaddr_reg:x12; val_offset:47508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47508*FLEN/8, x13, x9, x10)

inst_15858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ff000; valaddr_reg:x12; val_offset:47511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47511*FLEN/8, x13, x9, x10)

inst_15859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9000fff; valaddr_reg:x12; val_offset:47514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47514*FLEN/8, x13, x9, x10)

inst_15860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ff800; valaddr_reg:x12; val_offset:47517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47517*FLEN/8, x13, x9, x10)

inst_15861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc90007ff; valaddr_reg:x12; val_offset:47520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47520*FLEN/8, x13, x9, x10)

inst_15862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ffc00; valaddr_reg:x12; val_offset:47523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47523*FLEN/8, x13, x9, x10)

inst_15863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc90003ff; valaddr_reg:x12; val_offset:47526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47526*FLEN/8, x13, x9, x10)

inst_15864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ffe00; valaddr_reg:x12; val_offset:47529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47529*FLEN/8, x13, x9, x10)

inst_15865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc90001ff; valaddr_reg:x12; val_offset:47532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47532*FLEN/8, x13, x9, x10)

inst_15866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fff00; valaddr_reg:x12; val_offset:47535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47535*FLEN/8, x13, x9, x10)

inst_15867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc90000ff; valaddr_reg:x12; val_offset:47538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47538*FLEN/8, x13, x9, x10)

inst_15868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fff80; valaddr_reg:x12; val_offset:47541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47541*FLEN/8, x13, x9, x10)

inst_15869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc900007f; valaddr_reg:x12; val_offset:47544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47544*FLEN/8, x13, x9, x10)

inst_15870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fffc0; valaddr_reg:x12; val_offset:47547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47547*FLEN/8, x13, x9, x10)

inst_15871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc900003f; valaddr_reg:x12; val_offset:47550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47550*FLEN/8, x13, x9, x10)

inst_15872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97fffe0; valaddr_reg:x12; val_offset:47553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47553*FLEN/8, x13, x9, x10)

inst_15873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc900001f; valaddr_reg:x12; val_offset:47556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47556*FLEN/8, x13, x9, x10)

inst_15874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ffff0; valaddr_reg:x12; val_offset:47559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47559*FLEN/8, x13, x9, x10)

inst_15875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc900000f; valaddr_reg:x12; val_offset:47562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47562*FLEN/8, x13, x9, x10)

inst_15876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ffff8; valaddr_reg:x12; val_offset:47565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47565*FLEN/8, x13, x9, x10)

inst_15877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9000007; valaddr_reg:x12; val_offset:47568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47568*FLEN/8, x13, x9, x10)

inst_15878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ffffc; valaddr_reg:x12; val_offset:47571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47571*FLEN/8, x13, x9, x10)

inst_15879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9000003; valaddr_reg:x12; val_offset:47574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47574*FLEN/8, x13, x9, x10)

inst_15880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc97ffffe; valaddr_reg:x12; val_offset:47577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47577*FLEN/8, x13, x9, x10)

inst_15881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xc9000001; valaddr_reg:x12; val_offset:47580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47580*FLEN/8, x13, x9, x10)

inst_15882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:47583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47583*FLEN/8, x13, x9, x10)

inst_15883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbf800007; valaddr_reg:x12; val_offset:47586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47586*FLEN/8, x13, x9, x10)

inst_15884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:47589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47589*FLEN/8, x13, x9, x10)

inst_15885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbf800003; valaddr_reg:x12; val_offset:47592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47592*FLEN/8, x13, x9, x10)

inst_15886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:47595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47595*FLEN/8, x13, x9, x10)

inst_15887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbf800001; valaddr_reg:x12; val_offset:47598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47598*FLEN/8, x13, x9, x10)

inst_15888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:47601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47601*FLEN/8, x13, x9, x10)

inst_15889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:47604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47604*FLEN/8, x13, x9, x10)

inst_15890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbf999999; valaddr_reg:x12; val_offset:47607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47607*FLEN/8, x13, x9, x10)

inst_15891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:47610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47610*FLEN/8, x13, x9, x10)

inst_15892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:47613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47613*FLEN/8, x13, x9, x10)

inst_15893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:47616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47616*FLEN/8, x13, x9, x10)

inst_15894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:47619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47619*FLEN/8, x13, x9, x10)

inst_15895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:47622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47622*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_124)
inst_15896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:47625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47625*FLEN/8, x13, x9, x10)

inst_15897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ecc16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x672cf4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ecc16; op2val:0x80672cf4;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:47628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47628*FLEN/8, x13, x9, x10)

inst_15898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9800000; valaddr_reg:x12; val_offset:47631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47631*FLEN/8, x13, x9, x10)

inst_15899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffffff; valaddr_reg:x12; val_offset:47634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47634*FLEN/8, x13, x9, x10)

inst_15900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9c00000; valaddr_reg:x12; val_offset:47637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47637*FLEN/8, x13, x9, x10)

inst_15901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9bfffff; valaddr_reg:x12; val_offset:47640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47640*FLEN/8, x13, x9, x10)

inst_15902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9e00000; valaddr_reg:x12; val_offset:47643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47643*FLEN/8, x13, x9, x10)

inst_15903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc99fffff; valaddr_reg:x12; val_offset:47646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47646*FLEN/8, x13, x9, x10)

inst_15904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9f00000; valaddr_reg:x12; val_offset:47649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47649*FLEN/8, x13, x9, x10)

inst_15905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc98fffff; valaddr_reg:x12; val_offset:47652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47652*FLEN/8, x13, x9, x10)

inst_15906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9f80000; valaddr_reg:x12; val_offset:47655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47655*FLEN/8, x13, x9, x10)

inst_15907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc987ffff; valaddr_reg:x12; val_offset:47658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47658*FLEN/8, x13, x9, x10)

inst_15908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fc0000; valaddr_reg:x12; val_offset:47661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47661*FLEN/8, x13, x9, x10)

inst_15909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc983ffff; valaddr_reg:x12; val_offset:47664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47664*FLEN/8, x13, x9, x10)

inst_15910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fe0000; valaddr_reg:x12; val_offset:47667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47667*FLEN/8, x13, x9, x10)

inst_15911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc981ffff; valaddr_reg:x12; val_offset:47670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47670*FLEN/8, x13, x9, x10)

inst_15912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ff0000; valaddr_reg:x12; val_offset:47673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47673*FLEN/8, x13, x9, x10)

inst_15913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc980ffff; valaddr_reg:x12; val_offset:47676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47676*FLEN/8, x13, x9, x10)

inst_15914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ff8000; valaddr_reg:x12; val_offset:47679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47679*FLEN/8, x13, x9, x10)

inst_15915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9807fff; valaddr_reg:x12; val_offset:47682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47682*FLEN/8, x13, x9, x10)

inst_15916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffc000; valaddr_reg:x12; val_offset:47685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47685*FLEN/8, x13, x9, x10)

inst_15917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9803fff; valaddr_reg:x12; val_offset:47688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47688*FLEN/8, x13, x9, x10)

inst_15918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffe000; valaddr_reg:x12; val_offset:47691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47691*FLEN/8, x13, x9, x10)

inst_15919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9801fff; valaddr_reg:x12; val_offset:47694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47694*FLEN/8, x13, x9, x10)

inst_15920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fff000; valaddr_reg:x12; val_offset:47697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47697*FLEN/8, x13, x9, x10)

inst_15921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9800fff; valaddr_reg:x12; val_offset:47700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47700*FLEN/8, x13, x9, x10)

inst_15922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fff800; valaddr_reg:x12; val_offset:47703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47703*FLEN/8, x13, x9, x10)

inst_15923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc98007ff; valaddr_reg:x12; val_offset:47706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47706*FLEN/8, x13, x9, x10)

inst_15924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fffc00; valaddr_reg:x12; val_offset:47709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47709*FLEN/8, x13, x9, x10)

inst_15925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc98003ff; valaddr_reg:x12; val_offset:47712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47712*FLEN/8, x13, x9, x10)

inst_15926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fffe00; valaddr_reg:x12; val_offset:47715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47715*FLEN/8, x13, x9, x10)

inst_15927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc98001ff; valaddr_reg:x12; val_offset:47718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47718*FLEN/8, x13, x9, x10)

inst_15928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffff00; valaddr_reg:x12; val_offset:47721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47721*FLEN/8, x13, x9, x10)

inst_15929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc98000ff; valaddr_reg:x12; val_offset:47724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47724*FLEN/8, x13, x9, x10)

inst_15930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffff80; valaddr_reg:x12; val_offset:47727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47727*FLEN/8, x13, x9, x10)

inst_15931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc980007f; valaddr_reg:x12; val_offset:47730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47730*FLEN/8, x13, x9, x10)

inst_15932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffffc0; valaddr_reg:x12; val_offset:47733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47733*FLEN/8, x13, x9, x10)

inst_15933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc980003f; valaddr_reg:x12; val_offset:47736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47736*FLEN/8, x13, x9, x10)

inst_15934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9ffffe0; valaddr_reg:x12; val_offset:47739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47739*FLEN/8, x13, x9, x10)

inst_15935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc980001f; valaddr_reg:x12; val_offset:47742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47742*FLEN/8, x13, x9, x10)

inst_15936:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fffff0; valaddr_reg:x12; val_offset:47745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47745*FLEN/8, x13, x9, x10)

inst_15937:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc980000f; valaddr_reg:x12; val_offset:47748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47748*FLEN/8, x13, x9, x10)

inst_15938:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fffff8; valaddr_reg:x12; val_offset:47751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47751*FLEN/8, x13, x9, x10)

inst_15939:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9800007; valaddr_reg:x12; val_offset:47754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47754*FLEN/8, x13, x9, x10)

inst_15940:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fffffc; valaddr_reg:x12; val_offset:47757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47757*FLEN/8, x13, x9, x10)

inst_15941:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9800003; valaddr_reg:x12; val_offset:47760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47760*FLEN/8, x13, x9, x10)

inst_15942:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9fffffe; valaddr_reg:x12; val_offset:47763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47763*FLEN/8, x13, x9, x10)

inst_15943:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xc9800001; valaddr_reg:x12; val_offset:47766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47766*FLEN/8, x13, x9, x10)

inst_15944:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:47769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47769*FLEN/8, x13, x9, x10)

inst_15945:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbf800007; valaddr_reg:x12; val_offset:47772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47772*FLEN/8, x13, x9, x10)

inst_15946:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:47775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47775*FLEN/8, x13, x9, x10)

inst_15947:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbf800003; valaddr_reg:x12; val_offset:47778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47778*FLEN/8, x13, x9, x10)

inst_15948:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:47781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47781*FLEN/8, x13, x9, x10)

inst_15949:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbf800001; valaddr_reg:x12; val_offset:47784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47784*FLEN/8, x13, x9, x10)

inst_15950:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:47787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47787*FLEN/8, x13, x9, x10)

inst_15951:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:47790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47790*FLEN/8, x13, x9, x10)

inst_15952:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbf999999; valaddr_reg:x12; val_offset:47793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47793*FLEN/8, x13, x9, x10)

inst_15953:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:47796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47796*FLEN/8, x13, x9, x10)

inst_15954:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:47799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47799*FLEN/8, x13, x9, x10)

inst_15955:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:47802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47802*FLEN/8, x13, x9, x10)

inst_15956:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:47805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47805*FLEN/8, x13, x9, x10)

inst_15957:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:47808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47808*FLEN/8, x13, x9, x10)

inst_15958:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:47811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47811*FLEN/8, x13, x9, x10)

inst_15959:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e9d72 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33a5a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e9d72; op2val:0x8033a5a5;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:47814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47814*FLEN/8, x13, x9, x10)

inst_15960:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca000000; valaddr_reg:x12; val_offset:47817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47817*FLEN/8, x13, x9, x10)

inst_15961:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fffff; valaddr_reg:x12; val_offset:47820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47820*FLEN/8, x13, x9, x10)

inst_15962:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca400000; valaddr_reg:x12; val_offset:47823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47823*FLEN/8, x13, x9, x10)

inst_15963:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca3fffff; valaddr_reg:x12; val_offset:47826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47826*FLEN/8, x13, x9, x10)

inst_15964:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca600000; valaddr_reg:x12; val_offset:47829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47829*FLEN/8, x13, x9, x10)

inst_15965:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca1fffff; valaddr_reg:x12; val_offset:47832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47832*FLEN/8, x13, x9, x10)

inst_15966:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca700000; valaddr_reg:x12; val_offset:47835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47835*FLEN/8, x13, x9, x10)

inst_15967:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca0fffff; valaddr_reg:x12; val_offset:47838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47838*FLEN/8, x13, x9, x10)

inst_15968:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca780000; valaddr_reg:x12; val_offset:47841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47841*FLEN/8, x13, x9, x10)

inst_15969:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca07ffff; valaddr_reg:x12; val_offset:47844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47844*FLEN/8, x13, x9, x10)

inst_15970:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7c0000; valaddr_reg:x12; val_offset:47847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47847*FLEN/8, x13, x9, x10)

inst_15971:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca03ffff; valaddr_reg:x12; val_offset:47850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47850*FLEN/8, x13, x9, x10)

inst_15972:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7e0000; valaddr_reg:x12; val_offset:47853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47853*FLEN/8, x13, x9, x10)

inst_15973:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca01ffff; valaddr_reg:x12; val_offset:47856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47856*FLEN/8, x13, x9, x10)

inst_15974:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7f0000; valaddr_reg:x12; val_offset:47859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47859*FLEN/8, x13, x9, x10)

inst_15975:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca00ffff; valaddr_reg:x12; val_offset:47862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47862*FLEN/8, x13, x9, x10)

inst_15976:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7f8000; valaddr_reg:x12; val_offset:47865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47865*FLEN/8, x13, x9, x10)

inst_15977:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca007fff; valaddr_reg:x12; val_offset:47868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47868*FLEN/8, x13, x9, x10)

inst_15978:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fc000; valaddr_reg:x12; val_offset:47871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47871*FLEN/8, x13, x9, x10)

inst_15979:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca003fff; valaddr_reg:x12; val_offset:47874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47874*FLEN/8, x13, x9, x10)

inst_15980:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fe000; valaddr_reg:x12; val_offset:47877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47877*FLEN/8, x13, x9, x10)

inst_15981:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca001fff; valaddr_reg:x12; val_offset:47880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47880*FLEN/8, x13, x9, x10)

inst_15982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ff000; valaddr_reg:x12; val_offset:47883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47883*FLEN/8, x13, x9, x10)

inst_15983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca000fff; valaddr_reg:x12; val_offset:47886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47886*FLEN/8, x13, x9, x10)

inst_15984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ff800; valaddr_reg:x12; val_offset:47889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47889*FLEN/8, x13, x9, x10)

inst_15985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca0007ff; valaddr_reg:x12; val_offset:47892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47892*FLEN/8, x13, x9, x10)

inst_15986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ffc00; valaddr_reg:x12; val_offset:47895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47895*FLEN/8, x13, x9, x10)

inst_15987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca0003ff; valaddr_reg:x12; val_offset:47898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47898*FLEN/8, x13, x9, x10)

inst_15988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ffe00; valaddr_reg:x12; val_offset:47901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47901*FLEN/8, x13, x9, x10)

inst_15989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca0001ff; valaddr_reg:x12; val_offset:47904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47904*FLEN/8, x13, x9, x10)

inst_15990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fff00; valaddr_reg:x12; val_offset:47907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47907*FLEN/8, x13, x9, x10)

inst_15991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca0000ff; valaddr_reg:x12; val_offset:47910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47910*FLEN/8, x13, x9, x10)

inst_15992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fff80; valaddr_reg:x12; val_offset:47913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47913*FLEN/8, x13, x9, x10)

inst_15993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca00007f; valaddr_reg:x12; val_offset:47916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47916*FLEN/8, x13, x9, x10)

inst_15994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fffc0; valaddr_reg:x12; val_offset:47919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47919*FLEN/8, x13, x9, x10)

inst_15995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca00003f; valaddr_reg:x12; val_offset:47922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47922*FLEN/8, x13, x9, x10)

inst_15996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7fffe0; valaddr_reg:x12; val_offset:47925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47925*FLEN/8, x13, x9, x10)

inst_15997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca00001f; valaddr_reg:x12; val_offset:47928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47928*FLEN/8, x13, x9, x10)

inst_15998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ffff0; valaddr_reg:x12; val_offset:47931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47931*FLEN/8, x13, x9, x10)

inst_15999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca00000f; valaddr_reg:x12; val_offset:47934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47934*FLEN/8, x13, x9, x10)

inst_16000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ffff8; valaddr_reg:x12; val_offset:47937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47937*FLEN/8, x13, x9, x10)

inst_16001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca000007; valaddr_reg:x12; val_offset:47940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47940*FLEN/8, x13, x9, x10)

inst_16002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ffffc; valaddr_reg:x12; val_offset:47943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47943*FLEN/8, x13, x9, x10)

inst_16003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca000003; valaddr_reg:x12; val_offset:47946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47946*FLEN/8, x13, x9, x10)

inst_16004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca7ffffe; valaddr_reg:x12; val_offset:47949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47949*FLEN/8, x13, x9, x10)

inst_16005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xca000001; valaddr_reg:x12; val_offset:47952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47952*FLEN/8, x13, x9, x10)

inst_16006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:47955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47955*FLEN/8, x13, x9, x10)

inst_16007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbf800007; valaddr_reg:x12; val_offset:47958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47958*FLEN/8, x13, x9, x10)

inst_16008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:47961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47961*FLEN/8, x13, x9, x10)

inst_16009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbf800003; valaddr_reg:x12; val_offset:47964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47964*FLEN/8, x13, x9, x10)

inst_16010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:47967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47967*FLEN/8, x13, x9, x10)

inst_16011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbf800001; valaddr_reg:x12; val_offset:47970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47970*FLEN/8, x13, x9, x10)

inst_16012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:47973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47973*FLEN/8, x13, x9, x10)

inst_16013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:47976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47976*FLEN/8, x13, x9, x10)

inst_16014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbf999999; valaddr_reg:x12; val_offset:47979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47979*FLEN/8, x13, x9, x10)

inst_16015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:47982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47982*FLEN/8, x13, x9, x10)

inst_16016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:47985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47985*FLEN/8, x13, x9, x10)

inst_16017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:47988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47988*FLEN/8, x13, x9, x10)

inst_16018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:47991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47991*FLEN/8, x13, x9, x10)

inst_16019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:47994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47994*FLEN/8, x13, x9, x10)

inst_16020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:47997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 47997*FLEN/8, x13, x9, x10)

inst_16021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a817 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36044a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a817; op2val:0x8036044a;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:48000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48000*FLEN/8, x13, x9, x10)

inst_16022:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca800000; valaddr_reg:x12; val_offset:48003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48003*FLEN/8, x13, x9, x10)

inst_16023:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffffff; valaddr_reg:x12; val_offset:48006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48006*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_125)
inst_16024:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcac00000; valaddr_reg:x12; val_offset:48009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48009*FLEN/8, x13, x9, x10)

inst_16025:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcabfffff; valaddr_reg:x12; val_offset:48012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48012*FLEN/8, x13, x9, x10)

inst_16026:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcae00000; valaddr_reg:x12; val_offset:48015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48015*FLEN/8, x13, x9, x10)

inst_16027:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca9fffff; valaddr_reg:x12; val_offset:48018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48018*FLEN/8, x13, x9, x10)

inst_16028:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaf00000; valaddr_reg:x12; val_offset:48021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48021*FLEN/8, x13, x9, x10)

inst_16029:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca8fffff; valaddr_reg:x12; val_offset:48024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48024*FLEN/8, x13, x9, x10)

inst_16030:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaf80000; valaddr_reg:x12; val_offset:48027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48027*FLEN/8, x13, x9, x10)

inst_16031:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca87ffff; valaddr_reg:x12; val_offset:48030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48030*FLEN/8, x13, x9, x10)

inst_16032:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafc0000; valaddr_reg:x12; val_offset:48033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48033*FLEN/8, x13, x9, x10)

inst_16033:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca83ffff; valaddr_reg:x12; val_offset:48036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48036*FLEN/8, x13, x9, x10)

inst_16034:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafe0000; valaddr_reg:x12; val_offset:48039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48039*FLEN/8, x13, x9, x10)

inst_16035:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca81ffff; valaddr_reg:x12; val_offset:48042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48042*FLEN/8, x13, x9, x10)

inst_16036:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaff0000; valaddr_reg:x12; val_offset:48045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48045*FLEN/8, x13, x9, x10)

inst_16037:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca80ffff; valaddr_reg:x12; val_offset:48048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48048*FLEN/8, x13, x9, x10)

inst_16038:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaff8000; valaddr_reg:x12; val_offset:48051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48051*FLEN/8, x13, x9, x10)

inst_16039:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca807fff; valaddr_reg:x12; val_offset:48054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48054*FLEN/8, x13, x9, x10)

inst_16040:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffc000; valaddr_reg:x12; val_offset:48057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48057*FLEN/8, x13, x9, x10)

inst_16041:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca803fff; valaddr_reg:x12; val_offset:48060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48060*FLEN/8, x13, x9, x10)

inst_16042:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffe000; valaddr_reg:x12; val_offset:48063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48063*FLEN/8, x13, x9, x10)

inst_16043:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca801fff; valaddr_reg:x12; val_offset:48066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48066*FLEN/8, x13, x9, x10)

inst_16044:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafff000; valaddr_reg:x12; val_offset:48069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48069*FLEN/8, x13, x9, x10)

inst_16045:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca800fff; valaddr_reg:x12; val_offset:48072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48072*FLEN/8, x13, x9, x10)

inst_16046:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafff800; valaddr_reg:x12; val_offset:48075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48075*FLEN/8, x13, x9, x10)

inst_16047:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca8007ff; valaddr_reg:x12; val_offset:48078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48078*FLEN/8, x13, x9, x10)

inst_16048:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafffc00; valaddr_reg:x12; val_offset:48081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48081*FLEN/8, x13, x9, x10)

inst_16049:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca8003ff; valaddr_reg:x12; val_offset:48084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48084*FLEN/8, x13, x9, x10)

inst_16050:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafffe00; valaddr_reg:x12; val_offset:48087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48087*FLEN/8, x13, x9, x10)

inst_16051:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca8001ff; valaddr_reg:x12; val_offset:48090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48090*FLEN/8, x13, x9, x10)

inst_16052:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffff00; valaddr_reg:x12; val_offset:48093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48093*FLEN/8, x13, x9, x10)

inst_16053:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca8000ff; valaddr_reg:x12; val_offset:48096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48096*FLEN/8, x13, x9, x10)

inst_16054:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffff80; valaddr_reg:x12; val_offset:48099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48099*FLEN/8, x13, x9, x10)

inst_16055:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca80007f; valaddr_reg:x12; val_offset:48102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48102*FLEN/8, x13, x9, x10)

inst_16056:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffffc0; valaddr_reg:x12; val_offset:48105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48105*FLEN/8, x13, x9, x10)

inst_16057:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca80003f; valaddr_reg:x12; val_offset:48108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48108*FLEN/8, x13, x9, x10)

inst_16058:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcaffffe0; valaddr_reg:x12; val_offset:48111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48111*FLEN/8, x13, x9, x10)

inst_16059:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca80001f; valaddr_reg:x12; val_offset:48114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48114*FLEN/8, x13, x9, x10)

inst_16060:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafffff0; valaddr_reg:x12; val_offset:48117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48117*FLEN/8, x13, x9, x10)

inst_16061:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca80000f; valaddr_reg:x12; val_offset:48120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48120*FLEN/8, x13, x9, x10)

inst_16062:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafffff8; valaddr_reg:x12; val_offset:48123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48123*FLEN/8, x13, x9, x10)

inst_16063:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca800007; valaddr_reg:x12; val_offset:48126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48126*FLEN/8, x13, x9, x10)

inst_16064:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xcafffffc; valaddr_reg:x12; val_offset:48129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48129*FLEN/8, x13, x9, x10)

inst_16065:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1052fc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x630b61 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1052fc; op2val:0x80e30b61;
op3val:0xca800003; valaddr_reg:x12; val_offset:48132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 48132*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305242623,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313434624,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305177087,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313467392,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305144319,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313483776,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305127935,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313491968,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305119743,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313496064,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305115647,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313498112,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305113599,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313499136,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305112575,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313499648,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305112063,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313499904,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111807,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500032,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111679,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500096,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111615,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500128,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111583,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500144,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111567,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500152,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111559,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500156,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111555,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3313500158,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3305111553,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2127375168,32,FLEN)
NAN_BOXED(2152717099,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500160,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888767,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3317694464,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3317694463,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3319791616,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3315597311,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3320840192,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3314548735,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321364480,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3314024447,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321626624,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313762303,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321757696,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313631231,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321823232,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313565695,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321856000,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313532927,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321872384,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313516543,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321880576,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313508351,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321884672,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313504255,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321886720,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313502207,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321887744,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313501183,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888256,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500671,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888512,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500415,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888640,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500287,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888704,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500223,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888736,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500191,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888752,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500175,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888760,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500167,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888764,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500163,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3321888766,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3313500161,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2108659435,32,FLEN)
NAN_BOXED(2168102391,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2133601668,32,FLEN)
NAN_BOXED(2150601767,32,FLEN)
NAN_BOXED(3321888768,32,FLEN)
NAN_BOXED(2133601668,32,FLEN)
NAN_BOXED(2150601767,32,FLEN)
NAN_BOXED(3330277375,32,FLEN)
NAN_BOXED(2133601668,32,FLEN)
NAN_BOXED(2150601767,32,FLEN)
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NAN_BOXED(3397386255,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3405774840,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3397386247,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3405774844,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3397386243,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3405774846,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3397386241,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2114999036,32,FLEN)
NAN_BOXED(2162363233,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405774848,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414163455,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3409969152,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3409969151,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3412066304,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3407871999,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3413114880,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3406823423,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3413639168,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3406299135,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3413901312,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3406036991,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414032384,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405905919,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414097920,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405840383,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414130688,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405807615,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414147072,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405791231,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414155264,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405783039,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414159360,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405778943,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414161408,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405776895,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414162432,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405775871,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414162944,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405775359,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414163200,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405775103,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414163328,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405774975,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414163392,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3405774911,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
NAN_BOXED(2151043367,32,FLEN)
NAN_BOXED(3414163424,32,FLEN)
NAN_BOXED(2132201853,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
