Skip to content
[Jenkins]Jenkins
log in

Workspace

/ Pequeno-Risco-5 /
.git
.github
.Xil
docs
fpga
software
src
tests
.gitattributesJul 30, 2026, 4:55:05 AM29 B
.gitignoreJul 30, 2026, 4:55:05 AM21 B
build_digilent_arty_a7_100t.tclJul 30, 2026, 4:55:16 AM3.07 KiB
clockInfo.txtJul 30, 2026, 4:56:17 AM375 B
digilent_arty_a7_100t.bitJul 30, 2026, 4:57:11 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 30, 2026, 4:56:21 AM16.56 KiB
digilent_arty_a7_control_sets.rptJul 30, 2026, 4:56:21 AM12.95 KiB
digilent_arty_a7_drc.rptJul 30, 2026, 4:56:53 AM2.34 KiB
digilent_arty_a7_io.rptJul 30, 2026, 4:56:21 AM96.81 KiB
digilent_arty_a7_power.rptJul 30, 2026, 4:56:53 AM8.59 KiB
digilent_arty_a7_route_status.rptJul 30, 2026, 4:56:52 AM651 B
digilent_arty_a7_timing.rptJul 30, 2026, 4:56:53 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 30, 2026, 4:56:21 AM3.22 KiB
digilent_arty_a7_utilization_place.rptJul 30, 2026, 4:56:21 AM10.57 KiB
LICENSEJul 30, 2026, 4:55:05 AM1.05 KiB
processor_ci_defines.vhJul 30, 2026, 4:55:16 AM300 B
README.mdJul 30, 2026, 4:55:05 AM2.08 KiB