Skip to content
[Jenkins]Jenkins
log in

Workspace

/ SuperScalar-RISCV-CPU /
.git
.Xil
rtl
scr1
ssrv-on-scr1
testbench
wiki
.gitattributesSep 2, 2026, 5:44:12 AM378 B
.gitignoreSep 2, 2026, 5:44:12 AM315 B
build_digilent_arty_a7_100t.tclSep 2, 2026, 5:45:48 AM3.70 KiB
clockInfo.txtSep 2, 2026, 5:49:43 AM375 B
digilent_arty_a7_100t.bitSep 2, 2026, 5:52:34 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 2, 2026, 5:50:24 AM24.11 KiB
digilent_arty_a7_control_sets.rptSep 2, 2026, 5:50:21 AM25.04 KiB
digilent_arty_a7_drc.rptSep 2, 2026, 5:51:51 AM2.34 KiB
digilent_arty_a7_io.rptSep 2, 2026, 5:50:21 AM96.81 KiB
digilent_arty_a7_power.rptSep 2, 2026, 5:52:06 AM9.05 KiB
digilent_arty_a7_route_status.rptSep 2, 2026, 5:51:46 AM651 B
digilent_arty_a7_timing.rptSep 2, 2026, 5:51:52 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 2, 2026, 5:50:21 AM5.86 KiB
digilent_arty_a7_utilization_place.rptSep 2, 2026, 5:50:21 AM10.71 KiB
processor_ci_defines.vhSep 2, 2026, 5:45:48 AM300 B
README.mdSep 2, 2026, 5:44:12 AM5.95 KiB