Skip to content

Workspace

/ T02x /
.git
.Xil
klessydra-t0-2th
pics
build_digilent_arty_a7_100t.tclSep 3, 2026, 2:32:11 AM2.88 KiB
clockInfo.txtSep 3, 2026, 2:34:59 AM375 B
digilent_arty_a7_100t.bitSep 3, 2026, 2:36:29 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 3, 2026, 2:35:15 AM49.74 KiB
digilent_arty_a7_control_sets.rptSep 3, 2026, 2:35:14 AM60.60 KiB
digilent_arty_a7_drc.rptSep 3, 2026, 2:36:04 AM3.42 KiB
digilent_arty_a7_io.rptSep 3, 2026, 2:35:14 AM96.81 KiB
digilent_arty_a7_power.rptSep 3, 2026, 2:36:07 AM8.76 KiB
digilent_arty_a7_route_status.rptSep 3, 2026, 2:36:01 AM651 B
digilent_arty_a7_timing.rptSep 3, 2026, 2:36:05 AM64.14 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 3, 2026, 2:35:14 AM4.69 KiB
digilent_arty_a7_utilization_place.rptSep 3, 2026, 2:35:14 AM10.73 KiB
processor_ci_defines.vhSep 3, 2026, 2:32:11 AM300 B
README.mdSep 3, 2026, 2:32:04 AM1.50 KiB
src_files.ymlSep 3, 2026, 2:32:04 AM434 B