Skip to content

Workspace

/ biriscv /
.git
.Xil
docs
src
tb
build_digilent_arty_a7_100t.tclJul 31, 2026, 3:12:11 AM5.10 KiB
clockInfo.txtJul 31, 2026, 3:18:49 AM375 B
digilent_arty_a7_100t.bitJul 31, 2026, 3:20:08 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 31, 2026, 3:19:01 AM23.67 KiB
digilent_arty_a7_control_sets.rptJul 31, 2026, 3:19:01 AM33.64 KiB
digilent_arty_a7_drc.rptJul 31, 2026, 3:19:45 AM17.13 KiB
digilent_arty_a7_io.rptJul 31, 2026, 3:19:01 AM96.81 KiB
digilent_arty_a7_power.rptJul 31, 2026, 3:19:47 AM8.74 KiB
digilent_arty_a7_route_status.rptJul 31, 2026, 3:19:43 AM651 B
digilent_arty_a7_timing.rptJul 31, 2026, 3:19:45 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 31, 2026, 3:19:00 AM7.02 KiB
digilent_arty_a7_utilization_place.rptJul 31, 2026, 3:19:00 AM10.78 KiB
LICENSEJul 31, 2026, 3:12:04 AM11.09 KiB
processor_ci_defines.vhJul 31, 2026, 3:12:11 AM300 B
README.mdJul 31, 2026, 3:12:04 AM6.30 KiB