Skip to content
[Jenkins]Jenkins
log in

Workspace

/ biriscv /
.git
.Xil
docs
src
tb
build_digilent_arty_a7_100t.tclSep 24, 2026, 3:12:11 AM5.10 KiB
clockInfo.txtSep 24, 2026, 3:18:57 AM375 B
digilent_arty_a7_100t.bitSep 24, 2026, 3:20:10 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 24, 2026, 3:19:08 AM23.67 KiB
digilent_arty_a7_control_sets.rptSep 24, 2026, 3:19:07 AM33.64 KiB
digilent_arty_a7_drc.rptSep 24, 2026, 3:19:48 AM16.85 KiB
digilent_arty_a7_io.rptSep 24, 2026, 3:19:07 AM96.81 KiB
digilent_arty_a7_power.rptSep 24, 2026, 3:19:50 AM8.74 KiB
digilent_arty_a7_route_status.rptSep 24, 2026, 3:19:46 AM651 B
digilent_arty_a7_timing.rptSep 24, 2026, 3:19:48 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 24, 2026, 3:19:07 AM7.02 KiB
digilent_arty_a7_utilization_place.rptSep 24, 2026, 3:19:07 AM10.78 KiB
LICENSESep 24, 2026, 3:12:05 AM11.09 KiB
processor_ci_defines.vhSep 24, 2026, 3:12:11 AM300 B
README.mdSep 24, 2026, 3:12:05 AM6.30 KiB