Skip to content
[Jenkins]Jenkins
log in

Workspace

/ biriscv /
.git
.Xil
docs
src
tb
build_digilent_arty_a7_100t.tclSep 27, 2026, 3:12:12 AM5.10 KiB
clockInfo.txtSep 27, 2026, 3:18:50 AM375 B
digilent_arty_a7_100t.bitSep 27, 2026, 3:20:06 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 27, 2026, 3:19:03 AM23.67 KiB
digilent_arty_a7_control_sets.rptSep 27, 2026, 3:19:02 AM33.64 KiB
digilent_arty_a7_drc.rptSep 27, 2026, 3:19:44 AM16.91 KiB
digilent_arty_a7_io.rptSep 27, 2026, 3:19:02 AM96.81 KiB
digilent_arty_a7_power.rptSep 27, 2026, 3:19:46 AM8.74 KiB
digilent_arty_a7_route_status.rptSep 27, 2026, 3:19:42 AM651 B
digilent_arty_a7_timing.rptSep 27, 2026, 3:19:45 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 27, 2026, 3:19:02 AM7.02 KiB
digilent_arty_a7_utilization_place.rptSep 27, 2026, 3:19:02 AM10.78 KiB
LICENSESep 27, 2026, 3:12:05 AM11.09 KiB
processor_ci_defines.vhSep 27, 2026, 3:12:12 AM300 B
README.mdSep 27, 2026, 3:12:05 AM6.30 KiB