Skip to content
[Jenkins]Jenkins
log in

Workspace

/ biriscv /
.git
.Xil
docs
src
tb
build_digilent_arty_a7_100t.tclSep 13, 2026, 3:12:13 AM5.10 KiB
clockInfo.txtSep 13, 2026, 3:18:50 AM375 B
digilent_arty_a7_100t.bitSep 13, 2026, 3:20:04 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 13, 2026, 3:19:02 AM23.67 KiB
digilent_arty_a7_control_sets.rptSep 13, 2026, 3:19:01 AM33.64 KiB
digilent_arty_a7_drc.rptSep 13, 2026, 3:19:41 AM16.95 KiB
digilent_arty_a7_io.rptSep 13, 2026, 3:19:01 AM96.81 KiB
digilent_arty_a7_power.rptSep 13, 2026, 3:19:44 AM8.74 KiB
digilent_arty_a7_route_status.rptSep 13, 2026, 3:19:40 AM651 B
digilent_arty_a7_timing.rptSep 13, 2026, 3:19:42 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 13, 2026, 3:19:00 AM7.02 KiB
digilent_arty_a7_utilization_place.rptSep 13, 2026, 3:19:00 AM10.78 KiB
LICENSESep 13, 2026, 3:12:06 AM11.09 KiB
processor_ci_defines.vhSep 13, 2026, 3:12:13 AM300 B
README.mdSep 13, 2026, 3:12:06 AM6.30 KiB