# UCF file for the Papilio DUO board
# Generated by pin_converter, written by Kevin Lindsey
# https://github.com/thelonious/papilio_pins/tree/development/pin_converter

## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
CONFIG PROHIBIT=P144;
CONFIG PROHIBIT=P69;
CONFIG PROHIBIT=P60;

NET XCLK            LOC="P94"  | IOSTANDARD=LVTTL | PERIOD=31.25ns;               # CLK
NET UART_RXD             LOC="P46"  | IOSTANDARD=LVTTL;                                # RX
NET UART_TXD             LOC="P141" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # TX
#NET ARDUINO_RESET  LOC="P139" | IOSTANDARD=LVTTL;                                # ARDUINO_RESET
NET XRES            LOC="P116" | IOSTANDARD=LVTTL;                                # A0
#NET SW(1)            LOC="P117" | IOSTANDARD=LVTTL;                                # A1
#NET SW(2)            LOC="P118" | IOSTANDARD=LVTTL;                                # A2
#NET SW(3)            LOC="P119" | IOSTANDARD=LVTTL;                                # A3
#NET SW(4)            LOC="P120" | IOSTANDARD=LVTTL;                                # A4
NET LED(0)           LOC="P55"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C13
NET LED(1)           LOC="P50"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C14
NET LED(2)           LOC="P47"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C15
NET LED(3)           LOC="P121" | IOSTANDARD=LVTTL;                                # A5
NET DEBUG(0)           LOC="P123" | IOSTANDARD=LVTTL;                                # A6
NET DEBUG(1)           LOC="P124" | IOSTANDARD=LVTTL;                                # A7
NET DEBUG(2)           LOC="P126" | IOSTANDARD=LVTTL;                                # A8
NET DEBUG(3)           LOC="P127" | IOSTANDARD=LVTTL;                                # A9
#NET DIR_RIGHT      LOC="P131" | IOSTANDARD=LVTTL;                                # A10
#NET DIR_UP         LOC="P132" | IOSTANDARD=LVTTL;                                # A11
#NET RST       LOC="P133" | IOSTANDARD=LVTTL;                                # A12
#NET DIR_DOWN       LOC="P133" | IOSTANDARD=LVTTL;                                # A12
#NET DIR_LEFT       LOC="P134" | IOSTANDARD=LVTTL;                                # A13
#NET SEVENSEG_SEG_B LOC="P115" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B0
#NET SEVENSEG_SEG_G LOC="P114" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B1
#NET SEVENSEG_SEG_C LOC="P112" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B2
#NET SEVENSEG_SEG_F LOC="P111" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B3
#NET SEVENSEG_SEG_A LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B4
#NET SEVENSEG_SEG_E LOC="P102" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B5
#NET AUDIO1_RIGHT   LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B6
#NET AUDIO1_LEFT    LOC="P100" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # B7
#NET SEVENSEG_SEG_P LOC="P99"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C0
#NET SEVENSEG_SEG_D LOC="P97"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C1
#NET GPIO0          LOC="P93"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C2
#NET GPIO1          LOC="P88"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C3
#NET GPIO2          LOC="P85"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C4
#NET SEVENSEG_AN3   LOC="P83"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C5
#NET SEVENSEG_AN2   LOC="P81"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C6
#NET SEVENSEG_AN4   LOC="P79"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C7
#NET SEVENSEG_AN1   LOC="P75"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C8
#NET SEVENSEG_AN0   LOC="P67"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C9
#NET SW(5)            LOC="P62"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C10
#NET SW(6)            LOC="P59"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C11
#NET SW(7)            LOC="P57"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C12
#NET RST            LOC="P57"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # C12
#NET RGB(0)     LOC="P98"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D0
#NET RGB(1)     LOC="P78"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D4
#NET RGB(2)     LOC="P51"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D13
#NET VGA_RED(0)     LOC="P98"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D0
#NET VGA_RED(1)     LOC="P95"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D1
#NET VGA_RED(2)     LOC="P92"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D2
#NET VGA_RED(3)     LOC="P87"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D3
#NET VGA_GREEN(3)   LOC="P84"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D4
#NET VGA_GREEN(2)   LOC="P82"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D5
#NET VGA_GREEN(1)   LOC="P80"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D6
#NET VGA_GREEN(0)   LOC="P78"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D7
#NET VGA_BLUE(3)    LOC="P74"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D8
#NET VGA_BLUE(2)    LOC="P66"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D9
#NET VGA_BLUE(1)    LOC="P61"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D10
#NET VGA_BLUE(0)    LOC="P51"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D13
#NET AUDIO2_RIGHT   LOC="P58"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D11
#NET AUDIO2_LEFT    LOC="P56"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D12
#NET VSYNC      LOC="P48"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D14
#NET HSYNC      LOC="P39"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D15
#NET VGA_VSYNC      LOC="P48"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D14
#NET VGA_HSYNC      LOC="P39"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # D15
#NET SRAM_ADDR(0)   LOC="P7"   | IOSTANDARD=LVTTL;                                # SRAM_ADDR0
#NET SRAM_ADDR(1)   LOC="P8"   | IOSTANDARD=LVTTL;                                # SRAM_ADDR1
#NET SRAM_ADDR(2)   LOC="P9"   | IOSTANDARD=LVTTL;                                # SRAM_ADDR2
#NET SRAM_ADDR(3)   LOC="P10"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR3
#NET SRAM_ADDR(4)   LOC="P11"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR4
#NET SRAM_ADDR(5)   LOC="P5"   | IOSTANDARD=LVTTL;                                # SRAM_ADDR5
#NET SRAM_ADDR(6)   LOC="P2"   | IOSTANDARD=LVTTL;                                # SRAM_ADDR6
#NET SRAM_ADDR(7)   LOC="P1"   | IOSTANDARD=LVTTL;                                # SRAM_ADDR7
#NET SRAM_ADDR(8)   LOC="P143" | IOSTANDARD=LVTTL;                                # SRAM_ADDR8
#NET SRAM_ADDR(9)   LOC="P142" | IOSTANDARD=LVTTL;                                # SRAM_ADDR9
#NET SRAM_ADDR(10)  LOC="P43"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR10
#NET SRAM_ADDR(11)  LOC="P41"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR11
#NET SRAM_ADDR(12)  LOC="P40"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR12
#NET SRAM_ADDR(13)  LOC="P35"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR13
#NET SRAM_ADDR(14)  LOC="P34"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR14
#NET SRAM_ADDR(15)  LOC="P27"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR15
#NET SRAM_ADDR(16)  LOC="P29"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR16
#NET SRAM_ADDR(17)  LOC="P33"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR17
#NET SRAM_ADDR(18)  LOC="P32"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR18
#NET SRAM_ADDR(19)  LOC="P44"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR19
#NET SRAM_ADDR(20)  LOC="P30"  | IOSTANDARD=LVTTL;                                # SRAM_ADDR20
#NET SRAM_DATA(0)   LOC="P14"  | IOSTANDARD=LVTTL;                                # SRAM_DATA0
#NET SRAM_DATA(1)   LOC="P15"  | IOSTANDARD=LVTTL;                                # SRAM_DATA1
#NET SRAM_DATA(2)   LOC="P16"  | IOSTANDARD=LVTTL;                                # SRAM_DATA2
#NET SRAM_DATA(3)   LOC="P17"  | IOSTANDARD=LVTTL;                                # SRAM_DATA3
#NET SRAM_DATA(4)   LOC="P21"  | IOSTANDARD=LVTTL;                                # SRAM_DATA4
#NET SRAM_DATA(5)   LOC="P22"  | IOSTANDARD=LVTTL;                                # SRAM_DATA5
#NET SRAM_DATA(6)   LOC="P23"  | IOSTANDARD=LVTTL;                                # SRAM_DATA6
#NET SRAM_DATA(7)   LOC="P24"  | IOSTANDARD=LVTTL;                                # SRAM_DATA7
#NET SRAM_CE        LOC="P12"  | IOSTANDARD=LVTTL;                                # SRAM_CE
#NET SRAM_WE        LOC="P6"   | IOSTANDARD=LVTTL;                                # SRAM_WE
#NET SRAM_OE        LOC="P26"  | IOSTANDARD=LVTTL;                                # SRAM_OE
#NET JTAG_TMS       LOC="P107" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TMS
#NET JTAG_TCK       LOC="P109" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TCK
#NET JTAG_TDI       LOC="P110" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TDI
#NET JTAG_TDO       LOC="P106" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TDO
#NET FLASH_CS       LOC="P38"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # FLASH_CS
#NET FLASH_CK       LOC="P70"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # FLASH_CK
#NET FLASH_SI       LOC="P64"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # FLASH_SI
#NET FLASH_SO       LOC="P65"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # FLASH_SO
