# -------------------------------------------------------------------------- #
#
# Copyright (C) 2019  Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions 
# and other software and tools, and any partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Intel Program License 
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors.  Please
# refer to the applicable agreement for further details, at
# https://fpgasoftware.intel.com/eula.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition
# Date created = 20:41:21  abril 16, 2020
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		max10_uart_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus Prime software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "MAX 10"
set_global_assignment -name DEVICE 10M08SAU169C8G
set_global_assignment -name TOP_LEVEL_ENTITY top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:41:21  ABRIL 16, 2020"
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %"
set_location_assignment PIN_H6 -to CLK12M
set_location_assignment PIN_D8 -to LED[7]
set_location_assignment PIN_C10 -to LED[6]
set_location_assignment PIN_C9 -to LED[5]
set_location_assignment PIN_B10 -to LED[4]
set_location_assignment PIN_A10 -to LED[3]
set_location_assignment PIN_A11 -to LED[2]
set_location_assignment PIN_A9 -to LED[1]
set_location_assignment PIN_A8 -to LED[0]
set_location_assignment PIN_K1 -to PIO[8]
set_location_assignment PIN_K2 -to PIO[7]
set_location_assignment PIN_N2 -to PIO[6]
set_location_assignment PIN_N3 -to PIO[5]
set_location_assignment PIN_M1 -to PIO[4]
set_location_assignment PIN_M2 -to PIO[3]
set_location_assignment PIN_L3 -to PIO[2]
set_location_assignment PIN_M3 -to PIO[1]
set_location_assignment PIN_L5 -to SEN_CS
set_location_assignment PIN_J7 -to SEN_SDI
set_location_assignment PIN_K5 -to SEN_SDO
set_location_assignment PIN_J6 -to SEN_SPC
set_location_assignment PIN_H9 -to OSC_DIV
set_location_assignment PIN_E6 -to USER_BTN
set_location_assignment PIN_G5 -to OSC_CLK
set_location_assignment PIN_E7 -to RESET
set_location_assignment PIN_J5 -to SEN_INT1
set_location_assignment PIN_L4 -to SEN_INT2
set_location_assignment PIN_A4 -to BDBUS[0]
set_location_assignment PIN_B4 -to BDBUS[1]
set_location_assignment PIN_B5 -to BDBUS[2]
set_location_assignment PIN_A6 -to BDBUS[3]
set_location_assignment PIN_B6 -to BDBUS[4]
set_location_assignment PIN_A7 -to BDBUS[5]
set_location_assignment PIN_D11 -to DQ[0]
set_location_assignment PIN_G10 -to DQ[1]
set_location_assignment PIN_F10 -to DQ[2]
set_location_assignment PIN_F9 -to DQ[3]
set_location_assignment PIN_E10 -to DQ[4]
set_location_assignment PIN_D9 -to DQ[5]
set_location_assignment PIN_G9 -to DQ[6]
set_location_assignment PIN_F8 -to DQ[7]
set_location_assignment PIN_F13 -to DQ[8]
set_location_assignment PIN_E12 -to DQ[9]
set_location_assignment PIN_E13 -to DQ[10]
set_location_assignment PIN_D12 -to DQ[11]
set_location_assignment PIN_C12 -to DQ[12]
set_location_assignment PIN_B12 -to DQ[13]
set_location_assignment PIN_B13 -to DQ[14]
set_location_assignment PIN_A12 -to DQ[15]
set_location_assignment PIN_E9 -to DQM[0]
set_location_assignment PIN_F12 -to DQM[1]
set_location_assignment PIN_K6 -to A[0]
set_location_assignment PIN_M5 -to A[1]
set_location_assignment PIN_N5 -to A[2]
set_location_assignment PIN_J8 -to A[3]
set_location_assignment PIN_N10 -to A[4]
set_location_assignment PIN_M11 -to A[5]
set_location_assignment PIN_N9 -to A[6]
set_location_assignment PIN_L10 -to A[7]
set_location_assignment PIN_M13 -to A[8]
set_location_assignment PIN_N8 -to A[9]
set_location_assignment PIN_N4 -to A[10]
set_location_assignment PIN_M10 -to A[11]
set_location_assignment PIN_L11 -to A[12]
set_location_assignment PIN_M12 -to A[13]
set_location_assignment PIN_N6 -to BA[0]
set_location_assignment PIN_K8 -to BA[1]
set_location_assignment PIN_M9 -to CLK
set_location_assignment PIN_M8 -to CKE
set_location_assignment PIN_M7 -to RAS
set_location_assignment PIN_K7 -to WE
set_location_assignment PIN_M4 -to CS
set_location_assignment PIN_N7 -to CAS
set_location_assignment PIN_B3 -to F_S
set_location_assignment PIN_A3 -to F_CLK
set_location_assignment PIN_A2 -to F_DI
set_location_assignment PIN_B2 -to F_DO
set_location_assignment PIN_H8 -to D[0]
set_location_assignment PIN_K10 -to D[1]
set_location_assignment PIN_H5 -to D[2]
set_location_assignment PIN_H4 -to D[3]
set_location_assignment PIN_J1 -to D[4]
set_location_assignment PIN_J2 -to D[5]
set_location_assignment PIN_L12 -to D[6]
set_location_assignment PIN_J12 -to D[7]
set_location_assignment PIN_J13 -to D[8]
set_location_assignment PIN_K11 -to D[9]
set_location_assignment PIN_K12 -to D[10]
set_location_assignment PIN_J10 -to D[11]
set_location_assignment PIN_H10 -to D[12]
set_location_assignment PIN_H13 -to D[13]
set_location_assignment PIN_G12 -to D[14]
set_location_assignment PIN_E1 -to AIN[0]
set_location_assignment PIN_C2 -to AIN[1]
set_location_assignment PIN_C1 -to AIN[2]
set_location_assignment PIN_D1 -to AIN[3]
set_location_assignment PIN_E3 -to AIN[4]
set_location_assignment PIN_E4 -to AIN[5]
set_location_assignment PIN_F1 -to AIN[6]

set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLK12M
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SEN_CS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SEN_SDI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SEN_SDO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SEN_SPC
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OSC_DIV
set_instance_assignment -name IO_STANDARD "3.3 V SCHMITT TRIGGER" -to USER_BTN
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OSC_CLK
set_instance_assignment -name IO_STANDARD "3.3 V SCHMITT TRIGGER" -to RESET
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SEN_INT1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SEN_INT2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BDBUS[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BDBUS[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BDBUS[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BDBUS[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BDBUS[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BDBUS[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQM[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQM[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to A[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BA[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CKE
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to RAS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to WE
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to F_S
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to F_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to F_DI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to F_DO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to D[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AIN[6]
set_location_assignment PIN_G5 -to CLK_X
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLK_X
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id dut_tb
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME dut_tb -section_id dut_tb
set_global_assignment -name EDA_TEST_BENCH_FILE dut_tb.v -section_id dut_tb
set_global_assignment -name VERILOG_MACRO "QUARTUS=1"
set_global_assignment -name VERILOG_MACRO "MAX1000_MAX10=1"
set_global_assignment -name VERILOG_MACRO "SPI=1"
set_global_assignment -name VERILOG_MACRO "SPIBB=1"
set_global_assignment -name VERILOG_MACRO "SPI3WIRE=1"
set_global_assignment -name VERILOG_FILE ../../rtl/darksocv.v
set_global_assignment -name VERILOG_FILE ../../rtl/darkio.v
set_global_assignment -name VERILOG_FILE ../../rtl/darkpll.v
set_global_assignment -name VERILOG_FILE ../../rtl/darkuart.v
set_global_assignment -name VERILOG_FILE ../../rtl/darkriscv.v
set_global_assignment -name VERILOG_FILE ../../rtl/darkbridge.v
set_global_assignment -name VERILOG_FILE ../../rtl/darkspi.v
set_global_assignment -name VERILOG_FILE ../../rtl/lib/spi/spi_master.v
set_global_assignment -name VERILOG_FILE ../../rtl/lib/spi/spi_master_bb.v
set_global_assignment -name VERILOG_FILE dut.v
set_global_assignment -name VERILOG_FILE top.v
set_global_assignment -name VERILOG_FILE _darkram.v
set_global_assignment -name QIP_FILE pll.qip
set_global_assignment -name VERILOG_TEST_BENCH_FILE dut_tb.v
set_global_assignment -name ENABLE_OCT_DONE ON
set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE IMAGE WITH ERAM"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name CDF_FILE output_files/max1000.cdf

set_global_assignment -name CDF_FILE max1000.cdf