[*]
[*] GTKWave Analyzer v3.3.103 (w)1999-2019 BSI
[*] Tue May 17 14:13:32 2022
[*]
[dumpfile] "/home/sallar/work/micrrv32-refactor/microrv32/simWorkspace/MicroRV32Top/test.vcd"
[dumpfile_mtime] "Tue May 17 14:13:12 2022"
[dumpfile_size] 1139817
[savefile] "/home/sallar/work/micrrv32-refactor/microrv32/vtb/sim/spinalhdl_trace.gtkw"
[timestart] 51309
[size] 1920 1056
[pos] -1 -1
*-9.000000 53093 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] TOP.
[treeopen] TOP.MicroRV32Top.
[treeopen] TOP.MicroRV32Top.cpu.
[treeopen] TOP.MicroRV32Top.cpu.cpu.
[treeopen] TOP.MicroRV32Top.cpu.cpu.decoder.
[treeopen] TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.
[treeopen] TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander.
[treeopen] TOP.MicroRV32Top.cpu.cpu.muldiv.
[treeopen] TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.
[treeopen] TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.
[treeopen] TOP.MicroRV32Top.uartPeriph.
[sst_width] 270
[signals_width] 478
[sst_expanded] 1
[sst_vpaned_height] 344
@c00200
-top
@28
TOP.clk
@22
TOP.io_cpuDbgState[3:0]
@28
TOP.io_cpuFetch
TOP.io_cpuHalted
@22
TOP.io_dbgBus[15:0]
@28
TOP.io_gpioA_0
TOP.io_gpioA_1
TOP.io_gpioA_2
TOP.io_gpioA_3
TOP.io_gpioA_4
TOP.io_gpioA_5
TOP.io_gpioA_6
TOP.io_gpioA_7
@22
TOP.io_gpioLed[7:0]
@28
TOP.io_uart_rxd
TOP.io_uart_txd
TOP.reset
@1401200
-top
@800200
-mrvtop
@c00200
-addrMap
@22
TOP.MicroRV32Top.addressMapping_datasel[3:0]
@28
TOP.MicroRV32Top.addressMapping_lastValid
@22
TOP.MicroRV32Top.addressMapping_oldAddr[31:0]
TOP.MicroRV32Top.intconSBrdata[31:0]
@28
TOP.MicroRV32Top.intconSBready
@1401200
-addrMap
@c00200
-cpu
@22
TOP.MicroRV32Top.cpu_io_dbgState[3:0]
@28
TOP.MicroRV32Top.cpu_io_fetchSync
TOP.MicroRV32Top.cpu_io_halted
@22
TOP.MicroRV32Top.cpu_io_sb_SBaddress[31:0]
TOP.MicroRV32Top.cpu_io_sb_SBsize[3:0]
@28
TOP.MicroRV32Top.cpu_io_sb_SBvalid
@22
TOP.MicroRV32Top.cpu_io_sb_SBwdata[31:0]
@28
TOP.MicroRV32Top.cpu_io_sb_SBwrite
@1401200
-cpu
@c00200
-gpioled
@22
TOP.MicroRV32Top.gpio_led_io_leds[7:0]
TOP.MicroRV32Top.gpio_led_io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.gpio_led_io_sb_SBready
@1401200
-gpioled
@c00200
-ram
@22
TOP.MicroRV32Top.ram_io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.ram_io_sb_SBready
@1401200
-ram
@c00200
-clic
@28
TOP.MicroRV32Top.rvCLIC_1_io_irq
@22
TOP.MicroRV32Top.rvCLIC_1_io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.rvCLIC_1_io_sb_SBready
@1401200
-clic
@c00200
-shutdown
@28
TOP.MicroRV32Top.shutdown_periph_io_halt
TOP.MicroRV32Top.shutdown_periph_io_haltErr
@22
TOP.MicroRV32Top.shutdown_periph_io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.shutdown_periph_io_sb_SBready
@1401200
-shutdown
@c00200
-uart
@22
TOP.MicroRV32Top.uartPeriph_io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.uartPeriph_io_sb_SBready
TOP.MicroRV32Top.uartPeriph_io_uart_txd
@820
TOP.MicroRV32Top.uartPeriph.uartCtrl_1.io_write_payload[7:0]
@1401200
-uart
@1000200
-mrvtop
@800200
-sbRV32
@c00200
-busTranslation
@22
TOP.MicroRV32Top.cpu.busTranslation_sbAddrMux[31:0]
@28
TOP.MicroRV32Top.cpu.busTranslation_sbError
@22
TOP.MicroRV32Top.cpu.busTranslation_sbRDataMux[31:0]
@28
TOP.MicroRV32Top.cpu.busTranslation_sbReadyMux
@22
TOP.MicroRV32Top.cpu.busTranslation_sbSizeMux[3:0]
@28
TOP.MicroRV32Top.cpu.busTranslation_sbValidMux
@22
TOP.MicroRV32Top.cpu.busTranslation_sbWDataMux[31:0]
@28
TOP.MicroRV32Top.cpu.busTranslation_sbWriteMux
TOP.MicroRV32Top.cpu.busTranslation_transactionSrc[1:0]
@22
TOP.MicroRV32Top.cpu.busTranslation_transactionSrc_string[39:0]
TOP.MicroRV32Top.cpu.busTranslation_wrSize[3:0]
@1401200
-busTranslation
@c00200
-cpuIO
@22
TOP.MicroRV32Top.cpu.cpu_io_dbgState[3:0]
@28
TOP.MicroRV32Top.cpu.cpu_io_fetchSync
TOP.MicroRV32Top.cpu.cpu_io_halted
@22
TOP.MicroRV32Top.cpu.cpu_io_memIF_DMem_address[31:0]
@28
TOP.MicroRV32Top.cpu.cpu_io_memIF_DMem_enable
TOP.MicroRV32Top.cpu.cpu_io_memIF_DMem_readWrite
@22
TOP.MicroRV32Top.cpu.cpu_io_memIF_DMem_wrStrobe[3:0]
TOP.MicroRV32Top.cpu.cpu_io_memIF_DMem_writeData[31:0]
TOP.MicroRV32Top.cpu.cpu_io_memIF_IMem_address[31:0]
@28
TOP.MicroRV32Top.cpu.cpu_io_memIF_IMem_fetchEnable
@1401200
-cpuIO
@c00200
-io
@22
TOP.MicroRV32Top.cpu.io_dbgState[3:0]
@28
TOP.MicroRV32Top.cpu.io_fetchSync
TOP.MicroRV32Top.cpu.io_halt
TOP.MicroRV32Top.cpu.io_haltErr
TOP.MicroRV32Top.cpu.io_halted
TOP.MicroRV32Top.cpu.io_irqTimer
@22
TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
TOP.MicroRV32Top.cpu.io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.cpu.io_sb_SBready
@22
TOP.MicroRV32Top.cpu.io_sb_SBsize[3:0]
@28
TOP.MicroRV32Top.cpu.io_sb_SBvalid
@22
TOP.MicroRV32Top.cpu.io_sb_SBwdata[31:0]
@28
TOP.MicroRV32Top.cpu.io_sb_SBwrite
@1401200
-io
@1000200
-sbRV32
@c00200
-CPU
-CSR
@28
TOP.MicroRV32Top.cpu.cpu.CSRLogic_accessType[2:0]
@820
TOP.MicroRV32Top.cpu.cpu.CSRLogic_accessType_string[63:0]
@22
TOP.MicroRV32Top.cpu.cpu.CSRLogic_addr[11:0]
@28
TOP.MicroRV32Top.cpu.cpu.CSRLogic_chooseOperand
TOP.MicroRV32Top.cpu.cpu.CSRLogic_ena
TOP.MicroRV32Top.cpu.cpu.CSRLogic_isIllegalAccess
@22
TOP.MicroRV32Top.cpu.cpu.CSRLogic_marchid[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mcause[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mcycle[63:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_medeleg[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mepc[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mhartid[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mideleg[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mie[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mimpid[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_minstret[63:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mip[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_misa[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mstatus[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mtinst[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mtval[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mtvec[31:0]
TOP.MicroRV32Top.cpu.cpu.CSRLogic_mvendorid[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.CSRLogic_newFetch
TOP.MicroRV32Top.cpu.cpu.CSRLogic_rdX0
TOP.MicroRV32Top.cpu.cpu.CSRLogic_rs1X0
@22
TOP.MicroRV32Top.cpu.cpu.CSRLogic_rval[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.CSRLogic_uimmZero
TOP.MicroRV32Top.cpu.cpu.CSRLogic_wrCSRcnd
@22
TOP.MicroRV32Top.cpu.cpu.CSRLogic_wval[31:0]
@1401200
-CSR
@c00200
-CTRL-FSM
@28
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_csrCtrl_enable
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_csrCtrl_newFetch
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_csrCtrl_writeSelect[0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_fetchSync
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_memCtrl_dataEna
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_memCtrl_fetchEna
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_memCtrl_readWriteData
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_pcCtrl_enablePC
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_pcCtrl_pcValSel[2:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_regCtrl_regFileWR
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_trapEntry
TOP.MicroRV32Top.cpu.cpu.ctrlLogic_io_trapExit
@1401200
-CTRL-FSM
@c00200
-DECODE
@28
TOP.MicroRV32Top.cpu.cpu.decoder_io_csrType[2:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder_io_csr_uimm[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder_io_decodeValid
@22
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_csr[11:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_dest[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_funct3[2:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_funct7[6:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_funct12[11:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_opcode[6:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_shamt[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_src1[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_fields_src2[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_immediate[31:0]
TOP.MicroRV32Top.cpu.cpu.decoder_io_instType[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_opcode[6:0]
@820
TOP.MicroRV32Top.cpu.cpu.decoder.io_instType_string[95:0]
@1401200
-DECODE
@c00200
-DataPath
@22
TOP.MicroRV32Top.cpu.cpu.alu_io_output[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.alu_io_output_bool
@22
TOP.MicroRV32Top.cpu.cpu.branchTarget[31:0]
TOP.MicroRV32Top.cpu.cpu.csrValMux[31:0]
TOP.MicroRV32Top.cpu.cpu.incrPC[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.irqPending
@22
TOP.MicroRV32Top.cpu.cpu.jalTarget[31:0]
TOP.MicroRV32Top.cpu.cpu.jalrTarget[31:0]
TOP.MicroRV32Top.cpu.cpu.pcValMux[31:0]
TOP.MicroRV32Top.cpu.cpu.programCounter[31:0]
TOP.MicroRV32Top.cpu.cpu.rdDataMux[31:0]
TOP.MicroRV32Top.cpu.cpu.regs_io_rs1Data[31:0]
TOP.MicroRV32Top.cpu.cpu.regs_io_rs2Data[31:0]
@1401200
-DataPath
-CPU
@c00200
-ALU
@22
TOP.MicroRV32Top.cpu.cpu.alu.add[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.bitAnd[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.bitOr[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.bitXor[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.alu.equal
TOP.MicroRV32Top.cpu.cpu.alu.ge_s
TOP.MicroRV32Top.cpu.cpu.alu.ge_u
@22
TOP.MicroRV32Top.cpu.cpu.alu.io_opA[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.io_opB[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.alu.io_operation_f3[2:0]
@22
TOP.MicroRV32Top.cpu.cpu.alu.io_operation_f7[6:0]
TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr[4:0]
@c00820
TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(1)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(2)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(3)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(4)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(5)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(6)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(7)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(8)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(9)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(10)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(11)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(12)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(13)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(14)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(15)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(16)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(17)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(18)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(19)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(20)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(21)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(22)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(23)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(24)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(25)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(26)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(27)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(28)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(29)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(30)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(31)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(32)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(33)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(34)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(35)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(36)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(37)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(38)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(39)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(40)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(41)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(42)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(43)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(44)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(45)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(46)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(47)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(48)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(49)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(50)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(51)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(52)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(53)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(54)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(55)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(56)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(57)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(58)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(59)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(60)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(61)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(62)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(63)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(64)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(65)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(66)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(67)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(68)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(69)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(70)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(71)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(72)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(73)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(74)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(75)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(76)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(77)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(78)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(79)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(80)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(81)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(82)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(83)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(84)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(85)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(86)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(87)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(88)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(89)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(90)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(91)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(92)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(93)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(94)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
(95)TOP.MicroRV32Top.cpu.cpu.alu.io_operation_instr_string[95:0]
@1401200
-group_end
@22
TOP.MicroRV32Top.cpu.cpu.alu.io_operation_shamt[4:0]
TOP.MicroRV32Top.cpu.cpu.alu.io_output[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.alu.io_output_bool
TOP.MicroRV32Top.cpu.cpu.alu.lt_s
TOP.MicroRV32Top.cpu.cpu.alu.lt_u
@22
TOP.MicroRV32Top.cpu.cpu.alu.shiftLI[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.shiftL[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.shiftRAI[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.shiftRA[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.shiftRI[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.shiftR[31:0]
TOP.MicroRV32Top.cpu.cpu.alu.sub[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.alu.unequal
@1401200
-ALU
@c00200
-DECODER
@22
TOP.MicroRV32Top.cpu.cpu.decoder.csr[11:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.csr_accType[2:0]
@820
TOP.MicroRV32Top.cpu.cpu.decoder.csr_accType_string[63:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.csr_uimm[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.decoded
@22
TOP.MicroRV32Top.cpu.cpu.decoder.destination[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.extender_io_b_imm[31:0]
TOP.MicroRV32Top.cpu.cpu.decoder.extender_io_csr_imm[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.extender_io_i_imm[31:0]
TOP.MicroRV32Top.cpu.cpu.decoder.extender_io_j_imm[31:0]
TOP.MicroRV32Top.cpu.cpu.decoder.extender_io_s_imm[31:0]
TOP.MicroRV32Top.cpu.cpu.decoder.extender_io_u_imm[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.funct3[2:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.funct7[6:0]
TOP.MicroRV32Top.cpu.cpu.decoder.funct12[11:0]
TOP.MicroRV32Top.cpu.cpu.decoder.iType[4:0]
@820
TOP.MicroRV32Top.cpu.cpu.decoder.iType_string[95:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.immediate[31:0]
@c00022
TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(1)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(2)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(3)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(4)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(5)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(6)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(7)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(8)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(9)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(10)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(11)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(12)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(13)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(14)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(15)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(16)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(17)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(18)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(19)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(20)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(21)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(22)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(23)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(24)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(25)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(26)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(27)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(28)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(29)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(30)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
(31)TOP.MicroRV32Top.cpu.cpu.decoder.instruction[31:0]
@1401200
-group_end
@28
TOP.MicroRV32Top.cpu.cpu.decoder.io_csrType[2:0]
@820
TOP.MicroRV32Top.cpu.cpu.decoder.io_csrType_string[63:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.io_csr_uimm[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.io_decodeValid
@22
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_csr[11:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_dest[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_funct3[2:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_funct7[6:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_funct7[6:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_funct12[11:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_opcode[6:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_shamt[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_src1[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_fields_src2[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_immediate[31:0]
TOP.MicroRV32Top.cpu.cpu.decoder.io_instType[4:0]
@820
TOP.MicroRV32Top.cpu.cpu.decoder.io_instType_string[95:0]
@800022
TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(1)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(2)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(3)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(4)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(5)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(6)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(7)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(8)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(9)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(10)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(11)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(12)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(13)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(14)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(15)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(16)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(17)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(18)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(19)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(20)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(21)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(22)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(23)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(24)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(25)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(26)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(27)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(28)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(29)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(30)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
(31)TOP.MicroRV32Top.cpu.cpu.decoder.io_instruction[31:0]
@1001200
-group_end
@22
TOP.MicroRV32Top.cpu.cpu.decoder.opcode[6:0]
@28
TOP.MicroRV32Top.cpu.cpu.decoder.opcode[6:0]
@22
TOP.MicroRV32Top.cpu.cpu.decoder.shamt[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.source1[4:0]
TOP.MicroRV32Top.cpu.cpu.decoder.source2[4:0]
@1401200
-DECODER
@c00200
-REGFILE
-if
@22
TOP.MicroRV32Top.cpu.cpu.regs.io_rdData[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.io_rd[4:0]
TOP.MicroRV32Top.cpu.cpu.regs.io_rs1Data[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.io_rs1[4:0]
TOP.MicroRV32Top.cpu.cpu.regs.io_rs2Data[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.io_rs2[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.regs.io_wrEna
@1401200
-if
@c00200
-regs
@22
TOP.MicroRV32Top.cpu.cpu.regs.regFile(0)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(1)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(2)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(3)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(4)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(5)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(6)[31:0]
@c00022
TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(1)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(2)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(3)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(4)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(5)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(6)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(7)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(8)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(9)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(10)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(11)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(12)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(13)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(14)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(15)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(16)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(17)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(18)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(19)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(20)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(21)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(22)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(23)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(24)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(25)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(26)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(27)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(28)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(29)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(30)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
(31)TOP.MicroRV32Top.cpu.cpu.regs.regFile(7)[31:0]
@1401200
-group_end
@c00022
TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(1)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(2)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(3)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(4)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(5)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(6)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(7)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(8)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(9)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(10)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(11)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(12)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(13)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(14)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(15)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(16)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(17)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(18)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(19)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(20)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(21)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(22)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(23)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(24)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(25)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(26)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(27)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(28)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(29)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(30)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
(31)TOP.MicroRV32Top.cpu.cpu.regs.regFile(8)[31:0]
@1401200
-group_end
@22
TOP.MicroRV32Top.cpu.cpu.regs.regFile(9)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(10)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(11)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(12)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(13)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(14)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(15)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(16)[31:0]
@24
TOP.MicroRV32Top.cpu.cpu.regs.regFile(17)[31:0]
@22
TOP.MicroRV32Top.cpu.cpu.regs.regFile(18)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(19)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(20)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(21)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(22)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(23)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(24)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(25)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(26)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(27)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(28)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(29)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(30)[31:0]
TOP.MicroRV32Top.cpu.cpu.regs.regFile(31)[31:0]
@1401200
-regs
-REGFILE
@c00200
-FSM
@22
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.fsm_stateNext[3:0]
@820
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.fsm_stateNext_string[143:0]
@22
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.fsm_stateReg[3:0]
@820
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.fsm_stateReg_string[143:0]
@28
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.fsm_wantExit
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.fsm_wantStart
@c00820
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(1)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(2)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(3)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(4)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(5)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(6)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(7)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(8)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(9)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(10)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(11)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(12)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(13)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(14)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(15)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(16)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(17)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(18)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(19)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(20)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(21)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(22)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(23)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(24)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(25)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(26)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(27)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(28)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(29)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(30)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(31)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(32)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(33)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(34)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(35)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(36)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(37)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(38)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(39)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(40)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(41)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(42)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(43)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(44)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(45)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(46)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(47)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(48)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(49)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(50)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(51)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(52)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(53)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(54)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(55)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(56)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(57)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(58)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(59)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(60)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(61)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(62)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(63)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(64)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(65)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(66)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(67)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(68)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(69)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(70)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(71)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(72)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(73)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(74)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(75)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(76)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(77)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(78)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
(79)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect_string[79:0]
@1401200
-group_end
@c00820
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(1)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(2)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(3)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(4)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(5)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(6)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(7)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(8)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(9)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(10)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(11)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(12)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(13)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(14)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(15)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(16)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(17)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(18)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(19)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(20)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(21)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(22)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(23)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(24)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(25)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(26)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(27)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(28)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(29)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(30)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(31)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(32)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(33)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(34)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(35)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(36)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(37)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(38)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(39)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(40)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(41)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(42)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(43)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(44)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(45)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(46)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(47)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(48)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(49)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(50)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(51)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(52)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(53)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(54)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(55)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(56)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(57)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(58)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(59)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(60)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(61)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(62)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(63)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(64)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(65)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(66)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(67)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(68)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(69)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(70)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(71)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(72)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(73)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(74)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(75)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(76)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(77)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(78)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(79)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(80)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(81)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(82)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(83)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(84)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(85)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(86)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(87)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(88)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(89)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(90)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(91)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(92)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(93)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(94)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(95)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(96)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(97)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(98)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(99)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(100)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(101)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(102)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(103)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(104)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(105)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(106)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(107)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(108)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(109)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(110)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(111)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(112)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(113)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(114)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(115)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(116)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(117)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(118)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
(119)TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel_string[119:0]
@1401200
-group_end
@820
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_regCtrl_regDestSel_string[87:0]
@28
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_enablePC
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_memCtrl_fetchEna
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_memCtrl_instrRdy
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_trapEntry
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_trapExit
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_validDecode
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_regCtrl_regFileWR
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_enable
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_newFetch
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_memCtrl_dataEna
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_memCtrl_readWriteData
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_memCtrl_dataRdy
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_fetchSync
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_halt
@c00200
-fields
@22
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_csr[11:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_dest[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_funct3[2:0]
@22
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_funct7[6:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_funct12[11:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_opcode[6:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_shamt[4:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_src1[4:0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrFields_src2[4:0]
@1401200
-fields
@22
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrType[4:0]
@820
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_instrType_string[95:0]
@28
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_irqPending
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_illegalAccess
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_csrCtrl_writeSelect[0]
TOP.MicroRV32Top.cpu.cpu.ctrlLogic.io_pcCtrl_pcValSel[2:0]
@1401200
-FSM
@c00200
-MulDivUnit
@800200
-muldiv
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1_io_quotient[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1_io_ready
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1_io_remainder[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.io_busy
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.io_destinationData[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.io_operation[2:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.io_ready
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.io_rs1Data[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.io_rs2Data[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.io_valid
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1_io_product[63:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1_io_ready
@1000200
-muldiv
@c00200
-MUL
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl_io_addMultiplicand
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl_io_busy
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl_io_calculate
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl_io_loadValues
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl_io_ready
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_multiplicand[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_multiplier[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_operation[1:0]
@820
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_operation_string[47:0]
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_product[63:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_ready
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.io_valid
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.mcandSign[0]
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.mcand[32:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.mpLSB[0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.mplierSign[0]
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.multiply_iMcand[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.multiply_iMplier[30:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.multiply_muxedMcand[32:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.multiply_muxedMplier[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.multiply_summand[32:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op[1:0]
@c00820
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(1)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(2)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(3)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(4)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(5)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(6)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(7)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(8)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(9)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(10)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(11)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(12)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(13)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(14)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(15)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(16)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(17)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(18)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(19)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(20)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(21)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(22)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(23)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(24)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(25)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(26)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(27)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(28)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(29)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(30)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(31)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(32)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(33)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(34)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(35)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(36)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(37)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(38)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(39)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(40)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(41)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(42)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(43)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(44)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(45)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(46)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
(47)TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.op_string[47:0]
@1401200
-group_end
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.partialProduct[32:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.prod[64:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.reset
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.result[64:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl.controlFSM_mulCounter_willOverflow
@24
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.ctrl.controlFSM_mulCounter_value[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.signHandling_isSignedOperation
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.signHandling_mulSign[0]
TOP.MicroRV32Top.cpu.cpu.muldiv.mulUnit_1.signHandling_prodSign[0]
@1401200
-MUL
@c00200
-DIV
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_dividend[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_divisor[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation[1:0]
@c00820
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(1)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(2)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(3)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(4)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(5)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(6)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(7)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(8)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(9)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(10)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(11)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(12)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(13)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(14)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(15)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(16)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(17)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(18)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(19)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(20)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(21)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(22)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(23)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(24)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(25)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(26)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(27)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(28)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(29)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(30)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(31)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(32)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(33)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(34)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(35)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(36)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(37)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(38)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
(39)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_operation_string[39:0]
@1401200
-group_end
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_quotient[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_valid
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_ready
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.io_remainder[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl_io_busy
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl_io_calculate
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl_io_iterationBit[4:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl_io_loadValues
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl_io_ready
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl_io_setCornerValues
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.ctrl.controlFSM_divCounter[4:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.dividendReg[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.dividendTC[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.divisorReg[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.divisorTC[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.quotientReg[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.remainderReg[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op[1:0]
@c00820
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
@28
(0)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(1)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(2)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(3)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(4)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(5)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(6)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(7)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(8)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(9)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(10)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(11)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(12)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(13)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(14)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(15)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(16)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(17)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(18)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(19)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(20)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(21)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(22)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(23)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(24)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(25)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(26)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(27)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(28)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(29)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(30)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(31)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(32)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(33)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(34)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(35)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(36)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(37)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(38)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
(39)TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.op_string[39:0]
@1401200
-group_end
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.RgtD
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.tmpRem1[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.tmpRem2[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.tmpQuo1[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.isCornerCase
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.isDivisionByZero
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.isOverflow
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.isSignedOperation
@22
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.resultQuotient[31:0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.resultRemainder[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.signHandling_dividendSign[0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.signHandling_divisorSign[0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.signHandling_quotientSign[0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.signHandling_remainderSign[0]
TOP.MicroRV32Top.cpu.cpu.muldiv.divUnit_1.signHandling_signSet
@1401200
-DIV
-MulDivUnit
@800200
-FetchUnit
@22
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_data[31:0]
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_fetchAddr[31:0]
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_instruction[31:0]
@4022
^>1 /home/sallar/tools/gtkwave-python-filter-process/examples/riscv-filter.py
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_instruction[31:0]
@22
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_nextPc[31:0]
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_pc[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.io_sample
@22
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.instructionBuffer[31:0]
@800200
-compressed
@22
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander.io_compInstr[15:0]
@28
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander.io_compInstr[15:0]
@22
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander_io_expInstr[31:0]
@28
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander_io_status_illegal
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander_io_status_isCompressed
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander_io_status_unsupported
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander_io_status_valid
@22
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.outMux[31:0]
@24
TOP.MicroRV32Top.cpu.cpu.fetchUnit_1.expander.immDecode_addi4spn[11:0]
@1000200
-compressed
-FetchUnit
@c00200
-SB
@c00022
TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
@28
(0)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(1)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(2)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(3)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(4)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(5)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(6)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(7)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(8)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(9)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(10)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(11)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(12)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(13)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(14)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(15)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(16)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(17)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(18)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(19)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(20)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(21)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(22)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(23)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(24)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(25)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(26)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(27)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(28)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(29)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(30)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
(31)TOP.MicroRV32Top.cpu.io_sb_SBaddress[31:0]
@1401200
-group_end
@22
TOP.MicroRV32Top.cpu.io_sb_SBrdata[31:0]
@28
TOP.MicroRV32Top.cpu.io_sb_SBready
@22
TOP.MicroRV32Top.cpu.io_sb_SBsize[3:0]
@28
TOP.MicroRV32Top.cpu.io_sb_SBvalid
@22
TOP.MicroRV32Top.cpu.io_sb_SBwdata[31:0]
@28
TOP.MicroRV32Top.cpu.io_sb_SBwrite
@1401200
-SB
@22
TOP.MicroRV32Top.cpu.io_dbgState[3:0]
TOP.MicroRV32Top.cpu.cpu.programCounter[31:0]
[pattern_trace] 1
[pattern_trace] 0
