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.gitignoreSep 22, 2026, 4:39:39 AM537 B
.gitmodulesSep 22, 2026, 4:39:39 AM95 B
build_digilent_arty_a7_100t.tclSep 22, 2026, 4:40:17 AM2.93 KiB
clockInfo.txtSep 22, 2026, 4:41:33 AM375 B
demo1.pdfSep 22, 2026, 4:39:39 AM571.17 KiB
digilent_arty_a7_100t.bitSep 22, 2026, 4:42:36 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 22, 2026, 4:41:41 AM20.75 KiB
digilent_arty_a7_control_sets.rptSep 22, 2026, 4:41:40 AM20.83 KiB
digilent_arty_a7_drc.rptSep 22, 2026, 4:42:16 AM17.11 KiB
digilent_arty_a7_io.rptSep 22, 2026, 4:41:40 AM96.81 KiB
digilent_arty_a7_power.rptSep 22, 2026, 4:42:18 AM8.83 KiB
digilent_arty_a7_route_status.rptSep 22, 2026, 4:42:15 AM651 B
digilent_arty_a7_timing.rptSep 22, 2026, 4:42:16 AM22.75 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 22, 2026, 4:41:40 AM7.67 KiB
digilent_arty_a7_utilization_place.rptSep 22, 2026, 4:41:40 AM10.74 KiB
fully-synthesized-trng.pdfSep 22, 2026, 4:39:39 AM1.02 MiB
LICENSESep 22, 2026, 4:39:39 AM2.43 KiB
mriscv.jpgSep 22, 2026, 4:39:39 AM44.89 KiB
mriscv.pdfSep 22, 2026, 4:39:39 AM3.79 MiB
PID4063257.pdfSep 22, 2026, 4:39:39 AM297.13 KiB
processor_ci_defines.vhSep 22, 2026, 4:40:17 AM300 B
README.mdSep 22, 2026, 4:39:39 AM2.12 KiB