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.gitignoreJul 30, 2026, 4:40:07 AM537 B
.gitmodulesJul 30, 2026, 4:40:07 AM95 B
build_digilent_arty_a7_100t.tclJul 30, 2026, 4:40:45 AM2.93 KiB
clockInfo.txtJul 30, 2026, 4:42:04 AM375 B
demo1.pdfJul 30, 2026, 4:40:08 AM571.17 KiB
digilent_arty_a7_100t.bitJul 30, 2026, 4:43:08 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 30, 2026, 4:42:12 AM20.75 KiB
digilent_arty_a7_control_sets.rptJul 30, 2026, 4:42:11 AM20.83 KiB
digilent_arty_a7_drc.rptJul 30, 2026, 4:42:47 AM17.11 KiB
digilent_arty_a7_io.rptJul 30, 2026, 4:42:11 AM96.81 KiB
digilent_arty_a7_power.rptJul 30, 2026, 4:42:49 AM8.83 KiB
digilent_arty_a7_route_status.rptJul 30, 2026, 4:42:46 AM651 B
digilent_arty_a7_timing.rptJul 30, 2026, 4:42:48 AM22.75 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 30, 2026, 4:42:11 AM7.67 KiB
digilent_arty_a7_utilization_place.rptJul 30, 2026, 4:42:11 AM10.74 KiB
fully-synthesized-trng.pdfJul 30, 2026, 4:40:08 AM1.02 MiB
LICENSEJul 30, 2026, 4:40:07 AM2.43 KiB
mriscv.jpgJul 30, 2026, 4:40:08 AM44.89 KiB
mriscv.pdfJul 30, 2026, 4:40:08 AM3.79 MiB
PID4063257.pdfJul 30, 2026, 4:40:07 AM297.13 KiB
processor_ci_defines.vhJul 30, 2026, 4:40:45 AM300 B
README.mdJul 30, 2026, 4:40:07 AM2.12 KiB