Console Output

+ /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s debug/clk_divider.v debug/debug.v debug/reset.v fpga/colorlight_i9/main.v fpga/cyclone10gx/main.v fpga/de1soc/main.v fpga/digilent_arty/main.v fpga/nexys4_ddr/main.v fpga/tangnano20k/main.v fpga/tangnano20k_yosys/main.v fpga/xilinx_vc709/main.v src/core/alu.v src/core/alu_control.v src/core/control_unit.v src/core/core.v src/core/immediate_generator.v src/core/registers.v src/peripheral/leds.v src/peripheral/memory.v src/peripheral/soc.v tests/alu_test.v tests/clk_divider.v tests/core_test.v tests/fifo_test.v tests/gpio_test.v tests/immediate_generator_test.v tests/mux_test.v tests/pc_test.v tests/registers_test.v tests/reset_test.v tests/soc_test.v
fpga/cyclone10gx/main.v:1: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/cyclone10gx/main.v:35: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

fpga/de1soc/main.v:1: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/de1soc/main.v:40: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

fpga/digilent_arty/main.v:1: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/digilent_arty/main.v:53: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

fpga/nexys4_ddr/main.v:1: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/nexys4_ddr/main.v:50: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

fpga/tangnano20k/main.v:1: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/tangnano20k/main.v:38: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

fpga/tangnano20k_yosys/main.v:1: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/tangnano20k_yosys/main.v:37: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

fpga/xilinx_vc709/main.v:3: error: 'top' has already been declared in this scope.
fpga/colorlight_i9/main.v:1:      : It was declared here as a module.
fpga/xilinx_vc709/main.v:65: error: Module top was already declared here: fpga/colorlight_i9/main.v:1

tests/pc_test.v:15: syntax error
tests/pc_test.v:9: error: Syntax error in instance port expression(s).
tests/pc_test.v:21: syntax error
tests/pc_test.v:21: Syntax in assignment statement l-value.