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Start of Pipeline - (17 sec in block)
node - (16 sec in block)
node block - (16 sec in block)
stage - (2.8 sec in block)Git Clone
stage block (Git Clone) - (2.3 sec in block)
sh - (0.46 sec in self)rm -rf Baby-Risco-5
sh - (1.7 sec in self)git clone --recursive --depth=1 https://github.com/JN513/Baby-Risco-5 Baby-Risco-5
stage - (2 sec in block)Simulation
stage block (Simulation) - (1.4 sec in block)
dir - (0.94 sec in block)Baby-Risco-5
dir block - (0.64 sec in block)
sh - (0.44 sec in self)/eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s debug/clk_divider.v debug/debug.v debug/reset.v fpga/colorlight_i9/main.v fpga/cyclone10gx/main.v fpga/de1soc/main.v fpga/digilent_arty/main.v fpga/nexys4_ddr/main.v fpga/tangnano20k/main.v fpga/tangnano20k_yosys/main.v fpga/xilinx_vc709/main.v src/core/alu.v src/core/alu_control.v src/core/control_unit.v src/core/core.v src/core/immediate_generator.v src/core/registers.v src/peripheral/leds.v src/peripheral/memory.v src/peripheral/soc.v tests/alu_test.v tests/clk_divider.v tests/core_test.v tests/fifo_test.v tests/gpio_test.v tests/immediate_generator_test.v tests/mux_test.v tests/pc_test.v tests/registers_test.v tests/reset_test.v tests/soc_test.v
stage - (1 sec in block)Utilities
stage block (Utilities) - (0.4 sec in block)
getContext - (0.16 sec in self)
stage - (9.3 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (8.7 sec in block)
getContext - (0.26 sec in self)
parallel - (8.1 sec in block)
parallel block (Branch: colorlight_i9) - (58 ms in block)
stage - (6.6 sec in block)colorlight_i9
stage block (colorlight_i9) - (6.2 sec in block)
getContext - (0.65 sec in self)
stage - (1.7 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.59 sec in block)
getContext - (0.16 sec in self)
stage - (1.7 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (0.6 sec in block)
getContext - (0.17 sec in self)
stage - (1.2 sec in block)Test colorlight_i9
stage block (Test colorlight_i9) - (0.59 sec in block)
getContext - (0.17 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (7.4 sec in block)
stage - (6.6 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (6.1 sec in block)
getContext - (0.62 sec in self)
stage - (1.7 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.72 sec in block)
getContext - (0.17 sec in self)
stage - (1.7 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (0.73 sec in block)
getContext - (0.16 sec in self)
stage - (1.2 sec in block)Test digilent_nexys4_ddr
stage block (Test digilent_nexys4_ddr) - (0.71 sec in block)
getContext - (0.16 sec in self)
stage - (0.78 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.55 sec in block)
junit - (0.27 sec in self)**/test-reports/*.xml