Console Output

Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Running on Jenkins in /var/jenkins_home/workspace/Cores-VeeR-EL2
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf *.xml
[Pipeline] sh
+ rm -rf Cores-VeeR-EL2
[Pipeline] sh
+ git clone --recursive --depth=1 https://github.com/chipsalliance/Cores-VeeR-EL2 Cores-VeeR-EL2
Cloning into 'Cores-VeeR-EL2'...
Submodule 'third-party/picolibc' (https://github.com/picolibc/picolibc) registered for path 'third_party/picolibc'
Submodule 'third_party/riscv-dv' (https://github.com/chipsalliance/riscv-dv) registered for path 'third_party/riscv-dv'
Cloning into '/var/jenkins_home/workspace/Cores-VeeR-EL2/Cores-VeeR-EL2/third_party/picolibc'...
Cloning into '/var/jenkins_home/workspace/Cores-VeeR-EL2/Cores-VeeR-EL2/third_party/riscv-dv'...
Submodule path 'third_party/picolibc': checked out '0694a78fc08b3300c7db79602c46ba0a64428c8e'
fatal: unable to access 'https://github.com/chipsalliance/riscv-dv/': Failed to connect to github.com port 443 after 130602 ms: Couldn't connect to server
fatal: Fetched in submodule path 'third_party/riscv-dv', but it did not contain da33551ab102c7530d7dadb803abf4c245ba08e0. Direct fetching of that commit failed.
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Verilog Convert)
Stage "Verilog Convert" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
Stage "Simulation" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Utilities)
Stage "Utilities" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
Stage "FPGA Build Pipeline" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] parallel
[Pipeline] { (Branch: digilent_arty_a7_100t)
[Pipeline] stage
[Pipeline] { (digilent_arty_a7_100t)
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash digilent_arty_a7_100t)
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test digilent_arty_a7_100t)
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_arty_a7_100t
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] junit
Recording test results
[Checks API] No suitable checks publisher found.
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 128
Finished: FAILURE