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Start of Pipeline - (2 min 41 sec in block)
node - (2 min 40 sec in block)
node block - (2 min 39 sec in block)
stage - (58 sec in block)Git Clone
stage block (Git Clone) - (57 sec in block)
sh - (0.47 sec in self)rm -rf *.xml
sh - (10 sec in self)rm -rf Hazard3
sh - (46 sec in self)git clone --recursive --depth=1 https://github.com/Wren6991/Hazard3 Hazard3
stage - (11 sec in block)Simulation
stage block (Simulation) - (4 sec in block)
dir - (2.3 sec in block)Hazard3
dir block - (1.4 sec in block)
echo - (0.51 sec in self)FPGA > Simulation
stage - (21 sec in block)Utilities
stage block (Utilities) - (15 sec in block)
dir - (11 sec in block)Hazard3
dir block - (8.4 sec in block)
sh - (5.3 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (1 min 7 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (1 min 5 sec in block)
parallel - (1 min 2 sec in block)
parallel block (Branch: digilent_arty_a7_100t) - (1 min 1 sec in block)
stage - (57 sec in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (55 sec in block)
lock - (50 sec in block)digilent_arty_a7_100t
lock block - (47 sec in block)
stage - (43 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (42 sec in block)
dir - (41 sec in block)Hazard3
dir block - (40 sec in block)
echo - (0.72 sec in self)Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (39 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Hazard3 -b digilent_arty_a7_100t
stage - (1.1 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (0.38 sec in block)
getContext - (0.17 sec in self)
stage - (0.86 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (0.46 sec in block)
getContext - (0.17 sec in self)
stage - (0.92 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.58 sec in block)
junit - (0.28 sec in self)**/*.xml