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Start of Pipeline - (33 sec in block)
node - (32 sec in block)
node block - (32 sec in block)
stage - (6.2 sec in block)Git Clone
stage block (Git Clone) - (5.3 sec in block)
sh - (0.67 sec in self)rm -rf NutShell
sh - (4.3 sec in self)git clone --recursive --depth=1 https://github.com/OSCPU/NutShell NutShell
stage - (3.6 sec in block)Simulation
stage block (Simulation) - (2.5 sec in block)
dir - (1.6 sec in block)NutShell
dir block - (1 sec in block)
sh - (0.63 sec in self)/eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s fpga/board/PXIe/rtl/addr_mapper.v fpga/board/PXIe/rtl/system_top.v fpga/board/axu3cg/rtl/addr_mapper.v fpga/board/axu3cg/rtl/system_top.v fpga/board/axu3cg/rtl/hdmi/i2c_config.v fpga/board/axu3cg/rtl/hdmi/i2c_master_bit_ctrl.v fpga/board/axu3cg/rtl/hdmi/i2c_master_byte_ctrl.v fpga/board/axu3cg/rtl/hdmi/i2c_master_defines.v fpga/board/axu3cg/rtl/hdmi/i2c_master_top.v fpga/board/axu3cg/rtl/hdmi/timescale.v difftest/src/test/vsrc/common/SimJTAG.v difftest/src/test/vsrc/common/assert.v difftest/src/test/vsrc/common/ref.v difftest/src/test/vsrc/vcs/DeferredControl.v difftest/src/test/vsrc/vcs/DifftestEndpoint.v difftest/src/test/vsrc/vcs/top.v
stage - (1.8 sec in block)Utilities
stage block (Utilities) - (0.72 sec in block)
getContext - (0.33 sec in self)
stage - (18 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (17 sec in block)
getContext - (0.53 sec in self)
parallel - (15 sec in block)
parallel block (Branch: colorlight_i9) - (0.1 sec in block)
stage - (12 sec in block)colorlight_i9
stage block (colorlight_i9) - (11 sec in block)
getContext - (1.3 sec in self)
stage - (3.3 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (1.1 sec in block)
getContext - (0.32 sec in self)
stage - (3.3 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (1.1 sec in block)
getContext - (0.33 sec in self)
stage - (2.4 sec in block)Test colorlight_i9
stage block (Test colorlight_i9) - (1.1 sec in block)
getContext - (0.34 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (14 sec in block)
stage - (12 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (11 sec in block)
getContext - (1.2 sec in self)
stage - (3.3 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (1.3 sec in block)
getContext - (0.32 sec in self)
stage - (3.3 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (1.3 sec in block)
getContext - (0.33 sec in self)
stage - (2.3 sec in block)Test digilent_nexys4_ddr
stage block (Test digilent_nexys4_ddr) - (1.4 sec in block)
getContext - (0.33 sec in self)
stage - (1 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.82 sec in block)
junit - (0.32 sec in self)**/test-reports/*.xml