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Start of Pipeline - (16 sec in block)
node - (15 sec in block)
node block - (15 sec in block)
stage - (2.1 sec in block)Git Clone
stage block (Git Clone) - (1.6 sec in block)
sh - (0.46 sec in self)rm -rf RISC-V
sh - (0.92 sec in self)git clone --recursive --depth=1 https://github.com/yavuz650/RISC-V RISC-V
stage - (2 sec in block)Simulation
stage block (Simulation) - (1.5 sec in block)
dir - (1 sec in block)RISC-V
dir block - (0.68 sec in block)
sh - (0.47 sec in self)/eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s core/ALU.v core/control_unit.v core/core.v core/core_wb.v core/csr_unit.v core/forwarding_unit.v core/hazard_detection_unit.v core/imm_decoder.v core/load_store_unit.v core/muldiv/MULDIV_ctrl.v core/muldiv/MULDIV_in.v core/muldiv/MULDIV_top.v core/muldiv/MUL_DIV_out.v core/muldiv/divider_32.v core/muldiv/multiplier_32.v peripherals/debug_interface_wb.v peripherals/loader_wb.v peripherals/memory_2rw_wb.v peripherals/mtime_registers_wb.v peripherals/uart_wb.v processor/barebones/barebones_wb_top.v processor/fpga_uart/fpga_top.v processor/barebones/barebones_top_tb.v
stage - (0.97 sec in block)Utilities
stage block (Utilities) - (0.39 sec in block)
getContext - (0.16 sec in self)
stage - (9.1 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (8.5 sec in block)
getContext - (0.27 sec in self)
parallel - (7.9 sec in block)
parallel block (Branch: colorlight_i9) - (59 ms in block)
stage - (6.5 sec in block)colorlight_i9
stage block (colorlight_i9) - (6.1 sec in block)
getContext - (0.65 sec in self)
stage - (1.6 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.57 sec in block)
getContext - (0.16 sec in self)
stage - (1.7 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (0.6 sec in block)
getContext - (0.17 sec in self)
stage - (1.1 sec in block)Test colorlight_i9
stage block (Test colorlight_i9) - (0.56 sec in block)
getContext - (0.16 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (7.3 sec in block)
stage - (6.5 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (5.9 sec in block)
getContext - (0.6 sec in self)
stage - (1.6 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.68 sec in block)
getContext - (0.17 sec in self)
stage - (1.7 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (0.72 sec in block)
getContext - (0.16 sec in self)
stage - (1.2 sec in block)Test digilent_nexys4_ddr
stage block (Test digilent_nexys4_ddr) - (0.66 sec in block)
getContext - (0.15 sec in self)
stage - (0.76 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.5 sec in block)
junit - (0.25 sec in self)**/test-reports/*.xml