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Start of Pipeline - (3 min 28 sec in block)
node - (3 min 25 sec in block)
node block - (3 min 24 sec in block)
stage - (4.6 sec in block)Git Clone
stage block (Git Clone) - (4.1 sec in block)
sh - (0.53 sec in self)rm -rf *.xml
sh - (0.45 sec in self)rm -rf Risco-5
sh - (2.8 sec in self)git clone --recursive --depth=1 https://github.com/JN513/Risco-5.git Risco-5
stage - (1.4 sec in block)Simulation
stage block (Simulation) - (0.98 sec in block)
dir - (0.59 sec in block)Risco-5
dir block - (0.32 sec in block)
echo - (0.11 sec in self)FPGA > Simulation
stage - (2.2 sec in block)Utilities
stage block (Utilities) - (1.7 sec in block)
dir - (1.3 sec in block)Risco-5
dir block - (1.1 sec in block)
sh - (0.95 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (3 min 15 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (3 min 14 sec in block)
parallel - (3 min 14 sec in block)
parallel block (Branch: digilent_arty_a7_100t) - (3 min 13 sec in block)
stage - (3 min 13 sec in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (3 min 13 sec in block)
lock - (3 min 12 sec in block)digilent_arty_a7_100t
lock block - (3 min 11 sec in block)
stage - (3 min 8 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (3 min 7 sec in block)
dir - (3 min 7 sec in block)Risco-5
dir block - (3 min 7 sec in block)
echo - (0.16 sec in self)Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (3 min 6 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Risco-5 -b digilent_arty_a7_100t
stage - (2.5 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (1.9 sec in block)
dir - (1.4 sec in block)Risco-5
dir block - (1.1 sec in block)
echo - (0.18 sec in self)Flashing FPGA digilent_arty_a7_100t.
sh - (0.73 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Risco-5 -b digilent_arty_a7_100t -l
stage - (0.74 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (0.43 sec in block)
getContext - (0.19 sec in self)
stage - (0.87 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.6 sec in block)
junit - (0.32 sec in self)**/*.xml