Console Output

+ python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p Risco-5 -b digilent_nexys4_ddr -l
Final configuration file generated at /var/jenkins_home/workspace/Risco-5/Risco-5/build_digilent_nexys4_ddr.tcl
Error executing Makefile.
selfClkFreq: fail to read: usb bulk read failed
JTAG init failed with: low level FTDI init failed
make: *** [/eda/processor-ci/makefiles/digilent_nexys4_ddr.mk:20: load] Error 1

Traceback (most recent call last):
  File "/eda/processor-ci/main.py", line 135, in <module>
    main(
  File "/eda/processor-ci/main.py", line 80, in main
    flash(board_name, toolchain_path)
  File "/eda/processor-ci/core/fpga.py", line 254, in flash
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.