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Start of Pipeline - (3 min 45 sec in block)
node - (3 min 44 sec in block)
node block - (30 sec in block)
stage - (3.6 sec in block)Git Clone
stage block (Git Clone) - (2.7 sec in block)
sh - (0.62 sec in self)rm -rf SparrowRV
sh - (1.7 sec in self)git clone --recursive --depth=1 https://github.com/xiaowuzxc/SparrowRV SparrowRV
stage - (3.7 sec in block)Simulation
stage block (Simulation) - (2.6 sec in block)
dir - (1.6 sec in block)SparrowRV
dir block - (1 sec in block)
sh - (0.63 sec in self)/eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s rtl/W25Q128JVxIM.v rtl/config.v rtl/defines.v rtl/core/core.v rtl/core/csr.v rtl/core/div.v rtl/core/dpram.v rtl/core/idex.v rtl/core/iram.v rtl/core/regs.v rtl/core/rstc.v rtl/core/sctr.v rtl/core/trap.v rtl/jtag/full_handshake_rx.v rtl/jtag/full_handshake_tx.v rtl/jtag/jtag_dm.v rtl/jtag/jtag_driver.v rtl/jtag/jtag_top.v rtl/perips/axi4lite_2mt16s.v rtl/perips/sram.v rtl/perips/sm3/sm3_cmprss_ceil_comb.v rtl/perips/sm3/sm3_cmprss_core.v rtl/perips/sm3/sm3_core_top.v rtl/perips/sm3/sm3_expnd_core.v rtl/perips/sm3/sm3_pad_core.v rtl/perips/sysio/fpioa.v rtl/perips/sysio/gpio.v rtl/perips/sysio/spi.v rtl/perips/sysio/sysio.v rtl/perips/sysio/uart.v rtl/soc/sparrow_soc.v rtl/perips/sm3/tb/tb_sm3_core_top.sv tb/tb_core.sv
stage - (1.8 sec in block)Utilities
stage block (Utilities) - (0.73 sec in block)
getContext - (0.31 sec in self)
stage - (18 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (17 sec in block)
getContext - (0.54 sec in self)
parallel - (16 sec in block)
parallel block (Branch: colorlight_i9) - (0.11 sec in block)
stage - (13 sec in block)colorlight_i9
stage block (colorlight_i9) - (12 sec in block)
getContext - (1.3 sec in self)
stage - (2.9 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.78 sec in block)
getContext - (0.23 sec in self)
stage - (3.5 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (1.1 sec in block)
getContext - (0.35 sec in self)
stage - (2.9 sec in block)Test colorlight_i9
stage block (Test colorlight_i9) - (1.7 sec in block)
getContext - (0.84 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (14 sec in block)
stage - (13 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (12 sec in block)
getContext - (1.1 sec in self)
stage - (2.9 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (1 sec in block)
getContext - (0.32 sec in self)
stage - (3.6 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (1.4 sec in block)
getContext - (0.34 sec in self)
stage - (2.9 sec in block)Test digilent_nexys4_ddr
stage block (Test digilent_nexys4_ddr) - (1.9 sec in block)
getContext - (0.32 sec in self)
stage - (1.5 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (1 sec in block)
junit - (0.53 sec in self)**/test-reports/*.xml