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Start of Pipeline - (8 min 6 sec in block)
node - (8 min 2 sec in block)
node block - (8 min 1 sec in block)
stage - (7.9 sec in block)Git Clone
stage block (Git Clone) - (5.9 sec in block)
sh - (0.49 sec in self)rm -rf *.xml
sh - (0.73 sec in self)rm -rf SuperScalar-RISCV-CPU
sh - (4.4 sec in self)git clone --recursive --depth=1 https://github.com/risclite/SuperScalar-RISCV-CPU SuperScalar-RISCV-CPU
stage - (2.9 sec in block)Simulation
stage block (Simulation) - (1.9 sec in block)
dir - (1.1 sec in block)SuperScalar-RISCV-CPU
dir block - (0.66 sec in block)
echo - (0.23 sec in self)FPGA > Simulation
stage - (15 sec in block)Utilities
stage block (Utilities) - (10 sec in block)
dir - (7.6 sec in block)SuperScalar-RISCV-CPU
dir block - (4.9 sec in block)
sh - (4.5 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (7 min 31 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (7 min 28 sec in block)
parallel - (7 min 25 sec in block)
parallel block (Branch: digilent_arty_a7_100t) - (7 min 23 sec in block)
stage - (7 min 20 sec in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (7 min 18 sec in block)
lock - (7 min 13 sec in block)digilent_arty_a7_100t
lock block - (7 min 7 sec in block)
stage - (6 min 51 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (6 min 48 sec in block)
dir - (6 min 45 sec in block)SuperScalar-RISCV-CPU
dir block - (6 min 43 sec in block)
echo - (2.1 sec in self)Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (6 min 38 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p SuperScalar-RISCV-CPU -b digilent_arty_a7_100t
stage - (8.4 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (6.3 sec in block)
dir - (4.3 sec in block)SuperScalar-RISCV-CPU
dir block - (3 sec in block)
echo - (0.61 sec in self)Flashing FPGA digilent_arty_a7_100t.
sh - (1.6 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p SuperScalar-RISCV-CPU -b digilent_arty_a7_100t -l
stage - (2.5 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (1.4 sec in block)
getContext - (0.68 sec in self)
stage - (2.8 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (1.6 sec in block)
junit - (0.73 sec in self)**/*.xml