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Start of Pipeline - (20 min in block)
node - (20 min in block)
node block - (20 min in block)
stage - (9.7 sec in block)Git Clone
stage block (Git Clone) - (9.2 sec in block)
sh - (0.47 sec in self)rm -rf *.xml
sh - (0.68 sec in self)rm -rf airisc_core_complex
sh - (7.8 sec in self)git clone --recursive --depth=1 https://github.com/Fraunhofer-IMS/airisc_core_complex airisc_core_complex
stage - (1.4 sec in block)Simulation
stage block (Simulation) - (0.96 sec in block)
dir - (0.58 sec in block)airisc_core_complex
dir block - (0.32 sec in block)
echo - (0.11 sec in self)FPGA > Simulation
stage - (1.7 sec in block)Utilities
stage block (Utilities) - (1.2 sec in block)
dir - (0.85 sec in block)airisc_core_complex
dir block - (0.6 sec in block)
sh - (0.4 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (20 min in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (20 min in block)
parallel - (20 min in block)
parallel block (Branch: digilent_arty_a7_100t) - (20 min in block)
stage - (20 min in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (20 min in block)
lock - (20 min in block)digilent_arty_a7_100t
lock block - (17 min in block)
stage - (17 min in block)Synthesis and PnR
stage block (Synthesis and PnR) - (17 min in block)
dir - (17 min in block)airisc_core_complex
dir block - (17 min in block)
echo - (0.33 sec in self)Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (17 min in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p airisc_core_complex -b digilent_arty_a7_100t
stage - (3.2 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (2.6 sec in block)
dir - (2.1 sec in block)airisc_core_complex
dir block - (1.8 sec in block)
echo - (0.15 sec in self)Flashing FPGA digilent_arty_a7_100t.
sh - (1.4 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p airisc_core_complex -b digilent_arty_a7_100t -l
stage - (0.67 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (0.37 sec in block)
getContext - (0.16 sec in self)
stage - (0.95 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.71 sec in block)
junit - (0.44 sec in self)**/*.xml