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Start of Pipeline - (2 min 25 sec in block)
node - (2 min 23 sec in block)
node block - (2 min 22 sec in block)
stage - (6.2 sec in block)Git Clone
stage block (Git Clone) - (4.8 sec in block)
sh - (1 sec in self)rm -rf *.xml
sh - (1.6 sec in self)rm -rf arRISCado
sh - (1.4 sec in self)git clone --recursive --depth=1 https://github.com/arRISCado/arRISCado arRISCado
stage - (3.7 sec in block)Simulation
stage block (Simulation) - (2.5 sec in block)
dir - (1.5 sec in block)arRISCado
dir block - (0.85 sec in block)
echo - (0.26 sec in self)FPGA > Simulation
stage - (3.9 sec in block)Utilities
stage block (Utilities) - (2.6 sec in block)
dir - (1.8 sec in block)arRISCado
dir block - (1.4 sec in block)
sh - (0.96 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (2 min 6 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (2 min 6 sec in block)
parallel - (2 min 5 sec in block)
parallel block (Branch: digilent_arty_a7_100t) - (2 min 4 sec in block)
stage - (2 min 3 sec in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (2 min 3 sec in block)
lock - (2 min 2 sec in block)digilent_arty_a7_100t
lock block - (2 min 0 sec in block)
stage - (1 min 56 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (1 min 56 sec in block)
dir - (1 min 55 sec in block)arRISCado
dir block - (1 min 54 sec in block)
echo - (1.9 sec in self)Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (1 min 52 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p arRISCado -b digilent_arty_a7_100t
stage - (2.1 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (1.5 sec in block)
dir - (1 sec in block)arRISCado
dir block - (0.81 sec in block)
echo - (0.16 sec in self)Flashing FPGA digilent_arty_a7_100t.
sh - (0.44 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p arRISCado -b digilent_arty_a7_100t -l
stage - (0.67 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (0.37 sec in block)
getContext - (0.17 sec in self)
stage - (0.74 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.51 sec in block)
junit - (0.25 sec in self)**/*.xml