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Start of Pipeline - (28 sec in block)
node - (27 sec in block)
node block - (26 sec in block)
stage - (2.8 sec in block)Git Clone
stage block (Git Clone) - (2.2 sec in block)
sh - (0.58 sec in self)rm -rf arRISCado
sh - (1.3 sec in self)git clone --recursive --depth=1 https://github.com/arRISCado/arRISCado arRISCado
stage - (1.9 sec in block)Simulation
stage block (Simulation) - (1.4 sec in block)
dir - (0.95 sec in block)arRISCado
dir block - (0.65 sec in block)
sh - (0.43 sec in self)/eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s boards/nano9k/top.v boards/primer20k/top.v project/cpu.v project/flash.v project/mmu.v project/ram.v project/rom.v project/top.v project/uart.v project/cpu/alu.v project/cpu/decode.v project/cpu/divider.v project/cpu/execute.v project/cpu/fetch.v project/cpu/memory.v project/cpu/register_bank.v project/cpu/writeback.v project/peripheral/buttons.v project/peripheral/peripheral_manager.v project/peripheral/pwm_port.v testbenches/alu_tb.v testbenches/cpu_tb.v testbenches/divider_tb.v testbenches/fetch_decode_tb.v testbenches/fetch_tb.v testbenches/if_de_ex_tb.v testbenches/if_de_ex_wb_tb.v testbenches/instruction_tb.v testbenches/memory_tb.v testbenches/pwm_tb.v testbenches/ram_tb.v testbenches/rom_tb.v testbenches/writeback_tb.v testbenches/utils/imports.v
stage - (0.98 sec in block)Utilities
stage block (Utilities) - (0.37 sec in block)
getContext - (0.16 sec in self)
stage - (18 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (17 sec in block)
getContext - (0.62 sec in self)
parallel - (16 sec in block)
parallel block (Branch: colorlight_i9) - (0.12 sec in block)
stage - (13 sec in block)colorlight_i9
stage block (colorlight_i9) - (12 sec in block)
getContext - (1.4 sec in self)
stage - (3.7 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (1.2 sec in block)
getContext - (0.37 sec in self)
stage - (4.4 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (3.2 sec in block)
getContext - (1.8 sec in self)
stage - (1.2 sec in block)Test colorlight_i9
stage block (Test colorlight_i9) - (0.54 sec in block)
getContext - (0.15 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (14 sec in block)
stage - (13 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (12 sec in block)
getContext - (1.3 sec in self)
stage - (3.7 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (1.5 sec in block)
getContext - (0.37 sec in self)
stage - (4.1 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (3.1 sec in block)
getContext - (0.16 sec in self)
stage - (1.2 sec in block)Test digilent_nexys4_ddr
stage block (Test digilent_nexys4_ddr) - (0.7 sec in block)
getContext - (0.17 sec in self)
stage - (1.4 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (1 sec in block)
junit - (0.5 sec in self)**/test-reports/*.xml