cve2 #416 Pipeline steps [Jenkins]

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Step	Arguments			Status
Start of Pipeline - (5 min 7 sec in block)
node - (5 min 6 sec in block)
node block - (5 min 6 sec in block)
stage - (3 sec in block)	Git Clone
stage block (Git Clone) - (2.6 sec in block)
sh - (0.47 sec in self)	rm -rf *.xml
sh - (0.67 sec in self)	rm -rf cve2
sh - (1.2 sec in self)	git clone --recursive --depth=1 https://github.com/openhwgroup/cve2 cve2
stage - (1.3 sec in block)	Simulation
stage block (Simulation) - (0.88 sec in block)
dir - (0.53 sec in block)	cve2
dir block - (0.3 sec in block)
echo - (0.1 sec in self)	FPGA > Simulation
stage - (1.6 sec in block)	Utilities
stage block (Utilities) - (1.1 sec in block)
dir - (0.83 sec in block)	cve2
dir block - (0.59 sec in block)
sh - (0.39 sec in self)	python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (4 min 59 sec in block)	FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (4 min 58 sec in block)
parallel - (4 min 58 sec in block)
parallel block (Branch: digilent_arty_a7_100t) - (4 min 58 sec in block)
stage - (4 min 57 sec in block)	digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (4 min 57 sec in block)
lock - (4 min 56 sec in block)	digilent_arty_a7_100t
lock block - (4 min 56 sec in block)
stage - (4 min 53 sec in block)	Synthesis and PnR
stage block (Synthesis and PnR) - (4 min 52 sec in block)
dir - (4 min 52 sec in block)	cve2
dir block - (4 min 52 sec in block)
echo - (0.15 sec in self)	Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (4 min 51 sec in self)	python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p cve2 -b digilent_arty_a7_100t
stage - (2.1 sec in block)	Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (1.5 sec in block)
dir - (1.1 sec in block)	cve2
dir block - (0.8 sec in block)
echo - (0.15 sec in self)	Flashing FPGA digilent_arty_a7_100t.
sh - (0.45 sec in self)	python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p cve2 -b digilent_arty_a7_100t -l
stage - (0.65 sec in block)	Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (0.35 sec in block)
getContext - (0.15 sec in self)
stage - (0.75 sec in block)	Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.53 sec in block)
junit - (0.26 sec in self)	*/.xml