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Start of Pipeline - (5 min 3 sec in block)
node - (5 min 2 sec in block)
node block - (5 min 1 sec in block)
stage - (5.9 sec in block)Git Clone
stage block (Git Clone) - (5 sec in block)
sh - (0.74 sec in self)rm -rf *.xml
sh - (2.4 sec in self)rm -rf rvx
sh - (1.3 sec in self)git clone --recursive --depth=1 https://github.com/rafaelcalcada/rvx rvx
stage - (3 sec in block)Simulation
stage block (Simulation) - (2 sec in block)
dir - (1.1 sec in block)rvx
dir block - (0.66 sec in block)
echo - (0.25 sec in self)FPGA > Simulation
stage - (3 sec in block)Utilities
stage block (Utilities) - (2.2 sec in block)
dir - (1.4 sec in block)rvx
dir block - (1 sec in block)
sh - (0.6 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
stage - (4 min 47 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (4 min 47 sec in block)
parallel - (4 min 46 sec in block)
parallel block (Branch: digilent_arty_a7_100t) - (4 min 46 sec in block)
stage - (4 min 46 sec in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (4 min 45 sec in block)
lock - (4 min 45 sec in block)digilent_arty_a7_100t
lock block - (2 min 51 sec in block)
stage - (2 min 38 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (2 min 38 sec in block)
dir - (2 min 37 sec in block)rvx
dir block - (2 min 37 sec in block)
echo - (0.31 sec in self)Starting synthesis for FPGA digilent_arty_a7_100t.
sh - (2 min 36 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p rvx -b digilent_arty_a7_100t
stage - (5.1 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (4.6 sec in block)
dir - (4.3 sec in block)rvx
dir block - (4 sec in block)
echo - (0.16 sec in self)Flashing FPGA digilent_arty_a7_100t.
sh - (3.7 sec in self)python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p rvx -b digilent_arty_a7_100t -l
stage - (6.8 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (6.6 sec in block)
echo - (0.21 sec in self)Testing FPGA digilent_arty_a7_100t.
sh - (0.56 sec in self)echo "Test for FPGA in /dev/ttyUSB1"
sh - (5.6 sec in self)python3 /eda/processor_ci_tests/main.py -b 115200 -s 2 -c /eda/processor_ci_tests/config.json --p /dev/ttyUSB1 -m rv32i -k 0x41525459
stage - (1 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.79 sec in block)
junit - (0.52 sec in self)**/*.xml