Started by user Julio Nunes Avelar [Pipeline] Start of Pipeline [Pipeline] node Still waiting to schedule task Waiting for next available executor Running on Jenkins in /var/lib/jenkins/workspace/tinyriscv [Pipeline] { [Pipeline] stage [Pipeline] { (Git Clone) [Pipeline] sh + rm -rf tinyriscv [Pipeline] sh + git clone --recursive https://github.com/liangkangnan/tinyriscv tinyriscv Cloning into 'tinyriscv'... [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Simulation) [Pipeline] dir Running in /var/lib/jenkins/workspace/tinyriscv/tinyriscv [Pipeline] { [Pipeline] sh + iverilog -o simulation.out -g2005 -s tinyriscv -I rtl/core/ rtl/core/clint.v rtl/core/csr_reg.v rtl/core/ctrl.v rtl/core/div.v rtl/core/ex.v rtl/core/id.v rtl/core/id_ex.v rtl/core/if_id.v rtl/core/pc_reg.v rtl/core/regs.v rtl/core/tinyriscv.v rtl/core/if_id.v:41: error: Unknown module type: gen_pipe_dff rtl/core/if_id.v:45: error: Unknown module type: gen_pipe_dff rtl/core/if_id.v:49: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:60: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:64: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:68: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:72: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:76: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:80: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:84: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:88: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:92: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:96: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:100: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:104: error: Unknown module type: gen_pipe_dff rtl/core/id_ex.v:108: error: Unknown module type: gen_pipe_dff 17 error(s) during elaboration. *** These modules were missing: gen_pipe_dff referenced 16 times. *** [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (FPGA Build Pipeline) Stage "FPGA Build Pipeline" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] parallel [Pipeline] { (Branch: colorlight_i9) [Pipeline] { (Branch: digilent_nexys4_ddr) [Pipeline] stage [Pipeline] { (colorlight_i9) [Pipeline] stage [Pipeline] { (digilent_nexys4_ddr) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext Stage "digilent_nexys4_ddr" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] stage [Pipeline] { (Síntese e PnR) [Pipeline] stage [Pipeline] { (Síntese e PnR) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } Stage "digilent_nexys4_ddr" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] stage [Pipeline] { (Flash colorlight_i9) [Pipeline] stage [Pipeline] { (Flash digilent_nexys4_ddr) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } Stage "digilent_nexys4_ddr" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] stage [Pipeline] { (Teste colorlight_i9) [Pipeline] stage [Pipeline] { (Teste digilent_nexys4_ddr) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } Stage "digilent_nexys4_ddr" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] } [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] } Failed in branch colorlight_i9 [Pipeline] } Failed in branch digilent_nexys4_ddr [Pipeline] // parallel [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Declarative: Post Actions) [Pipeline] dir Running in /var/lib/jenkins/workspace/tinyriscv/tinyriscv [Pipeline] { [Pipeline] sh + rm -rf LICENSE README.md fpga pic rtl sim tb tests tools [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] } [Pipeline] // node [Pipeline] End of Pipeline ERROR: script returned exit code 17 Finished: FAILURE
