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Started by timer [Pipeline] Start of Pipeline [Pipeline] node Still waiting to schedule task Waiting for next available executor Running on Jenkins in /var/jenkins_home/workspace/Rift2Core [Pipeline] { [Pipeline] stage [Pipeline] { (Git Clone) [Pipeline] sh + rm -rf Rift2Core [Pipeline] sh + git clone --recursive --depth=1 https://github.com/whutddk/Rift2Core Rift2Core Cloning into 'Rift2Core'... Submodule 'dependencies/blocks' (https://github.com/chipsalliance/rocket-chip-blocks.git) registered for path 'dependencies/blocks' Submodule 'dependencies/constellation' (https://github.com/ucb-bar/constellation.git) registered for path 'dependencies/constellation' Submodule 'dependencies/inclusivecache' (https://github.com/chipsalliance/rocket-chip-inclusive-cache.git) registered for path 'dependencies/inclusivecache' Submodule 'dependencies/rocket-chip' (https://github.com/chipsalliance/rocket-chip.git) registered for path 'dependencies/rocket-chip' Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/blocks'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/inclusivecache'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip'... Submodule path 'dependencies/blocks': checked out '42fa33b0a30513a3471ccf246377215dfc38356b' Submodule path 'dependencies/constellation': checked out '3632183fd1171d00c7f78b32c305841d231031b7' Submodule 'espresso' (https://github.com/chipsalliance/espresso.git) registered for path 'dependencies/constellation/espresso' Submodule 'src/main/resources/csrc/netrace' (https://github.com/booksim/netrace.git) registered for path 'dependencies/constellation/src/main/resources/csrc/netrace' Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/espresso'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/csrc/netrace'... Submodule path 'dependencies/constellation/espresso': checked out '2cc477880bd99a40f257155a676fc61fd53e0d9e' Submodule path 'dependencies/constellation/src/main/resources/csrc/netrace': checked out 'bf30293e05da0ff7057be209deb7dc0317f08b09' Submodule path 'dependencies/inclusivecache': checked out '51d400bd32131e8914c6713bfb71bef690f2fe70' Submodule path 'dependencies/rocket-chip': checked out 'aa183271e978d708d9c75617bd1e261b755b6726' Submodule 'cde' (https://github.com/chipsalliance/cde.git) registered for path 'dependencies/rocket-chip/cde' Submodule 'hardfloat' (https://github.com/ucb-bar/berkeley-hardfloat.git) registered for path 'dependencies/rocket-chip/hardfloat' Submodule 'torture' (https://github.com/ucb-bar/riscv-torture.git) registered for path 'dependencies/rocket-chip/torture' Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip/cde'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip/hardfloat'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip/torture'... Submodule path 'dependencies/rocket-chip/cde': checked out '52768c97a27b254c0cc0ac9401feb55b29e18c28' Submodule path 'dependencies/rocket-chip/hardfloat': checked out 'd93aa570806013dea479a92ba9bb33d1f2d4f69f' Submodule 'berkeley-softfloat-3' (https://github.com/ucb-bar/berkeley-softfloat-3.git) registered for path 'dependencies/rocket-chip/hardfloat/berkeley-softfloat-3' Submodule 'berkeley-testfloat-3' (https://github.com/ucb-bar/berkeley-testfloat-3.git) registered for path 'dependencies/rocket-chip/hardfloat/berkeley-testfloat-3' Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip/hardfloat/berkeley-softfloat-3'... Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip/hardfloat/berkeley-testfloat-3'... Submodule path 'dependencies/rocket-chip/hardfloat/berkeley-softfloat-3': checked out '5c06db33fc1e2130f67c045327b0ec949032df1d' Submodule path 'dependencies/rocket-chip/hardfloat/berkeley-testfloat-3': checked out '06b20075dd3c1a5d0dd007a93643282832221612' Submodule path 'dependencies/rocket-chip/torture': checked out '99d8b2b441ecaa18b852505bb7718ee04e2753f5' Submodule 'env' (https://github.com/riscv/riscv-test-env.git) registered for path 'dependencies/rocket-chip/torture/env' Cloning into '/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/rocket-chip/torture/env'... Submodule path 'dependencies/rocket-chip/torture/env': checked out 'ce70afbf50a203be04bc326326cfa75831fe7f5d' [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Simulation) [Pipeline] dir Running in /var/jenkins_home/workspace/Rift2Core/Rift2Core [Pipeline] { [Pipeline] echo simulation not supported for mixed VHDL and Verilog files [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Utilities) [Pipeline] dir Running in /var/jenkins_home/workspace/Rift2Core/Rift2Core [Pipeline] { [Pipeline] sh + pwd + python3 /eda/processor_ci/core/labeler_prototype.py -d /var/jenkins_home/workspace/Rift2Core/Rift2Core -c /eda/processor_ci/config.json -o /jenkins/processor_ci_utils/labels.json WARNING: Error writing to JSON file: [Errno 2] No such file or directory: '/jenkins/processor_ci_utils/labels.json' Trying to read file: /var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/blocks/src/main/resources/BlackBoxDelayBuffer.v Trying to read file: /var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/blocks/src/main/resources/BlackBoxDelayBuffer.v Trying to read file: /var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/blocks/vsrc/SRLatch.v Trying to read file: /var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (FPGA Build Pipeline) [Pipeline] parallel [Pipeline] { (Branch: colorlight_i9) [Pipeline] { (Branch: digilent_arty_a7_100t) [Pipeline] stage [Pipeline] { (colorlight_i9) [Pipeline] stage [Pipeline] { (digilent_arty_a7_100t) [Pipeline] lock Trying to acquire lock on [Resource: colorlight_i9] Resource [colorlight_i9] did not exist. Created. Lock acquired on [Resource: colorlight_i9] [Pipeline] { [Pipeline] lock Trying to acquire lock on [Resource: digilent_arty_a7_100t] Resource [digilent_arty_a7_100t] did not exist. Created. Lock acquired on [Resource: digilent_arty_a7_100t] [Pipeline] { [Pipeline] stage [Pipeline] { (Synthesis and PnR) [Pipeline] stage [Pipeline] { (Synthesis and PnR) [Pipeline] dir Running in /var/jenkins_home/workspace/Rift2Core/Rift2Core [Pipeline] { [Pipeline] dir Running in /var/jenkins_home/workspace/Rift2Core/Rift2Core [Pipeline] { [Pipeline] echo Starting synthesis for FPGA colorlight_i9. [Pipeline] sh [Pipeline] echo Starting synthesis for FPGA digilent_arty_a7_100t. + python3 /eda/processor_ci/main.py -c /eda/processor_ci/config.json -p Rift2Core -b colorlight_i9 Final configuration file generated at /var/jenkins_home/workspace/Rift2Core/Rift2Core/build_colorlight_i9.tcl Error executing Makefile. /var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:3: ERROR: syntax error, unexpected TOK_ID, expecting ',' or ')' make: *** [/eda/processor_ci/makefiles/colorlight_i9.mk:12: colorlight_i9.json] Error 1 Traceback (most recent call last): File "/eda/processor_ci/main.py", line 135, in <module> main( File "/eda/processor_ci/main.py", line 82, in main build(build_file_path, board_name, toolchain_path) File "/eda/processor_ci/core/fpga.py", line 218, in build raise subprocess.CalledProcessError(process.returncode, 'make') subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2. [Pipeline] sh [Pipeline] } + python3 /eda/processor_ci/main.py -c /eda/processor_ci/config.json -p Rift2Core -b digilent_arty_a7_100t [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Flash colorlight_i9) Stage "Flash colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Test colorlight_i9) Stage "Test colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] } Lock released on resource [Resource: colorlight_i9] [Pipeline] // lock [Pipeline] } [Pipeline] // stage [Pipeline] } Failed in branch colorlight_i9 Final configuration file generated at /var/jenkins_home/workspace/Rift2Core/Rift2Core/build_digilent_arty_a7_100t.tcl Error executing Makefile. ERROR: [Synth 8-2716] syntax error near '"DPI-C' [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:1] ERROR: [Synth 8-11074] parameter initial value cannot be omitted in this mode of Verilog [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:30] ERROR: [Synth 8-11074] parameter initial value cannot be omitted in this mode of Verilog [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:31] ERROR: [Synth 8-8896] 'bit' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:46] ERROR: [Synth 8-8896] 'bit' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:47] ERROR: [Synth 8-8896] 'bit' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:48] ERROR: [Synth 8-8896] 'longint' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:49] ERROR: [Synth 8-8896] 'longint' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:50] ERROR: [Synth 8-11074] parameter initial value cannot be omitted in this mode of Verilog [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:91] ERROR: [Synth 8-11074] parameter initial value cannot be omitted in this mode of Verilog [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:92] ERROR: [Synth 8-8896] 'bit' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:108] ERROR: [Synth 8-8896] 'bit' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:114] ERROR: [Synth 8-8896] 'bit' is an unknown type [/var/jenkins_home/workspace/Rift2Core/Rift2Core/dependencies/constellation/src/main/resources/vsrc/TrafficEval.v:115] ERROR: [Synth 8-439] module 'Controller' not found [/eda/processor_ci/rtl/Rift2Core.v:48] ERROR: [Synth 8-6156] failed synthesizing module 'processorci_top' [/eda/processor_ci/rtl/Rift2Core.v:1] ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details make: *** [/eda/processor_ci/makefiles/digilent_arty_a7_100t.mk:12: digilent_arty_a7_100t.bit] Error 1 Traceback (most recent call last): File "/eda/processor_ci/main.py", line 135, in <module> main( File "/eda/processor_ci/main.py", line 82, in main build(build_file_path, board_name, toolchain_path) File "/eda/processor_ci/core/fpga.py", line 218, in build raise subprocess.CalledProcessError(process.returncode, 'make') subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2. [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Flash digilent_arty_a7_100t) Stage "Flash digilent_arty_a7_100t" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Test digilent_arty_a7_100t) Stage "Test digilent_arty_a7_100t" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] } Lock released on resource [Resource: digilent_arty_a7_100t] [Pipeline] // lock [Pipeline] } [Pipeline] // stage [Pipeline] } Failed in branch digilent_arty_a7_100t [Pipeline] // parallel [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Declarative: Post Actions) [Pipeline] junit Recording test results No test report files were found. Configuration error? Error when executing always post condition: Also: org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: 2aae8c56-fb1f-4a4c-9c97-8868e6db6698 hudson.AbortException: No test report files were found. Configuration error? at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253) at hudson.FilePath.act(FilePath.java:1234) at hudson.FilePath.act(FilePath.java:1217) at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146) at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177) at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282) at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62) at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27) at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:47) at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source) at java.base/java.util.concurrent.FutureTask.run(Unknown Source) at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source) at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source) at java.base/java.lang.Thread.run(Unknown Source) [Pipeline] } [Pipeline] // stage [Pipeline] } [Pipeline] // node [Pipeline] End of Pipeline ERROR: script returned exit code 1 Finished: FAILURE